| blob | 7e3d7fc6cf86cf14c54e1a9d65debb2cecad9c68 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VLBW
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
13 ; Just one 32-bit run to make sure we do reasonable things for i64 cases.
14 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X32-SSE,X32-SSE2
16 declare <2 x i64> @llvm.fshr.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
17 declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
18 declare <8 x i16> @llvm.fshr.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
19 declare <16 x i8> @llvm.fshr.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
21 ;
22 ; Variable Shifts
23 ;
25 define <2 x i64> @var_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind {
26 ; SSE2-LABEL: var_funnnel_v2i64:
27 ; SSE2: # %bb.0:
28 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [63,63]
29 ; SSE2-NEXT: pxor %xmm3, %xmm3
30 ; SSE2-NEXT: psubq %xmm1, %xmm3
31 ; SSE2-NEXT: pand %xmm2, %xmm1
32 ; SSE2-NEXT: movdqa %xmm0, %xmm4
33 ; SSE2-NEXT: psrlq %xmm1, %xmm4
34 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
35 ; SSE2-NEXT: movdqa %xmm0, %xmm5
36 ; SSE2-NEXT: psrlq %xmm1, %xmm5
37 ; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
38 ; SSE2-NEXT: pand %xmm2, %xmm3
39 ; SSE2-NEXT: movdqa %xmm0, %xmm1
40 ; SSE2-NEXT: psllq %xmm3, %xmm1
41 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
42 ; SSE2-NEXT: psllq %xmm2, %xmm0
43 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
44 ; SSE2-NEXT: orpd %xmm5, %xmm0
45 ; SSE2-NEXT: retq
46 ;
47 ; SSE41-LABEL: var_funnnel_v2i64:
48 ; SSE41: # %bb.0:
49 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [63,63]
50 ; SSE41-NEXT: pxor %xmm3, %xmm3
51 ; SSE41-NEXT: psubq %xmm1, %xmm3
52 ; SSE41-NEXT: pand %xmm2, %xmm1
53 ; SSE41-NEXT: movdqa %xmm0, %xmm4
54 ; SSE41-NEXT: psrlq %xmm1, %xmm4
55 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
56 ; SSE41-NEXT: movdqa %xmm0, %xmm5
57 ; SSE41-NEXT: psrlq %xmm1, %xmm5
58 ; SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm4[0,1,2,3],xmm5[4,5,6,7]
59 ; SSE41-NEXT: pand %xmm2, %xmm3
60 ; SSE41-NEXT: movdqa %xmm0, %xmm1
61 ; SSE41-NEXT: psllq %xmm3, %xmm1
62 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
63 ; SSE41-NEXT: psllq %xmm2, %xmm0
64 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
65 ; SSE41-NEXT: por %xmm5, %xmm0
66 ; SSE41-NEXT: retq
67 ;
68 ; AVX1-LABEL: var_funnnel_v2i64:
69 ; AVX1: # %bb.0:
70 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
71 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3
72 ; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm4
73 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1]
74 ; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3
75 ; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7]
76 ; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
77 ; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1
78 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
79 ; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2
80 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
81 ; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0
82 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
83 ; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0
84 ; AVX1-NEXT: retq
85 ;
86 ; AVX2-LABEL: var_funnnel_v2i64:
87 ; AVX2: # %bb.0:
88 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
89 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3
90 ; AVX2-NEXT: vpsrlvq %xmm3, %xmm0, %xmm3
91 ; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4
92 ; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1
93 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
94 ; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0
95 ; AVX2-NEXT: vpor %xmm3, %xmm0, %xmm0
96 ; AVX2-NEXT: retq
97 ;
98 ; AVX512F-LABEL: var_funnnel_v2i64:
99 ; AVX512F: # %bb.0:
100 ; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
101 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
102 ; AVX512F-NEXT: vprorvq %zmm1, %zmm0, %zmm0
103 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
104 ; AVX512F-NEXT: vzeroupper
105 ; AVX512F-NEXT: retq
106 ;
107 ; AVX512VL-LABEL: var_funnnel_v2i64:
108 ; AVX512VL: # %bb.0:
109 ; AVX512VL-NEXT: vprorvq %xmm1, %xmm0, %xmm0
110 ; AVX512VL-NEXT: retq
111 ;
112 ; AVX512BW-LABEL: var_funnnel_v2i64:
113 ; AVX512BW: # %bb.0:
114 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
115 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
116 ; AVX512BW-NEXT: vprorvq %zmm1, %zmm0, %zmm0
117 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
118 ; AVX512BW-NEXT: vzeroupper
119 ; AVX512BW-NEXT: retq
120 ;
121 ; AVX512VLBW-LABEL: var_funnnel_v2i64:
122 ; AVX512VLBW: # %bb.0:
123 ; AVX512VLBW-NEXT: vprorvq %xmm1, %xmm0, %xmm0
124 ; AVX512VLBW-NEXT: retq
125 ;
126 ; XOP-LABEL: var_funnnel_v2i64:
127 ; XOP: # %bb.0:
128 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
129 ; XOP-NEXT: vpsubq %xmm1, %xmm2, %xmm1
130 ; XOP-NEXT: vprotq %xmm1, %xmm0, %xmm0
131 ; XOP-NEXT: retq
132 ;
133 ; X32-SSE-LABEL: var_funnnel_v2i64:
134 ; X32-SSE: # %bb.0:
135 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0]
136 ; X32-SSE-NEXT: pxor %xmm3, %xmm3
137 ; X32-SSE-NEXT: psubq %xmm1, %xmm3
138 ; X32-SSE-NEXT: pand %xmm2, %xmm1
139 ; X32-SSE-NEXT: movdqa %xmm0, %xmm4
140 ; X32-SSE-NEXT: psrlq %xmm1, %xmm4
141 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
142 ; X32-SSE-NEXT: movdqa %xmm0, %xmm5
143 ; X32-SSE-NEXT: psrlq %xmm1, %xmm5
144 ; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
145 ; X32-SSE-NEXT: pand %xmm2, %xmm3
146 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
147 ; X32-SSE-NEXT: psllq %xmm3, %xmm1
148 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
149 ; X32-SSE-NEXT: psllq %xmm2, %xmm0
150 ; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
151 ; X32-SSE-NEXT: orpd %xmm5, %xmm0
152 ; X32-SSE-NEXT: retl
153 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %amt)
154 ret <2 x i64> %res
155 }
157 define <4 x i32> @var_funnnel_v4i32(<4 x i32> %x, <4 x i32> %amt) nounwind {
158 ; SSE2-LABEL: var_funnnel_v4i32:
159 ; SSE2: # %bb.0:
160 ; SSE2-NEXT: pxor %xmm2, %xmm2
161 ; SSE2-NEXT: psubd %xmm1, %xmm2
162 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
163 ; SSE2-NEXT: pslld $23, %xmm2
164 ; SSE2-NEXT: paddd {{.*}}(%rip), %xmm2
165 ; SSE2-NEXT: cvttps2dq %xmm2, %xmm1
166 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
167 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
168 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
169 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
170 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
171 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
172 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
173 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
174 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
175 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
176 ; SSE2-NEXT: por %xmm3, %xmm0
177 ; SSE2-NEXT: retq
178 ;
179 ; SSE41-LABEL: var_funnnel_v4i32:
180 ; SSE41: # %bb.0:
181 ; SSE41-NEXT: pxor %xmm2, %xmm2
182 ; SSE41-NEXT: psubd %xmm1, %xmm2
183 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm2
184 ; SSE41-NEXT: pslld $23, %xmm2
185 ; SSE41-NEXT: paddd {{.*}}(%rip), %xmm2
186 ; SSE41-NEXT: cvttps2dq %xmm2, %xmm1
187 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
188 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
189 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
190 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
191 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
192 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
193 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
194 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
195 ; SSE41-NEXT: por %xmm1, %xmm0
196 ; SSE41-NEXT: retq
197 ;
198 ; AVX1-LABEL: var_funnnel_v4i32:
199 ; AVX1: # %bb.0:
200 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
201 ; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
202 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
203 ; AVX1-NEXT: vpslld $23, %xmm1, %xmm1
204 ; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1
205 ; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1
206 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
207 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
208 ; AVX1-NEXT: vpmuludq %xmm2, %xmm3, %xmm2
209 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
210 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
211 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
212 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
213 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
214 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
215 ; AVX1-NEXT: retq
216 ;
217 ; AVX2-LABEL: var_funnnel_v4i32:
218 ; AVX2: # %bb.0:
219 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
220 ; AVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1
221 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31]
222 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
223 ; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm2
224 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32]
225 ; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1
226 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
227 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
228 ; AVX2-NEXT: retq
229 ;
230 ; AVX512F-LABEL: var_funnnel_v4i32:
231 ; AVX512F: # %bb.0:
232 ; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
233 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
234 ; AVX512F-NEXT: vprorvd %zmm1, %zmm0, %zmm0
235 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
236 ; AVX512F-NEXT: vzeroupper
237 ; AVX512F-NEXT: retq
238 ;
239 ; AVX512VL-LABEL: var_funnnel_v4i32:
240 ; AVX512VL: # %bb.0:
241 ; AVX512VL-NEXT: vprorvd %xmm1, %xmm0, %xmm0
242 ; AVX512VL-NEXT: retq
243 ;
244 ; AVX512BW-LABEL: var_funnnel_v4i32:
245 ; AVX512BW: # %bb.0:
246 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
247 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
248 ; AVX512BW-NEXT: vprorvd %zmm1, %zmm0, %zmm0
249 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
250 ; AVX512BW-NEXT: vzeroupper
251 ; AVX512BW-NEXT: retq
252 ;
253 ; AVX512VLBW-LABEL: var_funnnel_v4i32:
254 ; AVX512VLBW: # %bb.0:
255 ; AVX512VLBW-NEXT: vprorvd %xmm1, %xmm0, %xmm0
256 ; AVX512VLBW-NEXT: retq
257 ;
258 ; XOP-LABEL: var_funnnel_v4i32:
259 ; XOP: # %bb.0:
260 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
261 ; XOP-NEXT: vpsubd %xmm1, %xmm2, %xmm1
262 ; XOP-NEXT: vprotd %xmm1, %xmm0, %xmm0
263 ; XOP-NEXT: retq
264 ;
265 ; X32-SSE-LABEL: var_funnnel_v4i32:
266 ; X32-SSE: # %bb.0:
267 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
268 ; X32-SSE-NEXT: psubd %xmm1, %xmm2
269 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
270 ; X32-SSE-NEXT: pslld $23, %xmm2
271 ; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm2
272 ; X32-SSE-NEXT: cvttps2dq %xmm2, %xmm1
273 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
274 ; X32-SSE-NEXT: pmuludq %xmm1, %xmm0
275 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
276 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
277 ; X32-SSE-NEXT: pmuludq %xmm2, %xmm1
278 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
279 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
280 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
281 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
282 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
283 ; X32-SSE-NEXT: por %xmm3, %xmm0
284 ; X32-SSE-NEXT: retl
285 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %amt)
286 ret <4 x i32> %res
287 }
289 define <8 x i16> @var_funnnel_v8i16(<8 x i16> %x, <8 x i16> %amt) nounwind {
290 ; SSE2-LABEL: var_funnnel_v8i16:
291 ; SSE2: # %bb.0:
292 ; SSE2-NEXT: pxor %xmm2, %xmm2
293 ; SSE2-NEXT: psubw %xmm1, %xmm2
294 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
295 ; SSE2-NEXT: movdqa %xmm2, %xmm1
296 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
297 ; SSE2-NEXT: pslld $23, %xmm1
298 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216]
299 ; SSE2-NEXT: paddd %xmm3, %xmm1
300 ; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
301 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
302 ; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
303 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
304 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
305 ; SSE2-NEXT: pslld $23, %xmm2
306 ; SSE2-NEXT: paddd %xmm3, %xmm2
307 ; SSE2-NEXT: cvttps2dq %xmm2, %xmm2
308 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
309 ; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
310 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
311 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
312 ; SSE2-NEXT: movdqa %xmm0, %xmm1
313 ; SSE2-NEXT: pmulhuw %xmm2, %xmm1
314 ; SSE2-NEXT: pmullw %xmm2, %xmm0
315 ; SSE2-NEXT: por %xmm1, %xmm0
316 ; SSE2-NEXT: retq
317 ;
318 ; SSE41-LABEL: var_funnnel_v8i16:
319 ; SSE41: # %bb.0:
320 ; SSE41-NEXT: pxor %xmm2, %xmm2
321 ; SSE41-NEXT: psubw %xmm1, %xmm2
322 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm2
323 ; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
324 ; SSE41-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
325 ; SSE41-NEXT: pslld $23, %xmm2
326 ; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216]
327 ; SSE41-NEXT: paddd %xmm3, %xmm2
328 ; SSE41-NEXT: cvttps2dq %xmm2, %xmm2
329 ; SSE41-NEXT: pslld $23, %xmm1
330 ; SSE41-NEXT: paddd %xmm3, %xmm1
331 ; SSE41-NEXT: cvttps2dq %xmm1, %xmm1
332 ; SSE41-NEXT: packusdw %xmm2, %xmm1
333 ; SSE41-NEXT: movdqa %xmm0, %xmm2
334 ; SSE41-NEXT: pmulhuw %xmm1, %xmm2
335 ; SSE41-NEXT: pmullw %xmm1, %xmm0
336 ; SSE41-NEXT: por %xmm2, %xmm0
337 ; SSE41-NEXT: retq
338 ;
339 ; AVX1-LABEL: var_funnnel_v8i16:
340 ; AVX1: # %bb.0:
341 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
342 ; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1
343 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
344 ; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
345 ; AVX1-NEXT: vpslld $23, %xmm2, %xmm2
346 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216]
347 ; AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2
348 ; AVX1-NEXT: vcvttps2dq %xmm2, %xmm2
349 ; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
350 ; AVX1-NEXT: vpslld $23, %xmm1, %xmm1
351 ; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1
352 ; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1
353 ; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1
354 ; AVX1-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
355 ; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0
356 ; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
357 ; AVX1-NEXT: retq
358 ;
359 ; AVX2-LABEL: var_funnnel_v8i16:
360 ; AVX2: # %bb.0:
361 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
362 ; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1
363 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
364 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
365 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
366 ; AVX2-NEXT: vpsllvd %ymm2, %ymm0, %ymm2
367 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
368 ; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2
369 ; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3]
370 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = [16,16,16,16,16,16,16,16]
371 ; AVX2-NEXT: vpsubw %xmm1, %xmm4, %xmm1
372 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
373 ; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
374 ; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0
375 ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
376 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
377 ; AVX2-NEXT: vzeroupper
378 ; AVX2-NEXT: retq
379 ;
380 ; AVX512F-LABEL: var_funnnel_v8i16:
381 ; AVX512F: # %bb.0:
382 ; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2
383 ; AVX512F-NEXT: vpsubw %xmm1, %xmm2, %xmm1
384 ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
385 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
386 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
387 ; AVX512F-NEXT: vpsllvd %ymm2, %ymm0, %ymm2
388 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
389 ; AVX512F-NEXT: vpsubw %xmm1, %xmm3, %xmm1
390 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
391 ; AVX512F-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
392 ; AVX512F-NEXT: vpor %ymm0, %ymm2, %ymm0
393 ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
394 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
395 ; AVX512F-NEXT: vzeroupper
396 ; AVX512F-NEXT: retq
397 ;
398 ; AVX512VL-LABEL: var_funnnel_v8i16:
399 ; AVX512VL: # %bb.0:
400 ; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2
401 ; AVX512VL-NEXT: vpsubw %xmm1, %xmm2, %xmm1
402 ; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
403 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
404 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
405 ; AVX512VL-NEXT: vpsllvd %ymm2, %ymm0, %ymm2
406 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
407 ; AVX512VL-NEXT: vpsubw %xmm1, %xmm3, %xmm1
408 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
409 ; AVX512VL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
410 ; AVX512VL-NEXT: vpor %ymm0, %ymm2, %ymm0
411 ; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0
412 ; AVX512VL-NEXT: vzeroupper
413 ; AVX512VL-NEXT: retq
414 ;
415 ; AVX512BW-LABEL: var_funnnel_v8i16:
416 ; AVX512BW: # %bb.0:
417 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
418 ; AVX512BW-NEXT: vpxor %xmm2, %xmm2, %xmm2
419 ; AVX512BW-NEXT: vpsubw %xmm1, %xmm2, %xmm1
420 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
421 ; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm2
422 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
423 ; AVX512BW-NEXT: vpsubw %xmm1, %xmm3, %xmm1
424 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
425 ; AVX512BW-NEXT: vpor %xmm0, %xmm2, %xmm0
426 ; AVX512BW-NEXT: vzeroupper
427 ; AVX512BW-NEXT: retq
428 ;
429 ; AVX512VLBW-LABEL: var_funnnel_v8i16:
430 ; AVX512VLBW: # %bb.0:
431 ; AVX512VLBW-NEXT: vpxor %xmm2, %xmm2, %xmm2
432 ; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm2, %xmm1
433 ; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
434 ; AVX512VLBW-NEXT: vpsllvw %xmm1, %xmm0, %xmm2
435 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
436 ; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm3, %xmm1
437 ; AVX512VLBW-NEXT: vpsrlvw %xmm1, %xmm0, %xmm0
438 ; AVX512VLBW-NEXT: vpor %xmm0, %xmm2, %xmm0
439 ; AVX512VLBW-NEXT: retq
440 ;
441 ; XOP-LABEL: var_funnnel_v8i16:
442 ; XOP: # %bb.0:
443 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
444 ; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm1
445 ; XOP-NEXT: vprotw %xmm1, %xmm0, %xmm0
446 ; XOP-NEXT: retq
447 ;
448 ; X32-SSE-LABEL: var_funnnel_v8i16:
449 ; X32-SSE: # %bb.0:
450 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
451 ; X32-SSE-NEXT: psubw %xmm1, %xmm2
452 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
453 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1
454 ; X32-SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
455 ; X32-SSE-NEXT: pslld $23, %xmm1
456 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216]
457 ; X32-SSE-NEXT: paddd %xmm3, %xmm1
458 ; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1
459 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
460 ; X32-SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
461 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
462 ; X32-SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
463 ; X32-SSE-NEXT: pslld $23, %xmm2
464 ; X32-SSE-NEXT: paddd %xmm3, %xmm2
465 ; X32-SSE-NEXT: cvttps2dq %xmm2, %xmm2
466 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
467 ; X32-SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
468 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
469 ; X32-SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
470 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
471 ; X32-SSE-NEXT: pmulhuw %xmm2, %xmm1
472 ; X32-SSE-NEXT: pmullw %xmm2, %xmm0
473 ; X32-SSE-NEXT: por %xmm1, %xmm0
474 ; X32-SSE-NEXT: retl
475 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %amt)
476 ret <8 x i16> %res
477 }
479 define <16 x i8> @var_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind {
480 ; SSE2-LABEL: var_funnnel_v16i8:
481 ; SSE2: # %bb.0:
482 ; SSE2-NEXT: movdqa %xmm0, %xmm2
483 ; SSE2-NEXT: pxor %xmm0, %xmm0
484 ; SSE2-NEXT: pxor %xmm3, %xmm3
485 ; SSE2-NEXT: psubb %xmm1, %xmm3
486 ; SSE2-NEXT: psllw $5, %xmm3
487 ; SSE2-NEXT: pxor %xmm1, %xmm1
488 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm1
489 ; SSE2-NEXT: movdqa %xmm2, %xmm4
490 ; SSE2-NEXT: psrlw $4, %xmm4
491 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm4
492 ; SSE2-NEXT: movdqa %xmm2, %xmm5
493 ; SSE2-NEXT: psllw $4, %xmm5
494 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm5
495 ; SSE2-NEXT: por %xmm4, %xmm5
496 ; SSE2-NEXT: pand %xmm1, %xmm5
497 ; SSE2-NEXT: pandn %xmm2, %xmm1
498 ; SSE2-NEXT: por %xmm5, %xmm1
499 ; SSE2-NEXT: movdqa %xmm1, %xmm2
500 ; SSE2-NEXT: psrlw $6, %xmm2
501 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
502 ; SSE2-NEXT: movdqa %xmm1, %xmm4
503 ; SSE2-NEXT: psllw $2, %xmm4
504 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm4
505 ; SSE2-NEXT: por %xmm2, %xmm4
506 ; SSE2-NEXT: paddb %xmm3, %xmm3
507 ; SSE2-NEXT: pxor %xmm2, %xmm2
508 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm2
509 ; SSE2-NEXT: pand %xmm2, %xmm4
510 ; SSE2-NEXT: pandn %xmm1, %xmm2
511 ; SSE2-NEXT: por %xmm4, %xmm2
512 ; SSE2-NEXT: movdqa %xmm2, %xmm1
513 ; SSE2-NEXT: paddb %xmm2, %xmm1
514 ; SSE2-NEXT: movdqa %xmm2, %xmm4
515 ; SSE2-NEXT: psrlw $7, %xmm4
516 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm4
517 ; SSE2-NEXT: por %xmm1, %xmm4
518 ; SSE2-NEXT: paddb %xmm3, %xmm3
519 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm0
520 ; SSE2-NEXT: pand %xmm0, %xmm4
521 ; SSE2-NEXT: pandn %xmm2, %xmm0
522 ; SSE2-NEXT: por %xmm4, %xmm0
523 ; SSE2-NEXT: retq
524 ;
525 ; SSE41-LABEL: var_funnnel_v16i8:
526 ; SSE41: # %bb.0:
527 ; SSE41-NEXT: movdqa %xmm0, %xmm2
528 ; SSE41-NEXT: psrlw $4, %xmm0
529 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm0
530 ; SSE41-NEXT: movdqa %xmm2, %xmm3
531 ; SSE41-NEXT: psllw $4, %xmm3
532 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
533 ; SSE41-NEXT: por %xmm0, %xmm3
534 ; SSE41-NEXT: pxor %xmm0, %xmm0
535 ; SSE41-NEXT: psubb %xmm1, %xmm0
536 ; SSE41-NEXT: psllw $5, %xmm0
537 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
538 ; SSE41-NEXT: movdqa %xmm2, %xmm1
539 ; SSE41-NEXT: psrlw $6, %xmm1
540 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm1
541 ; SSE41-NEXT: movdqa %xmm2, %xmm3
542 ; SSE41-NEXT: psllw $2, %xmm3
543 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
544 ; SSE41-NEXT: por %xmm1, %xmm3
545 ; SSE41-NEXT: paddb %xmm0, %xmm0
546 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
547 ; SSE41-NEXT: movdqa %xmm2, %xmm1
548 ; SSE41-NEXT: paddb %xmm2, %xmm1
549 ; SSE41-NEXT: movdqa %xmm2, %xmm3
550 ; SSE41-NEXT: psrlw $7, %xmm3
551 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
552 ; SSE41-NEXT: por %xmm1, %xmm3
553 ; SSE41-NEXT: paddb %xmm0, %xmm0
554 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
555 ; SSE41-NEXT: movdqa %xmm2, %xmm0
556 ; SSE41-NEXT: retq
557 ;
558 ; AVX-LABEL: var_funnnel_v16i8:
559 ; AVX: # %bb.0:
560 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm2
561 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2
562 ; AVX-NEXT: vpsllw $4, %xmm0, %xmm3
563 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3
564 ; AVX-NEXT: vpor %xmm2, %xmm3, %xmm2
565 ; AVX-NEXT: vpxor %xmm3, %xmm3, %xmm3
566 ; AVX-NEXT: vpsubb %xmm1, %xmm3, %xmm1
567 ; AVX-NEXT: vpsllw $5, %xmm1, %xmm1
568 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
569 ; AVX-NEXT: vpsrlw $6, %xmm0, %xmm2
570 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2
571 ; AVX-NEXT: vpsllw $2, %xmm0, %xmm3
572 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3
573 ; AVX-NEXT: vpor %xmm2, %xmm3, %xmm2
574 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
575 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
576 ; AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm2
577 ; AVX-NEXT: vpsrlw $7, %xmm0, %xmm3
578 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3
579 ; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2
580 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
581 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
582 ; AVX-NEXT: retq
583 ;
584 ; AVX512F-LABEL: var_funnnel_v16i8:
585 ; AVX512F: # %bb.0:
586 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
587 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3
588 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
589 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
590 ; AVX512F-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
591 ; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4
592 ; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1
593 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1
594 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
595 ; AVX512F-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
596 ; AVX512F-NEXT: vpord %zmm3, %zmm0, %zmm0
597 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
598 ; AVX512F-NEXT: vzeroupper
599 ; AVX512F-NEXT: retq
600 ;
601 ; AVX512VL-LABEL: var_funnnel_v16i8:
602 ; AVX512VL: # %bb.0:
603 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
604 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3
605 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
606 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
607 ; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
608 ; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4
609 ; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1
610 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1
611 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
612 ; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
613 ; AVX512VL-NEXT: vpord %zmm3, %zmm0, %zmm0
614 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
615 ; AVX512VL-NEXT: vzeroupper
616 ; AVX512VL-NEXT: retq
617 ;
618 ; AVX512BW-LABEL: var_funnnel_v16i8:
619 ; AVX512BW: # %bb.0:
620 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
621 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
622 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3
623 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
624 ; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3
625 ; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4
626 ; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
627 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1
628 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
629 ; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
630 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0
631 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
632 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
633 ; AVX512BW-NEXT: vzeroupper
634 ; AVX512BW-NEXT: retq
635 ;
636 ; AVX512VLBW-LABEL: var_funnnel_v16i8:
637 ; AVX512VLBW: # %bb.0:
638 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
639 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3
640 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
641 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
642 ; AVX512VLBW-NEXT: vpsrlvw %ymm3, %ymm0, %ymm3
643 ; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4
644 ; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
645 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1
646 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
647 ; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm0, %ymm0
648 ; AVX512VLBW-NEXT: vpor %ymm3, %ymm0, %ymm0
649 ; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
650 ; AVX512VLBW-NEXT: vzeroupper
651 ; AVX512VLBW-NEXT: retq
652 ;
653 ; XOP-LABEL: var_funnnel_v16i8:
654 ; XOP: # %bb.0:
655 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
656 ; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1
657 ; XOP-NEXT: vprotb %xmm1, %xmm0, %xmm0
658 ; XOP-NEXT: retq
659 ;
660 ; X32-SSE-LABEL: var_funnnel_v16i8:
661 ; X32-SSE: # %bb.0:
662 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
663 ; X32-SSE-NEXT: pxor %xmm0, %xmm0
664 ; X32-SSE-NEXT: pxor %xmm3, %xmm3
665 ; X32-SSE-NEXT: psubb %xmm1, %xmm3
666 ; X32-SSE-NEXT: psllw $5, %xmm3
667 ; X32-SSE-NEXT: pxor %xmm1, %xmm1
668 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm1
669 ; X32-SSE-NEXT: movdqa %xmm2, %xmm4
670 ; X32-SSE-NEXT: psrlw $4, %xmm4
671 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4
672 ; X32-SSE-NEXT: movdqa %xmm2, %xmm5
673 ; X32-SSE-NEXT: psllw $4, %xmm5
674 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm5
675 ; X32-SSE-NEXT: por %xmm4, %xmm5
676 ; X32-SSE-NEXT: pand %xmm1, %xmm5
677 ; X32-SSE-NEXT: pandn %xmm2, %xmm1
678 ; X32-SSE-NEXT: por %xmm5, %xmm1
679 ; X32-SSE-NEXT: movdqa %xmm1, %xmm2
680 ; X32-SSE-NEXT: psrlw $6, %xmm2
681 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
682 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
683 ; X32-SSE-NEXT: psllw $2, %xmm4
684 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4
685 ; X32-SSE-NEXT: por %xmm2, %xmm4
686 ; X32-SSE-NEXT: paddb %xmm3, %xmm3
687 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
688 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm2
689 ; X32-SSE-NEXT: pand %xmm2, %xmm4
690 ; X32-SSE-NEXT: pandn %xmm1, %xmm2
691 ; X32-SSE-NEXT: por %xmm4, %xmm2
692 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1
693 ; X32-SSE-NEXT: paddb %xmm2, %xmm1
694 ; X32-SSE-NEXT: movdqa %xmm2, %xmm4
695 ; X32-SSE-NEXT: psrlw $7, %xmm4
696 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4
697 ; X32-SSE-NEXT: por %xmm1, %xmm4
698 ; X32-SSE-NEXT: paddb %xmm3, %xmm3
699 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm0
700 ; X32-SSE-NEXT: pand %xmm0, %xmm4
701 ; X32-SSE-NEXT: pandn %xmm2, %xmm0
702 ; X32-SSE-NEXT: por %xmm4, %xmm0
703 ; X32-SSE-NEXT: retl
704 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %amt)
705 ret <16 x i8> %res
706 }
708 ;
709 ; Uniform Variable Shifts
710 ;
712 define <2 x i64> @splatvar_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind {
713 ; SSE-LABEL: splatvar_funnnel_v2i64:
714 ; SSE: # %bb.0:
715 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
716 ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,63]
717 ; SSE-NEXT: pxor %xmm3, %xmm3
718 ; SSE-NEXT: psubq %xmm1, %xmm3
719 ; SSE-NEXT: pand %xmm2, %xmm1
720 ; SSE-NEXT: movdqa %xmm0, %xmm4
721 ; SSE-NEXT: psrlq %xmm1, %xmm4
722 ; SSE-NEXT: pand %xmm2, %xmm3
723 ; SSE-NEXT: psllq %xmm3, %xmm0
724 ; SSE-NEXT: por %xmm4, %xmm0
725 ; SSE-NEXT: retq
726 ;
727 ; AVX1-LABEL: splatvar_funnnel_v2i64:
728 ; AVX1: # %bb.0:
729 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
730 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
731 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3
732 ; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3
733 ; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
734 ; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1
735 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
736 ; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0
737 ; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0
738 ; AVX1-NEXT: retq
739 ;
740 ; AVX2-LABEL: splatvar_funnnel_v2i64:
741 ; AVX2: # %bb.0:
742 ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1
743 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
744 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3
745 ; AVX2-NEXT: vpsrlq %xmm3, %xmm0, %xmm3
746 ; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4
747 ; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1
748 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
749 ; AVX2-NEXT: vpsllq %xmm1, %xmm0, %xmm0
750 ; AVX2-NEXT: vpor %xmm3, %xmm0, %xmm0
751 ; AVX2-NEXT: retq
752 ;
753 ; AVX512F-LABEL: splatvar_funnnel_v2i64:
754 ; AVX512F: # %bb.0:
755 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
756 ; AVX512F-NEXT: vpbroadcastq %xmm1, %xmm1
757 ; AVX512F-NEXT: vprorvq %zmm1, %zmm0, %zmm0
758 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
759 ; AVX512F-NEXT: vzeroupper
760 ; AVX512F-NEXT: retq
761 ;
762 ; AVX512VL-LABEL: splatvar_funnnel_v2i64:
763 ; AVX512VL: # %bb.0:
764 ; AVX512VL-NEXT: vpbroadcastq %xmm1, %xmm1
765 ; AVX512VL-NEXT: vprorvq %xmm1, %xmm0, %xmm0
766 ; AVX512VL-NEXT: retq
767 ;
768 ; AVX512BW-LABEL: splatvar_funnnel_v2i64:
769 ; AVX512BW: # %bb.0:
770 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
771 ; AVX512BW-NEXT: vpbroadcastq %xmm1, %xmm1
772 ; AVX512BW-NEXT: vprorvq %zmm1, %zmm0, %zmm0
773 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
774 ; AVX512BW-NEXT: vzeroupper
775 ; AVX512BW-NEXT: retq
776 ;
777 ; AVX512VLBW-LABEL: splatvar_funnnel_v2i64:
778 ; AVX512VLBW: # %bb.0:
779 ; AVX512VLBW-NEXT: vpbroadcastq %xmm1, %xmm1
780 ; AVX512VLBW-NEXT: vprorvq %xmm1, %xmm0, %xmm0
781 ; AVX512VLBW-NEXT: retq
782 ;
783 ; XOPAVX1-LABEL: splatvar_funnnel_v2i64:
784 ; XOPAVX1: # %bb.0:
785 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
786 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
787 ; XOPAVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm1
788 ; XOPAVX1-NEXT: vprotq %xmm1, %xmm0, %xmm0
789 ; XOPAVX1-NEXT: retq
790 ;
791 ; XOPAVX2-LABEL: splatvar_funnnel_v2i64:
792 ; XOPAVX2: # %bb.0:
793 ; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1
794 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
795 ; XOPAVX2-NEXT: vpsubq %xmm1, %xmm2, %xmm1
796 ; XOPAVX2-NEXT: vprotq %xmm1, %xmm0, %xmm0
797 ; XOPAVX2-NEXT: retq
798 ;
799 ; X32-SSE-LABEL: splatvar_funnnel_v2i64:
800 ; X32-SSE: # %bb.0:
801 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
802 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0]
803 ; X32-SSE-NEXT: pxor %xmm3, %xmm3
804 ; X32-SSE-NEXT: psubq %xmm1, %xmm3
805 ; X32-SSE-NEXT: pand %xmm2, %xmm1
806 ; X32-SSE-NEXT: movdqa %xmm0, %xmm4
807 ; X32-SSE-NEXT: psrlq %xmm1, %xmm4
808 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
809 ; X32-SSE-NEXT: movdqa %xmm0, %xmm5
810 ; X32-SSE-NEXT: psrlq %xmm1, %xmm5
811 ; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
812 ; X32-SSE-NEXT: pand %xmm2, %xmm3
813 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
814 ; X32-SSE-NEXT: psllq %xmm3, %xmm1
815 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
816 ; X32-SSE-NEXT: psllq %xmm2, %xmm0
817 ; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
818 ; X32-SSE-NEXT: orpd %xmm5, %xmm0
819 ; X32-SSE-NEXT: retl
820 %splat = shufflevector <2 x i64> %amt, <2 x i64> undef, <2 x i32> zeroinitializer
821 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %splat)
822 ret <2 x i64> %res
823 }
825 define <4 x i32> @splatvar_funnnel_v4i32(<4 x i32> %x, <4 x i32> %amt) nounwind {
826 ; SSE2-LABEL: splatvar_funnnel_v4i32:
827 ; SSE2: # %bb.0:
828 ; SSE2-NEXT: movd %xmm1, %eax
829 ; SSE2-NEXT: negl %eax
830 ; SSE2-NEXT: andl $31, %eax
831 ; SSE2-NEXT: movd %eax, %xmm1
832 ; SSE2-NEXT: movdqa %xmm0, %xmm2
833 ; SSE2-NEXT: pslld %xmm1, %xmm2
834 ; SSE2-NEXT: movl $32, %ecx
835 ; SSE2-NEXT: subl %eax, %ecx
836 ; SSE2-NEXT: movd %ecx, %xmm1
837 ; SSE2-NEXT: psrld %xmm1, %xmm0
838 ; SSE2-NEXT: por %xmm2, %xmm0
839 ; SSE2-NEXT: retq
840 ;
841 ; SSE41-LABEL: splatvar_funnnel_v4i32:
842 ; SSE41: # %bb.0:
843 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
844 ; SSE41-NEXT: pxor %xmm2, %xmm2
845 ; SSE41-NEXT: psubd %xmm1, %xmm2
846 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm2
847 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero
848 ; SSE41-NEXT: movdqa %xmm0, %xmm3
849 ; SSE41-NEXT: pslld %xmm1, %xmm3
850 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [32,32,32,32]
851 ; SSE41-NEXT: psubd %xmm2, %xmm1
852 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
853 ; SSE41-NEXT: psrld %xmm1, %xmm0
854 ; SSE41-NEXT: por %xmm3, %xmm0
855 ; SSE41-NEXT: retq
856 ;
857 ; AVX1-LABEL: splatvar_funnnel_v4i32:
858 ; AVX1: # %bb.0:
859 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
860 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
861 ; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
862 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
863 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero
864 ; AVX1-NEXT: vpslld %xmm2, %xmm0, %xmm2
865 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [32,32,32,32]
866 ; AVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm1
867 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
868 ; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0
869 ; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
870 ; AVX1-NEXT: retq
871 ;
872 ; AVX2-LABEL: splatvar_funnnel_v4i32:
873 ; AVX2: # %bb.0:
874 ; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1
875 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
876 ; AVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1
877 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31]
878 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
879 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero
880 ; AVX2-NEXT: vpslld %xmm2, %xmm0, %xmm2
881 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32]
882 ; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1
883 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
884 ; AVX2-NEXT: vpsrld %xmm1, %xmm0, %xmm0
885 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
886 ; AVX2-NEXT: retq
887 ;
888 ; AVX512F-LABEL: splatvar_funnnel_v4i32:
889 ; AVX512F: # %bb.0:
890 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
891 ; AVX512F-NEXT: vpbroadcastd %xmm1, %xmm1
892 ; AVX512F-NEXT: vprorvd %zmm1, %zmm0, %zmm0
893 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
894 ; AVX512F-NEXT: vzeroupper
895 ; AVX512F-NEXT: retq
896 ;
897 ; AVX512VL-LABEL: splatvar_funnnel_v4i32:
898 ; AVX512VL: # %bb.0:
899 ; AVX512VL-NEXT: vpbroadcastd %xmm1, %xmm1
900 ; AVX512VL-NEXT: vprorvd %xmm1, %xmm0, %xmm0
901 ; AVX512VL-NEXT: retq
902 ;
903 ; AVX512BW-LABEL: splatvar_funnnel_v4i32:
904 ; AVX512BW: # %bb.0:
905 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
906 ; AVX512BW-NEXT: vpbroadcastd %xmm1, %xmm1
907 ; AVX512BW-NEXT: vprorvd %zmm1, %zmm0, %zmm0
908 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
909 ; AVX512BW-NEXT: vzeroupper
910 ; AVX512BW-NEXT: retq
911 ;
912 ; AVX512VLBW-LABEL: splatvar_funnnel_v4i32:
913 ; AVX512VLBW: # %bb.0:
914 ; AVX512VLBW-NEXT: vpbroadcastd %xmm1, %xmm1
915 ; AVX512VLBW-NEXT: vprorvd %xmm1, %xmm0, %xmm0
916 ; AVX512VLBW-NEXT: retq
917 ;
918 ; XOPAVX1-LABEL: splatvar_funnnel_v4i32:
919 ; XOPAVX1: # %bb.0:
920 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
921 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
922 ; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
923 ; XOPAVX1-NEXT: vprotd %xmm1, %xmm0, %xmm0
924 ; XOPAVX1-NEXT: retq
925 ;
926 ; XOPAVX2-LABEL: splatvar_funnnel_v4i32:
927 ; XOPAVX2: # %bb.0:
928 ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1
929 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
930 ; XOPAVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1
931 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0
932 ; XOPAVX2-NEXT: retq
933 ;
934 ; X32-SSE-LABEL: splatvar_funnnel_v4i32:
935 ; X32-SSE: # %bb.0:
936 ; X32-SSE-NEXT: movd %xmm1, %eax
937 ; X32-SSE-NEXT: negl %eax
938 ; X32-SSE-NEXT: andl $31, %eax
939 ; X32-SSE-NEXT: movd %eax, %xmm1
940 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
941 ; X32-SSE-NEXT: pslld %xmm1, %xmm2
942 ; X32-SSE-NEXT: movl $32, %ecx
943 ; X32-SSE-NEXT: subl %eax, %ecx
944 ; X32-SSE-NEXT: movd %ecx, %xmm1
945 ; X32-SSE-NEXT: psrld %xmm1, %xmm0
946 ; X32-SSE-NEXT: por %xmm2, %xmm0
947 ; X32-SSE-NEXT: retl
948 %splat = shufflevector <4 x i32> %amt, <4 x i32> undef, <4 x i32> zeroinitializer
949 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %splat)
950 ret <4 x i32> %res
951 }
953 define <8 x i16> @splatvar_funnnel_v8i16(<8 x i16> %x, <8 x i16> %amt) nounwind {
954 ; SSE2-LABEL: splatvar_funnnel_v8i16:
955 ; SSE2: # %bb.0:
956 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
957 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
958 ; SSE2-NEXT: pxor %xmm2, %xmm2
959 ; SSE2-NEXT: psubw %xmm1, %xmm2
960 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
961 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
962 ; SSE2-NEXT: psubw %xmm2, %xmm1
963 ; SSE2-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1]
964 ; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
965 ; SSE2-NEXT: movdqa %xmm0, %xmm3
966 ; SSE2-NEXT: psllw %xmm2, %xmm3
967 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
968 ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
969 ; SSE2-NEXT: psrlw %xmm1, %xmm0
970 ; SSE2-NEXT: por %xmm3, %xmm0
971 ; SSE2-NEXT: retq
972 ;
973 ; SSE41-LABEL: splatvar_funnnel_v8i16:
974 ; SSE41: # %bb.0:
975 ; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
976 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
977 ; SSE41-NEXT: pxor %xmm2, %xmm2
978 ; SSE41-NEXT: psubw %xmm1, %xmm2
979 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm2
980 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero
981 ; SSE41-NEXT: movdqa %xmm0, %xmm3
982 ; SSE41-NEXT: psllw %xmm1, %xmm3
983 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
984 ; SSE41-NEXT: psubw %xmm2, %xmm1
985 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
986 ; SSE41-NEXT: psrlw %xmm1, %xmm0
987 ; SSE41-NEXT: por %xmm3, %xmm0
988 ; SSE41-NEXT: retq
989 ;
990 ; AVX1-LABEL: splatvar_funnnel_v8i16:
991 ; AVX1: # %bb.0:
992 ; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
993 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
994 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
995 ; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1
996 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
997 ; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
998 ; AVX1-NEXT: vpsllw %xmm2, %xmm0, %xmm2
999 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
1000 ; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1
1001 ; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1002 ; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1003 ; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
1004 ; AVX1-NEXT: retq
1005 ;
1006 ; AVX2-LABEL: splatvar_funnnel_v8i16:
1007 ; AVX2: # %bb.0:
1008 ; AVX2-NEXT: vpbroadcastw %xmm1, %xmm1
1009 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1010 ; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1011 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1012 ; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1013 ; AVX2-NEXT: vpsllw %xmm2, %xmm0, %xmm2
1014 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
1015 ; AVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm1
1016 ; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1017 ; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1018 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
1019 ; AVX2-NEXT: retq
1020 ;
1021 ; AVX512-LABEL: splatvar_funnnel_v8i16:
1022 ; AVX512: # %bb.0:
1023 ; AVX512-NEXT: vpbroadcastw %xmm1, %xmm1
1024 ; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
1025 ; AVX512-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1026 ; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1027 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1028 ; AVX512-NEXT: vpsllw %xmm2, %xmm0, %xmm2
1029 ; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
1030 ; AVX512-NEXT: vpsubw %xmm1, %xmm3, %xmm1
1031 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1032 ; AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1033 ; AVX512-NEXT: vpor %xmm0, %xmm2, %xmm0
1034 ; AVX512-NEXT: retq
1035 ;
1036 ; XOPAVX1-LABEL: splatvar_funnnel_v8i16:
1037 ; XOPAVX1: # %bb.0:
1038 ; XOPAVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1039 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1040 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1041 ; XOPAVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1042 ; XOPAVX1-NEXT: vprotw %xmm1, %xmm0, %xmm0
1043 ; XOPAVX1-NEXT: retq
1044 ;
1045 ; XOPAVX2-LABEL: splatvar_funnnel_v8i16:
1046 ; XOPAVX2: # %bb.0:
1047 ; XOPAVX2-NEXT: vpbroadcastw %xmm1, %xmm1
1048 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1049 ; XOPAVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1050 ; XOPAVX2-NEXT: vprotw %xmm1, %xmm0, %xmm0
1051 ; XOPAVX2-NEXT: retq
1052 ;
1053 ; X32-SSE-LABEL: splatvar_funnnel_v8i16:
1054 ; X32-SSE: # %bb.0:
1055 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1056 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1057 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
1058 ; X32-SSE-NEXT: psubw %xmm1, %xmm2
1059 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
1060 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
1061 ; X32-SSE-NEXT: psubw %xmm2, %xmm1
1062 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1]
1063 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1064 ; X32-SSE-NEXT: movdqa %xmm0, %xmm3
1065 ; X32-SSE-NEXT: psllw %xmm2, %xmm3
1066 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
1067 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1068 ; X32-SSE-NEXT: psrlw %xmm1, %xmm0
1069 ; X32-SSE-NEXT: por %xmm3, %xmm0
1070 ; X32-SSE-NEXT: retl
1071 %splat = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> zeroinitializer
1072 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %splat)
1073 ret <8 x i16> %res
1074 }
1076 define <16 x i8> @splatvar_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind {
1077 ; SSE2-LABEL: splatvar_funnnel_v16i8:
1078 ; SSE2: # %bb.0:
1079 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1080 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1081 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1082 ; SSE2-NEXT: pxor %xmm2, %xmm2
1083 ; SSE2-NEXT: psubb %xmm1, %xmm2
1084 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
1085 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1086 ; SSE2-NEXT: psubb %xmm2, %xmm3
1087 ; SSE2-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0]
1088 ; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1089 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1090 ; SSE2-NEXT: psllw %xmm2, %xmm1
1091 ; SSE2-NEXT: pcmpeqd %xmm4, %xmm4
1092 ; SSE2-NEXT: pcmpeqd %xmm5, %xmm5
1093 ; SSE2-NEXT: psllw %xmm2, %xmm5
1094 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1095 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm5[0,0,2,3,4,5,6,7]
1096 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1097 ; SSE2-NEXT: pand %xmm2, %xmm1
1098 ; SSE2-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0]
1099 ; SSE2-NEXT: psrldq {{.*#+}} xmm3 = xmm3[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1100 ; SSE2-NEXT: psrlw %xmm3, %xmm0
1101 ; SSE2-NEXT: psrlw %xmm3, %xmm4
1102 ; SSE2-NEXT: psrlw $8, %xmm4
1103 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1104 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm4[0,0,2,3,4,5,6,7]
1105 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1106 ; SSE2-NEXT: pand %xmm0, %xmm2
1107 ; SSE2-NEXT: por %xmm2, %xmm1
1108 ; SSE2-NEXT: movdqa %xmm1, %xmm0
1109 ; SSE2-NEXT: retq
1110 ;
1111 ; SSE41-LABEL: splatvar_funnnel_v16i8:
1112 ; SSE41: # %bb.0:
1113 ; SSE41-NEXT: pxor %xmm2, %xmm2
1114 ; SSE41-NEXT: pshufb %xmm2, %xmm1
1115 ; SSE41-NEXT: pxor %xmm3, %xmm3
1116 ; SSE41-NEXT: psubb %xmm1, %xmm3
1117 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
1118 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm4 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero
1119 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1120 ; SSE41-NEXT: psllw %xmm4, %xmm1
1121 ; SSE41-NEXT: pcmpeqd %xmm5, %xmm5
1122 ; SSE41-NEXT: pcmpeqd %xmm6, %xmm6
1123 ; SSE41-NEXT: psllw %xmm4, %xmm6
1124 ; SSE41-NEXT: pshufb %xmm2, %xmm6
1125 ; SSE41-NEXT: pand %xmm6, %xmm1
1126 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1127 ; SSE41-NEXT: psubb %xmm3, %xmm2
1128 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
1129 ; SSE41-NEXT: psrlw %xmm2, %xmm0
1130 ; SSE41-NEXT: psrlw %xmm2, %xmm5
1131 ; SSE41-NEXT: pshufb {{.*#+}} xmm5 = xmm5[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1132 ; SSE41-NEXT: pand %xmm0, %xmm5
1133 ; SSE41-NEXT: por %xmm5, %xmm1
1134 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1135 ; SSE41-NEXT: retq
1136 ;
1137 ; AVX1-LABEL: splatvar_funnnel_v16i8:
1138 ; AVX1: # %bb.0:
1139 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1140 ; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1141 ; AVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1142 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1143 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1144 ; AVX1-NEXT: vpsllw %xmm3, %xmm0, %xmm4
1145 ; AVX1-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5
1146 ; AVX1-NEXT: vpsllw %xmm3, %xmm5, %xmm3
1147 ; AVX1-NEXT: vpshufb %xmm2, %xmm3, %xmm2
1148 ; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2
1149 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1150 ; AVX1-NEXT: vpsubb %xmm1, %xmm3, %xmm1
1151 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1152 ; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1153 ; AVX1-NEXT: vpsrlw %xmm1, %xmm5, %xmm1
1154 ; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1155 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
1156 ; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
1157 ; AVX1-NEXT: retq
1158 ;
1159 ; AVX2-LABEL: splatvar_funnnel_v16i8:
1160 ; AVX2: # %bb.0:
1161 ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1162 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1163 ; AVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1164 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1165 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1166 ; AVX2-NEXT: vpsllw %xmm2, %xmm0, %xmm3
1167 ; AVX2-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
1168 ; AVX2-NEXT: vpsllw %xmm2, %xmm4, %xmm2
1169 ; AVX2-NEXT: vpbroadcastb %xmm2, %xmm2
1170 ; AVX2-NEXT: vpand %xmm2, %xmm3, %xmm2
1171 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1172 ; AVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm1
1173 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1174 ; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1175 ; AVX2-NEXT: vpsrlw %xmm1, %xmm4, %xmm1
1176 ; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
1177 ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1178 ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
1179 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
1180 ; AVX2-NEXT: retq
1181 ;
1182 ; AVX512F-LABEL: splatvar_funnnel_v16i8:
1183 ; AVX512F: # %bb.0:
1184 ; AVX512F-NEXT: vpbroadcastb %xmm1, %xmm1
1185 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1186 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3
1187 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
1188 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1189 ; AVX512F-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
1190 ; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4
1191 ; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1192 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1
1193 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
1194 ; AVX512F-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
1195 ; AVX512F-NEXT: vpord %zmm3, %zmm0, %zmm0
1196 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
1197 ; AVX512F-NEXT: vzeroupper
1198 ; AVX512F-NEXT: retq
1199 ;
1200 ; AVX512VL-LABEL: splatvar_funnnel_v16i8:
1201 ; AVX512VL: # %bb.0:
1202 ; AVX512VL-NEXT: vpbroadcastb %xmm1, %xmm1
1203 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1204 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3
1205 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
1206 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1207 ; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
1208 ; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4
1209 ; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1210 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1
1211 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
1212 ; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
1213 ; AVX512VL-NEXT: vpord %zmm3, %zmm0, %zmm0
1214 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
1215 ; AVX512VL-NEXT: vzeroupper
1216 ; AVX512VL-NEXT: retq
1217 ;
1218 ; AVX512BW-LABEL: splatvar_funnnel_v16i8:
1219 ; AVX512BW: # %bb.0:
1220 ; AVX512BW-NEXT: vpbroadcastb %xmm1, %xmm1
1221 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1222 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1223 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3
1224 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
1225 ; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3
1226 ; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4
1227 ; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1228 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1
1229 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
1230 ; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
1231 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0
1232 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1233 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1234 ; AVX512BW-NEXT: vzeroupper
1235 ; AVX512BW-NEXT: retq
1236 ;
1237 ; AVX512VLBW-LABEL: splatvar_funnnel_v16i8:
1238 ; AVX512VLBW: # %bb.0:
1239 ; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %xmm1
1240 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1241 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3
1242 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
1243 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1244 ; AVX512VLBW-NEXT: vpsrlvw %ymm3, %ymm0, %ymm3
1245 ; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4
1246 ; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1247 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1
1248 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
1249 ; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm0, %ymm0
1250 ; AVX512VLBW-NEXT: vpor %ymm3, %ymm0, %ymm0
1251 ; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
1252 ; AVX512VLBW-NEXT: vzeroupper
1253 ; AVX512VLBW-NEXT: retq
1254 ;
1255 ; XOPAVX1-LABEL: splatvar_funnnel_v16i8:
1256 ; XOPAVX1: # %bb.0:
1257 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1258 ; XOPAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1259 ; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1260 ; XOPAVX1-NEXT: vprotb %xmm1, %xmm0, %xmm0
1261 ; XOPAVX1-NEXT: retq
1262 ;
1263 ; XOPAVX2-LABEL: splatvar_funnnel_v16i8:
1264 ; XOPAVX2: # %bb.0:
1265 ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1266 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1267 ; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1268 ; XOPAVX2-NEXT: vprotb %xmm1, %xmm0, %xmm0
1269 ; XOPAVX2-NEXT: retq
1270 ;
1271 ; X32-SSE-LABEL: splatvar_funnnel_v16i8:
1272 ; X32-SSE: # %bb.0:
1273 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1274 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1275 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1276 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
1277 ; X32-SSE-NEXT: psubb %xmm1, %xmm2
1278 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
1279 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1280 ; X32-SSE-NEXT: psubb %xmm2, %xmm3
1281 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0]
1282 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1283 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1284 ; X32-SSE-NEXT: psllw %xmm2, %xmm1
1285 ; X32-SSE-NEXT: pcmpeqd %xmm4, %xmm4
1286 ; X32-SSE-NEXT: pcmpeqd %xmm5, %xmm5
1287 ; X32-SSE-NEXT: psllw %xmm2, %xmm5
1288 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1289 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm5[0,0,2,3,4,5,6,7]
1290 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1291 ; X32-SSE-NEXT: pand %xmm2, %xmm1
1292 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0]
1293 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm3 = xmm3[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1294 ; X32-SSE-NEXT: psrlw %xmm3, %xmm0
1295 ; X32-SSE-NEXT: psrlw %xmm3, %xmm4
1296 ; X32-SSE-NEXT: psrlw $8, %xmm4
1297 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1298 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm4[0,0,2,3,4,5,6,7]
1299 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1300 ; X32-SSE-NEXT: pand %xmm0, %xmm2
1301 ; X32-SSE-NEXT: por %xmm2, %xmm1
1302 ; X32-SSE-NEXT: movdqa %xmm1, %xmm0
1303 ; X32-SSE-NEXT: retl
1304 %splat = shufflevector <16 x i8> %amt, <16 x i8> undef, <16 x i32> zeroinitializer
1305 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %splat)
1306 ret <16 x i8> %res
1307 }
1309 ;
1310 ; Constant Shifts
1311 ;
1313 define <2 x i64> @constant_funnnel_v2i64(<2 x i64> %x) nounwind {
1314 ; SSE2-LABEL: constant_funnnel_v2i64:
1315 ; SSE2: # %bb.0:
1316 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1317 ; SSE2-NEXT: psrlq $4, %xmm1
1318 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1319 ; SSE2-NEXT: psrlq $14, %xmm2
1320 ; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1]
1321 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1322 ; SSE2-NEXT: psllq $60, %xmm1
1323 ; SSE2-NEXT: psllq $50, %xmm0
1324 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1325 ; SSE2-NEXT: orpd %xmm2, %xmm0
1326 ; SSE2-NEXT: retq
1327 ;
1328 ; SSE41-LABEL: constant_funnnel_v2i64:
1329 ; SSE41: # %bb.0:
1330 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1331 ; SSE41-NEXT: psrlq $14, %xmm1
1332 ; SSE41-NEXT: movdqa %xmm0, %xmm2
1333 ; SSE41-NEXT: psrlq $4, %xmm2
1334 ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7]
1335 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1336 ; SSE41-NEXT: psllq $50, %xmm1
1337 ; SSE41-NEXT: psllq $60, %xmm0
1338 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
1339 ; SSE41-NEXT: por %xmm2, %xmm0
1340 ; SSE41-NEXT: retq
1341 ;
1342 ; AVX1-LABEL: constant_funnnel_v2i64:
1343 ; AVX1: # %bb.0:
1344 ; AVX1-NEXT: vpsrlq $14, %xmm0, %xmm1
1345 ; AVX1-NEXT: vpsrlq $4, %xmm0, %xmm2
1346 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
1347 ; AVX1-NEXT: vpsllq $50, %xmm0, %xmm2
1348 ; AVX1-NEXT: vpsllq $60, %xmm0, %xmm0
1349 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
1350 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1351 ; AVX1-NEXT: retq
1352 ;
1353 ; AVX2-LABEL: constant_funnnel_v2i64:
1354 ; AVX2: # %bb.0:
1355 ; AVX2-NEXT: vpsrlvq {{.*}}(%rip), %xmm0, %xmm1
1356 ; AVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0
1357 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1358 ; AVX2-NEXT: retq
1359 ;
1360 ; AVX512F-LABEL: constant_funnnel_v2i64:
1361 ; AVX512F: # %bb.0:
1362 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1363 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = [4,14]
1364 ; AVX512F-NEXT: vprorvq %zmm1, %zmm0, %zmm0
1365 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1366 ; AVX512F-NEXT: vzeroupper
1367 ; AVX512F-NEXT: retq
1368 ;
1369 ; AVX512VL-LABEL: constant_funnnel_v2i64:
1370 ; AVX512VL: # %bb.0:
1371 ; AVX512VL-NEXT: vprorvq {{.*}}(%rip), %xmm0, %xmm0
1372 ; AVX512VL-NEXT: retq
1373 ;
1374 ; AVX512BW-LABEL: constant_funnnel_v2i64:
1375 ; AVX512BW: # %bb.0:
1376 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1377 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [4,14]
1378 ; AVX512BW-NEXT: vprorvq %zmm1, %zmm0, %zmm0
1379 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1380 ; AVX512BW-NEXT: vzeroupper
1381 ; AVX512BW-NEXT: retq
1382 ;
1383 ; AVX512VLBW-LABEL: constant_funnnel_v2i64:
1384 ; AVX512VLBW: # %bb.0:
1385 ; AVX512VLBW-NEXT: vprorvq {{.*}}(%rip), %xmm0, %xmm0
1386 ; AVX512VLBW-NEXT: retq
1387 ;
1388 ; XOP-LABEL: constant_funnnel_v2i64:
1389 ; XOP: # %bb.0:
1390 ; XOP-NEXT: vprotq {{.*}}(%rip), %xmm0, %xmm0
1391 ; XOP-NEXT: retq
1392 ;
1393 ; X32-SSE-LABEL: constant_funnnel_v2i64:
1394 ; X32-SSE: # %bb.0:
1395 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1396 ; X32-SSE-NEXT: psrlq $4, %xmm1
1397 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
1398 ; X32-SSE-NEXT: psrlq $14, %xmm2
1399 ; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1]
1400 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1401 ; X32-SSE-NEXT: psllq $60, %xmm1
1402 ; X32-SSE-NEXT: psllq $50, %xmm0
1403 ; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1404 ; X32-SSE-NEXT: orpd %xmm2, %xmm0
1405 ; X32-SSE-NEXT: retl
1406 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> <i64 4, i64 14>)
1407 ret <2 x i64> %res
1408 }
1410 define <4 x i32> @constant_funnnel_v4i32(<4 x i32> %x) nounwind {
1411 ; SSE2-LABEL: constant_funnnel_v4i32:
1412 ; SSE2: # %bb.0:
1413 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1414 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1415 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
1416 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
1417 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
1418 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
1419 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
1420 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
1421 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1422 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1423 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1424 ; SSE2-NEXT: por %xmm3, %xmm0
1425 ; SSE2-NEXT: retq
1426 ;
1427 ; SSE41-LABEL: constant_funnnel_v4i32:
1428 ; SSE41: # %bb.0:
1429 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1430 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
1431 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1432 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
1433 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
1434 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1435 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
1436 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
1437 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
1438 ; SSE41-NEXT: por %xmm1, %xmm0
1439 ; SSE41-NEXT: retq
1440 ;
1441 ; AVX1-LABEL: constant_funnnel_v4i32:
1442 ; AVX1: # %bb.0:
1443 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1444 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
1445 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1446 ; AVX1-NEXT: vpmuludq %xmm2, %xmm3, %xmm2
1447 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
1448 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1449 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
1450 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
1451 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
1452 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1453 ; AVX1-NEXT: retq
1454 ;
1455 ; AVX2-LABEL: constant_funnnel_v4i32:
1456 ; AVX2: # %bb.0:
1457 ; AVX2-NEXT: vpsrlvd {{.*}}(%rip), %xmm0, %xmm1
1458 ; AVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0
1459 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1460 ; AVX2-NEXT: retq
1461 ;
1462 ; AVX512F-LABEL: constant_funnnel_v4i32:
1463 ; AVX512F: # %bb.0:
1464 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1465 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = [4,5,6,7]
1466 ; AVX512F-NEXT: vprorvd %zmm1, %zmm0, %zmm0
1467 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1468 ; AVX512F-NEXT: vzeroupper
1469 ; AVX512F-NEXT: retq
1470 ;
1471 ; AVX512VL-LABEL: constant_funnnel_v4i32:
1472 ; AVX512VL: # %bb.0:
1473 ; AVX512VL-NEXT: vprorvd {{.*}}(%rip), %xmm0, %xmm0
1474 ; AVX512VL-NEXT: retq
1475 ;
1476 ; AVX512BW-LABEL: constant_funnnel_v4i32:
1477 ; AVX512BW: # %bb.0:
1478 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1479 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [4,5,6,7]
1480 ; AVX512BW-NEXT: vprorvd %zmm1, %zmm0, %zmm0
1481 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1482 ; AVX512BW-NEXT: vzeroupper
1483 ; AVX512BW-NEXT: retq
1484 ;
1485 ; AVX512VLBW-LABEL: constant_funnnel_v4i32:
1486 ; AVX512VLBW: # %bb.0:
1487 ; AVX512VLBW-NEXT: vprorvd {{.*}}(%rip), %xmm0, %xmm0
1488 ; AVX512VLBW-NEXT: retq
1489 ;
1490 ; XOP-LABEL: constant_funnnel_v4i32:
1491 ; XOP: # %bb.0:
1492 ; XOP-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0
1493 ; XOP-NEXT: retq
1494 ;
1495 ; X32-SSE-LABEL: constant_funnnel_v4i32:
1496 ; X32-SSE: # %bb.0:
1497 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1498 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1499 ; X32-SSE-NEXT: pmuludq %xmm1, %xmm0
1500 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
1501 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
1502 ; X32-SSE-NEXT: pmuludq %xmm2, %xmm1
1503 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
1504 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
1505 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1506 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1507 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1508 ; X32-SSE-NEXT: por %xmm3, %xmm0
1509 ; X32-SSE-NEXT: retl
1510 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
1511 ret <4 x i32> %res
1512 }
1514 define <8 x i16> @constant_funnnel_v8i16(<8 x i16> %x) nounwind {
1515 ; SSE-LABEL: constant_funnnel_v8i16:
1516 ; SSE: # %bb.0:
1517 ; SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1518 ; SSE-NEXT: movdqa %xmm0, %xmm2
1519 ; SSE-NEXT: pmulhuw %xmm1, %xmm2
1520 ; SSE-NEXT: pmullw %xmm1, %xmm0
1521 ; SSE-NEXT: por %xmm2, %xmm0
1522 ; SSE-NEXT: retq
1523 ;
1524 ; AVX-LABEL: constant_funnnel_v8i16:
1525 ; AVX: # %bb.0:
1526 ; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1527 ; AVX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
1528 ; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm0
1529 ; AVX-NEXT: vpor %xmm2, %xmm0, %xmm0
1530 ; AVX-NEXT: retq
1531 ;
1532 ; AVX512F-LABEL: constant_funnnel_v8i16:
1533 ; AVX512F: # %bb.0:
1534 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1535 ; AVX512F-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
1536 ; AVX512F-NEXT: vpmullw %xmm1, %xmm0, %xmm0
1537 ; AVX512F-NEXT: vpor %xmm2, %xmm0, %xmm0
1538 ; AVX512F-NEXT: retq
1539 ;
1540 ; AVX512VL-LABEL: constant_funnnel_v8i16:
1541 ; AVX512VL: # %bb.0:
1542 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1543 ; AVX512VL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
1544 ; AVX512VL-NEXT: vpmullw %xmm1, %xmm0, %xmm0
1545 ; AVX512VL-NEXT: vpor %xmm2, %xmm0, %xmm0
1546 ; AVX512VL-NEXT: retq
1547 ;
1548 ; AVX512BW-LABEL: constant_funnnel_v8i16:
1549 ; AVX512BW: # %bb.0:
1550 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1551 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [16,1,2,3,4,5,6,7]
1552 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1
1553 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,15,14,13,12,11,10,9]
1554 ; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0
1555 ; AVX512BW-NEXT: vpor %xmm1, %xmm0, %xmm0
1556 ; AVX512BW-NEXT: vzeroupper
1557 ; AVX512BW-NEXT: retq
1558 ;
1559 ; AVX512VLBW-LABEL: constant_funnnel_v8i16:
1560 ; AVX512VLBW: # %bb.0:
1561 ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %xmm0, %xmm1
1562 ; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %xmm0, %xmm0
1563 ; AVX512VLBW-NEXT: vpor %xmm1, %xmm0, %xmm0
1564 ; AVX512VLBW-NEXT: retq
1565 ;
1566 ; XOP-LABEL: constant_funnnel_v8i16:
1567 ; XOP: # %bb.0:
1568 ; XOP-NEXT: vprotw {{.*}}(%rip), %xmm0, %xmm0
1569 ; XOP-NEXT: retq
1570 ;
1571 ; X32-SSE-LABEL: constant_funnnel_v8i16:
1572 ; X32-SSE: # %bb.0:
1573 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1574 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
1575 ; X32-SSE-NEXT: pmulhuw %xmm1, %xmm2
1576 ; X32-SSE-NEXT: pmullw %xmm1, %xmm0
1577 ; X32-SSE-NEXT: por %xmm2, %xmm0
1578 ; X32-SSE-NEXT: retl
1579 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>)
1580 ret <8 x i16> %res
1581 }
1583 define <16 x i8> @constant_funnnel_v16i8(<16 x i8> %x) nounwind {
1584 ; SSE2-LABEL: constant_funnnel_v16i8:
1585 ; SSE2: # %bb.0:
1586 ; SSE2-NEXT: pxor %xmm1, %xmm1
1587 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1588 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1589 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm2
1590 ; SSE2-NEXT: psrlw $8, %xmm2
1591 ; SSE2-NEXT: movdqa %xmm0, %xmm3
1592 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
1593 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm3
1594 ; SSE2-NEXT: psrlw $8, %xmm3
1595 ; SSE2-NEXT: packuswb %xmm2, %xmm3
1596 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1597 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
1598 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm1
1599 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1600 ; SSE2-NEXT: pand %xmm2, %xmm1
1601 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1602 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm0
1603 ; SSE2-NEXT: pand %xmm2, %xmm0
1604 ; SSE2-NEXT: packuswb %xmm1, %xmm0
1605 ; SSE2-NEXT: por %xmm3, %xmm0
1606 ; SSE2-NEXT: retq
1607 ;
1608 ; SSE41-LABEL: constant_funnnel_v16i8:
1609 ; SSE41: # %bb.0:
1610 ; SSE41-NEXT: movdqa %xmm0, %xmm2
1611 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
1612 ; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm2
1613 ; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
1614 ; SSE41-NEXT: pand %xmm3, %xmm2
1615 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1616 ; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [1,128,64,32,16,8,4,2]
1617 ; SSE41-NEXT: pmullw %xmm1, %xmm4
1618 ; SSE41-NEXT: pand %xmm3, %xmm4
1619 ; SSE41-NEXT: packuswb %xmm2, %xmm4
1620 ; SSE41-NEXT: pxor %xmm2, %xmm2
1621 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
1622 ; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm0
1623 ; SSE41-NEXT: psrlw $8, %xmm0
1624 ; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm1
1625 ; SSE41-NEXT: psrlw $8, %xmm1
1626 ; SSE41-NEXT: packuswb %xmm0, %xmm1
1627 ; SSE41-NEXT: por %xmm4, %xmm1
1628 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1629 ; SSE41-NEXT: retq
1630 ;
1631 ; AVX1-LABEL: constant_funnnel_v16i8:
1632 ; AVX1: # %bb.0:
1633 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
1634 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm1, %xmm1
1635 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1636 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
1637 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1638 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm3, %xmm4
1639 ; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2
1640 ; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1
1641 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1642 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
1643 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0
1644 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
1645 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm3, %xmm2
1646 ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2
1647 ; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0
1648 ; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
1649 ; AVX1-NEXT: retq
1650 ;
1651 ; AVX2-LABEL: constant_funnnel_v16i8:
1652 ; AVX2: # %bb.0:
1653 ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1654 ; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm1
1655 ; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1
1656 ; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
1657 ; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1
1658 ; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
1659 ; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
1660 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
1661 ; AVX2-NEXT: vpackuswb %xmm2, %xmm0, %xmm0
1662 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1663 ; AVX2-NEXT: vzeroupper
1664 ; AVX2-NEXT: retq
1665 ;
1666 ; AVX512F-LABEL: constant_funnnel_v16i8:
1667 ; AVX512F: # %bb.0:
1668 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1669 ; AVX512F-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1
1670 ; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0
1671 ; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0
1672 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
1673 ; AVX512F-NEXT: vzeroupper
1674 ; AVX512F-NEXT: retq
1675 ;
1676 ; AVX512VL-LABEL: constant_funnnel_v16i8:
1677 ; AVX512VL: # %bb.0:
1678 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1679 ; AVX512VL-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1
1680 ; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0
1681 ; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0
1682 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
1683 ; AVX512VL-NEXT: vzeroupper
1684 ; AVX512VL-NEXT: retq
1685 ;
1686 ; AVX512BW-LABEL: constant_funnnel_v16i8:
1687 ; AVX512BW: # %bb.0:
1688 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1]
1689 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1690 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1
1691 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7]
1692 ; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0
1693 ; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0
1694 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1695 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1696 ; AVX512BW-NEXT: vzeroupper
1697 ; AVX512BW-NEXT: retq
1698 ;
1699 ; AVX512VLBW-LABEL: constant_funnnel_v16i8:
1700 ; AVX512VLBW: # %bb.0:
1701 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1702 ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %ymm0, %ymm1
1703 ; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm0, %ymm0
1704 ; AVX512VLBW-NEXT: vpor %ymm1, %ymm0, %ymm0
1705 ; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
1706 ; AVX512VLBW-NEXT: vzeroupper
1707 ; AVX512VLBW-NEXT: retq
1708 ;
1709 ; XOP-LABEL: constant_funnnel_v16i8:
1710 ; XOP: # %bb.0:
1711 ; XOP-NEXT: vprotb {{.*}}(%rip), %xmm0, %xmm0
1712 ; XOP-NEXT: retq
1713 ;
1714 ; X32-SSE-LABEL: constant_funnnel_v16i8:
1715 ; X32-SSE: # %bb.0:
1716 ; X32-SSE-NEXT: pxor %xmm1, %xmm1
1717 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
1718 ; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1719 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm2
1720 ; X32-SSE-NEXT: psrlw $8, %xmm2
1721 ; X32-SSE-NEXT: movdqa %xmm0, %xmm3
1722 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
1723 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm3
1724 ; X32-SSE-NEXT: psrlw $8, %xmm3
1725 ; X32-SSE-NEXT: packuswb %xmm2, %xmm3
1726 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1727 ; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
1728 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm1
1729 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1730 ; X32-SSE-NEXT: pand %xmm2, %xmm1
1731 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1732 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm0
1733 ; X32-SSE-NEXT: pand %xmm2, %xmm0
1734 ; X32-SSE-NEXT: packuswb %xmm1, %xmm0
1735 ; X32-SSE-NEXT: por %xmm3, %xmm0
1736 ; X32-SSE-NEXT: retl
1737 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1>)
1738 ret <16 x i8> %res
1739 }
1741 ;
1742 ; Uniform Constant Shifts
1743 ;
1745 define <2 x i64> @splatconstant_funnnel_v2i64(<2 x i64> %x) nounwind {
1746 ; SSE-LABEL: splatconstant_funnnel_v2i64:
1747 ; SSE: # %bb.0:
1748 ; SSE-NEXT: movdqa %xmm0, %xmm1
1749 ; SSE-NEXT: psrlq $14, %xmm1
1750 ; SSE-NEXT: psllq $50, %xmm0
1751 ; SSE-NEXT: por %xmm1, %xmm0
1752 ; SSE-NEXT: retq
1753 ;
1754 ; AVX-LABEL: splatconstant_funnnel_v2i64:
1755 ; AVX: # %bb.0:
1756 ; AVX-NEXT: vpsrlq $14, %xmm0, %xmm1
1757 ; AVX-NEXT: vpsllq $50, %xmm0, %xmm0
1758 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1759 ; AVX-NEXT: retq
1760 ;
1761 ; AVX512F-LABEL: splatconstant_funnnel_v2i64:
1762 ; AVX512F: # %bb.0:
1763 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1764 ; AVX512F-NEXT: vprorq $14, %zmm0, %zmm0
1765 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1766 ; AVX512F-NEXT: vzeroupper
1767 ; AVX512F-NEXT: retq
1768 ;
1769 ; AVX512VL-LABEL: splatconstant_funnnel_v2i64:
1770 ; AVX512VL: # %bb.0:
1771 ; AVX512VL-NEXT: vprorq $14, %xmm0, %xmm0
1772 ; AVX512VL-NEXT: retq
1773 ;
1774 ; AVX512BW-LABEL: splatconstant_funnnel_v2i64:
1775 ; AVX512BW: # %bb.0:
1776 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1777 ; AVX512BW-NEXT: vprorq $14, %zmm0, %zmm0
1778 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1779 ; AVX512BW-NEXT: vzeroupper
1780 ; AVX512BW-NEXT: retq
1781 ;
1782 ; AVX512VLBW-LABEL: splatconstant_funnnel_v2i64:
1783 ; AVX512VLBW: # %bb.0:
1784 ; AVX512VLBW-NEXT: vprorq $14, %xmm0, %xmm0
1785 ; AVX512VLBW-NEXT: retq
1786 ;
1787 ; XOP-LABEL: splatconstant_funnnel_v2i64:
1788 ; XOP: # %bb.0:
1789 ; XOP-NEXT: vprotq $50, %xmm0, %xmm0
1790 ; XOP-NEXT: retq
1791 ;
1792 ; X32-SSE-LABEL: splatconstant_funnnel_v2i64:
1793 ; X32-SSE: # %bb.0:
1794 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1795 ; X32-SSE-NEXT: psrlq $14, %xmm1
1796 ; X32-SSE-NEXT: psllq $50, %xmm0
1797 ; X32-SSE-NEXT: por %xmm1, %xmm0
1798 ; X32-SSE-NEXT: retl
1799 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> <i64 14, i64 14>)
1800 ret <2 x i64> %res
1801 }
1803 define <4 x i32> @splatconstant_funnnel_v4i32(<4 x i32> %x) nounwind {
1804 ; SSE-LABEL: splatconstant_funnnel_v4i32:
1805 ; SSE: # %bb.0:
1806 ; SSE-NEXT: movdqa %xmm0, %xmm1
1807 ; SSE-NEXT: psrld $4, %xmm1
1808 ; SSE-NEXT: pslld $28, %xmm0
1809 ; SSE-NEXT: por %xmm1, %xmm0
1810 ; SSE-NEXT: retq
1811 ;
1812 ; AVX-LABEL: splatconstant_funnnel_v4i32:
1813 ; AVX: # %bb.0:
1814 ; AVX-NEXT: vpsrld $4, %xmm0, %xmm1
1815 ; AVX-NEXT: vpslld $28, %xmm0, %xmm0
1816 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1817 ; AVX-NEXT: retq
1818 ;
1819 ; AVX512F-LABEL: splatconstant_funnnel_v4i32:
1820 ; AVX512F: # %bb.0:
1821 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1822 ; AVX512F-NEXT: vprord $4, %zmm0, %zmm0
1823 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1824 ; AVX512F-NEXT: vzeroupper
1825 ; AVX512F-NEXT: retq
1826 ;
1827 ; AVX512VL-LABEL: splatconstant_funnnel_v4i32:
1828 ; AVX512VL: # %bb.0:
1829 ; AVX512VL-NEXT: vprord $4, %xmm0, %xmm0
1830 ; AVX512VL-NEXT: retq
1831 ;
1832 ; AVX512BW-LABEL: splatconstant_funnnel_v4i32:
1833 ; AVX512BW: # %bb.0:
1834 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1835 ; AVX512BW-NEXT: vprord $4, %zmm0, %zmm0
1836 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1837 ; AVX512BW-NEXT: vzeroupper
1838 ; AVX512BW-NEXT: retq
1839 ;
1840 ; AVX512VLBW-LABEL: splatconstant_funnnel_v4i32:
1841 ; AVX512VLBW: # %bb.0:
1842 ; AVX512VLBW-NEXT: vprord $4, %xmm0, %xmm0
1843 ; AVX512VLBW-NEXT: retq
1844 ;
1845 ; XOP-LABEL: splatconstant_funnnel_v4i32:
1846 ; XOP: # %bb.0:
1847 ; XOP-NEXT: vprotd $28, %xmm0, %xmm0
1848 ; XOP-NEXT: retq
1849 ;
1850 ; X32-SSE-LABEL: splatconstant_funnnel_v4i32:
1851 ; X32-SSE: # %bb.0:
1852 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1853 ; X32-SSE-NEXT: psrld $4, %xmm1
1854 ; X32-SSE-NEXT: pslld $28, %xmm0
1855 ; X32-SSE-NEXT: por %xmm1, %xmm0
1856 ; X32-SSE-NEXT: retl
1857 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> <i32 4, i32 4, i32 4, i32 4>)
1858 ret <4 x i32> %res
1859 }
1861 define <8 x i16> @splatconstant_funnnel_v8i16(<8 x i16> %x) nounwind {
1862 ; SSE-LABEL: splatconstant_funnnel_v8i16:
1863 ; SSE: # %bb.0:
1864 ; SSE-NEXT: movdqa %xmm0, %xmm1
1865 ; SSE-NEXT: psrlw $7, %xmm1
1866 ; SSE-NEXT: psllw $9, %xmm0
1867 ; SSE-NEXT: por %xmm1, %xmm0
1868 ; SSE-NEXT: retq
1869 ;
1870 ; AVX-LABEL: splatconstant_funnnel_v8i16:
1871 ; AVX: # %bb.0:
1872 ; AVX-NEXT: vpsrlw $7, %xmm0, %xmm1
1873 ; AVX-NEXT: vpsllw $9, %xmm0, %xmm0
1874 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1875 ; AVX-NEXT: retq
1876 ;
1877 ; AVX512-LABEL: splatconstant_funnnel_v8i16:
1878 ; AVX512: # %bb.0:
1879 ; AVX512-NEXT: vpsrlw $7, %xmm0, %xmm1
1880 ; AVX512-NEXT: vpsllw $9, %xmm0, %xmm0
1881 ; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1882 ; AVX512-NEXT: retq
1883 ;
1884 ; XOP-LABEL: splatconstant_funnnel_v8i16:
1885 ; XOP: # %bb.0:
1886 ; XOP-NEXT: vprotw $9, %xmm0, %xmm0
1887 ; XOP-NEXT: retq
1888 ;
1889 ; X32-SSE-LABEL: splatconstant_funnnel_v8i16:
1890 ; X32-SSE: # %bb.0:
1891 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1892 ; X32-SSE-NEXT: psrlw $7, %xmm1
1893 ; X32-SSE-NEXT: psllw $9, %xmm0
1894 ; X32-SSE-NEXT: por %xmm1, %xmm0
1895 ; X32-SSE-NEXT: retl
1896 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>)
1897 ret <8 x i16> %res
1898 }
1900 define <16 x i8> @splatconstant_funnnel_v16i8(<16 x i8> %x) nounwind {
1901 ; SSE-LABEL: splatconstant_funnnel_v16i8:
1902 ; SSE: # %bb.0:
1903 ; SSE-NEXT: movdqa %xmm0, %xmm1
1904 ; SSE-NEXT: psrlw $4, %xmm1
1905 ; SSE-NEXT: pand {{.*}}(%rip), %xmm1
1906 ; SSE-NEXT: psllw $4, %xmm0
1907 ; SSE-NEXT: pand {{.*}}(%rip), %xmm0
1908 ; SSE-NEXT: por %xmm1, %xmm0
1909 ; SSE-NEXT: retq
1910 ;
1911 ; AVX-LABEL: splatconstant_funnnel_v16i8:
1912 ; AVX: # %bb.0:
1913 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm1
1914 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1915 ; AVX-NEXT: vpsllw $4, %xmm0, %xmm0
1916 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
1917 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1918 ; AVX-NEXT: retq
1919 ;
1920 ; AVX512-LABEL: splatconstant_funnnel_v16i8:
1921 ; AVX512: # %bb.0:
1922 ; AVX512-NEXT: vpsrlw $4, %xmm0, %xmm1
1923 ; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1924 ; AVX512-NEXT: vpsllw $4, %xmm0, %xmm0
1925 ; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
1926 ; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1927 ; AVX512-NEXT: retq
1928 ;
1929 ; XOP-LABEL: splatconstant_funnnel_v16i8:
1930 ; XOP: # %bb.0:
1931 ; XOP-NEXT: vprotb $4, %xmm0, %xmm0
1932 ; XOP-NEXT: retq
1933 ;
1934 ; X32-SSE-LABEL: splatconstant_funnnel_v16i8:
1935 ; X32-SSE: # %bb.0:
1936 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1937 ; X32-SSE-NEXT: psrlw $4, %xmm1
1938 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1
1939 ; X32-SSE-NEXT: psllw $4, %xmm0
1940 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
1941 ; X32-SSE-NEXT: por %xmm1, %xmm0
1942 ; X32-SSE-NEXT: retl
1943 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>)
1944 ret <16 x i8> %res
1945 }