1 //===-- MicroMipsInstrFormats.td - microMIPS Inst Formats -*- tablegen -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This files descributes the formats of the microMIPS instruction set.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // MicroMIPS Base Classes
16 //===----------------------------------------------------------------------===//
19 // Base class for MicroMips instructions.
20 // This class does not depend on the instruction size.
22 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
23 InstrItinClass itin, Format f> : Instruction,
25 let Namespace = "Mips";
26 let DecoderNamespace = "MicroMips";
28 let OutOperandList = outs;
29 let InOperandList = ins;
31 let AsmString = asmstr;
32 let Pattern = pattern;
35 let EncodingPredicates = [InMicroMips];
41 // Base class for MicroMIPS 16-bit instructions.
43 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
44 InstrItinClass itin, Format f> :
45 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
49 field bits<16> SoftFail = 0;
53 //===----------------------------------------------------------------------===//
54 // MicroMIPS 16-bit Instruction Formats
55 //===----------------------------------------------------------------------===//
57 class ARITH_FM_MM16<bit funct> {
64 let Inst{15-10} = 0x01;
71 class ANDI_FM_MM16<bits<6> funct> {
78 let Inst{15-10} = funct;
84 class LOGIC_FM_MM16<bits<4> funct> {
90 let Inst{15-10} = 0x11;
91 let Inst{9-6} = funct;
96 class SHIFT_FM_MM16<bits<1> funct> {
103 let Inst{15-10} = 0x09;
106 let Inst{3-1} = shamt;
110 class ADDIUR2_FM_MM16 {
117 let Inst{15-10} = 0x1b;
124 class LOAD_STORE_FM_MM16<bits<6> op> {
130 let Inst{15-10} = op;
132 let Inst{6-4} = addr{6-4};
133 let Inst{3-0} = addr{3-0};
136 class LOAD_STORE_SP_FM_MM16<bits<6> op> {
142 let Inst{15-10} = op;
144 let Inst{4-0} = offset;
147 class LOAD_GP_FM_MM16<bits<6> op> {
153 let Inst{15-10} = op;
155 let Inst{6-0} = offset;
158 class ADDIUS5_FM_MM16 {
164 let Inst{15-10} = 0x13;
170 class ADDIUSP_FM_MM16 {
175 let Inst{15-10} = 0x13;
180 class MOVE_FM_MM16<bits<6> funct> {
186 let Inst{15-10} = funct;
197 let Inst{15-10} = 0x3b;
202 class JALR_FM_MM16<bits<5> op> {
207 let Inst{15-10} = 0x11;
212 class MFHILO_FM_MM16<bits<5> funct> {
217 let Inst{15-10} = 0x11;
218 let Inst{9-5} = funct;
222 class JRADDIUSP_FM_MM16<bits<5> op> {
228 let Inst{15-10} = 0x11;
233 class ADDIUR1SP_FM_MM16 {
239 let Inst{15-10} = 0x1b;
245 class BRKSDBBP16_FM_MM<bits<6> op> {
249 let Inst{15-10} = 0x11;
251 let Inst{3-0} = code_;
254 class BEQNEZ_FM_MM16<bits<6> op> {
260 let Inst{15-10} = op;
262 let Inst{6-0} = offset;
270 let Inst{15-10} = 0x33;
271 let Inst{9-0} = offset;
274 class MOVEP_FM_MM16 {
281 let Inst{15-10} = 0x21;
282 let Inst{9-7} = dst_regs;
288 //===----------------------------------------------------------------------===//
289 // MicroMIPS 32-bit Instruction Formats
290 //===----------------------------------------------------------------------===//
293 string Arch = "micromips";
296 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
303 let Inst{31-26} = op;
304 let Inst{25-21} = rt;
305 let Inst{20-16} = rs;
306 let Inst{15-11} = rd;
308 let Inst{9-0} = funct;
311 class ADDI_FM_MM<bits<6> op> : MMArch {
318 let Inst{31-26} = op;
319 let Inst{25-21} = rt;
320 let Inst{20-16} = rs;
321 let Inst{15-0} = imm16;
324 class SLTI_FM_MM<bits<6> op> : MMArch {
331 let Inst{31-26} = op;
332 let Inst{25-21} = rt;
333 let Inst{20-16} = rs;
334 let Inst{15-0} = imm16;
337 class LUI_FM_MM : MMArch {
343 let Inst{31-26} = 0x10;
344 let Inst{25-21} = 0xd;
345 let Inst{20-16} = rt;
346 let Inst{15-0} = imm16;
349 class MULT_FM_MM<bits<10> funct> : MMArch {
355 let Inst{31-26} = 0x00;
356 let Inst{25-21} = rt;
357 let Inst{20-16} = rs;
358 let Inst{15-6} = funct;
359 let Inst{5-0} = 0x3c;
362 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
370 let Inst{25-21} = rd;
371 let Inst{20-16} = rt;
372 let Inst{15-11} = shamt;
373 let Inst{10} = rotate;
374 let Inst{9-0} = funct;
377 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
385 let Inst{25-21} = rt;
386 let Inst{20-16} = rs;
387 let Inst{15-11} = rd;
388 let Inst{10} = rotate;
389 let Inst{9-0} = funct;
392 class LW_FM_MM<bits<6> op> : MMArch {
395 bits<5> base = addr{20-16};
396 bits<16> offset = addr{15-0};
400 let Inst{31-26} = op;
401 let Inst{25-21} = rt;
402 let Inst{20-16} = base;
403 let Inst{15-0} = offset;
406 class POOL32C_LHUE_FM_MM<bits<6> op, bits<4> fmt, bits<3> funct> : MMArch {
409 bits<5> base = addr{20-16};
410 bits<9> offset = addr{8-0};
414 let Inst{31-26} = op;
415 let Inst{25-21} = rt;
416 let Inst{20-16} = base;
417 let Inst{15-12} = fmt;
418 let Inst{11-9} = funct;
419 let Inst{8-0} = offset;
422 class LWL_FM_MM<bits<4> funct> : MMArch {
428 let Inst{31-26} = 0x18;
429 let Inst{25-21} = rt;
430 let Inst{20-16} = addr{20-16};
431 let Inst{15-12} = funct;
432 let Inst{11-0} = addr{11-0};
435 class POOL32C_STEVA_LDEVA_FM_MM<bits<4> type, bits<3> funct> : MMArch {
438 bits<5> base = addr{20-16};
439 bits<9> offset = addr{8-0};
443 let Inst{31-26} = 0x18;
444 let Inst{25-21} = rt;
445 let Inst{20-16} = base;
446 let Inst{15-12} = type;
447 let Inst{11-9} = funct;
448 let Inst{8-0} = offset;
451 class CMov_F_I_FM_MM<bits<7> func> : MMArch {
458 let Inst{31-26} = 0x15;
459 let Inst{25-21} = rd;
460 let Inst{20-16} = rs;
461 let Inst{15-13} = fcc;
462 let Inst{12-6} = func;
463 let Inst{5-0} = 0x3b;
466 class MTLO_FM_MM<bits<10> funct> : MMArch {
471 let Inst{31-26} = 0x00;
472 let Inst{25-21} = 0x00;
473 let Inst{20-16} = rs;
474 let Inst{15-6} = funct;
475 let Inst{5-0} = 0x3c;
478 class MFLO_FM_MM<bits<10> funct> : MMArch {
483 let Inst{31-26} = 0x00;
484 let Inst{25-21} = 0x00;
485 let Inst{20-16} = rd;
486 let Inst{15-6} = funct;
487 let Inst{5-0} = 0x3c;
490 class CLO_FM_MM<bits<10> funct> : MMArch {
496 let Inst{31-26} = 0x00;
497 let Inst{25-21} = rd;
498 let Inst{20-16} = rs;
499 let Inst{15-6} = funct;
500 let Inst{5-0} = 0x3c;
503 class SEB_FM_MM<bits<10> funct> : MMArch {
509 let Inst{31-26} = 0x00;
510 let Inst{25-21} = rd;
511 let Inst{20-16} = rt;
512 let Inst{15-6} = funct;
513 let Inst{5-0} = 0x3c;
516 class EXT_FM_MM<bits<6> funct> : MMArch {
524 let Inst{31-26} = 0x00;
525 let Inst{25-21} = rt;
526 let Inst{20-16} = rs;
527 let Inst{15-11} = size;
528 let Inst{10-6} = pos;
529 let Inst{5-0} = funct;
532 class J_FM_MM<bits<6> op> : MMArch {
537 let Inst{31-26} = op;
538 let Inst{25-0} = target;
541 class JR_FM_MM<bits<8> funct> : MMArch {
546 let Inst{31-21} = 0x00;
547 let Inst{20-16} = rs;
548 let Inst{15-14} = 0x0;
549 let Inst{13-6} = funct;
550 let Inst{5-0} = 0x3c;
553 class JALR_FM_MM<bits<10> funct> {
559 let Inst{31-26} = 0x00;
560 let Inst{25-21} = rd;
561 let Inst{20-16} = rs;
562 let Inst{15-6} = funct;
563 let Inst{5-0} = 0x3c;
566 class BEQ_FM_MM<bits<6> op> : MMArch {
573 let Inst{31-26} = op;
574 let Inst{25-21} = rt;
575 let Inst{20-16} = rs;
576 let Inst{15-0} = offset;
579 class BGEZ_FM_MM<bits<5> funct> : MMArch {
585 let Inst{31-26} = 0x10;
586 let Inst{25-21} = funct;
587 let Inst{20-16} = rs;
588 let Inst{15-0} = offset;
591 class BGEZAL_FM_MM<bits<5> funct> : MMArch {
597 let Inst{31-26} = 0x10;
598 let Inst{25-21} = funct;
599 let Inst{20-16} = rs;
600 let Inst{15-0} = offset;
603 class SYNC_FM_MM : MMArch {
608 let Inst{31-26} = 0x00;
609 let Inst{25-21} = 0x0;
610 let Inst{20-16} = stype;
611 let Inst{15-6} = 0x1ad;
612 let Inst{5-0} = 0x3c;
615 class SYNCI_FM_MM : MMArch {
617 bits<5> rs = addr{20-16};
618 bits<16> offset = addr{15-0};
621 let Inst{31-26} = 0b010000;
622 let Inst{25-21} = 0b10000;
623 let Inst{20-16} = rs;
624 let Inst{15-0} = offset;
627 class BRK_FM_MM : MMArch {
631 let Inst{31-26} = 0x0;
632 let Inst{25-16} = code_1;
633 let Inst{15-6} = code_2;
634 let Inst{5-0} = 0x07;
637 class SYS_FM_MM : MMArch {
640 let Inst{31-26} = 0x0;
641 let Inst{25-16} = code_;
642 let Inst{15-6} = 0x22d;
643 let Inst{5-0} = 0x3c;
646 class WAIT_FM_MM : MMArch {
650 let Inst{31-26} = 0x00;
651 let Inst{25-16} = code_;
652 let Inst{15-6} = 0x24d;
653 let Inst{5-0} = 0x3c;
656 class ER_FM_MM<bits<10> funct> : MMArch {
659 let Inst{31-26} = 0x00;
660 let Inst{25-16} = 0x00;
661 let Inst{15-6} = funct;
662 let Inst{5-0} = 0x3c;
665 class EI_FM_MM<bits<10> funct> : MMArch {
669 let Inst{31-26} = 0x00;
670 let Inst{25-21} = 0x00;
671 let Inst{20-16} = rt;
672 let Inst{15-6} = funct;
673 let Inst{5-0} = 0x3c;
676 class TEQ_FM_MM<bits<6> funct> : MMArch {
683 let Inst{31-26} = 0x00;
684 let Inst{25-21} = rt;
685 let Inst{20-16} = rs;
686 let Inst{15-12} = code_;
687 let Inst{11-6} = funct;
688 let Inst{5-0} = 0x3c;
691 class TEQI_FM_MM<bits<5> funct> : MMArch {
697 let Inst{31-26} = 0x10;
698 let Inst{25-21} = funct;
699 let Inst{20-16} = rs;
700 let Inst{15-0} = imm16;
703 class LL_FM_MM<bits<4> funct> : MMArch {
709 let Inst{31-26} = 0x18;
710 let Inst{25-21} = rt;
711 let Inst{20-16} = addr{20-16};
712 let Inst{15-12} = funct;
713 let Inst{11-0} = addr{11-0};
716 class LLE_FM_MM<bits<4> funct> : MMArch {
719 bits<5> base = addr{20-16};
720 bits<9> offset = addr{8-0};
724 let Inst{31-26} = 0x18;
725 let Inst{25-21} = rt;
726 let Inst{20-16} = base;
727 let Inst{15-12} = funct;
728 let Inst{11-9} = 0x6;
729 let Inst{8-0} = offset;
732 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
739 let Inst{31-26} = 0x15;
740 let Inst{25-21} = ft;
741 let Inst{20-16} = fs;
742 let Inst{15-11} = fd;
745 let Inst{7-0} = funct;
749 class LWXC1_FM_MM<bits<9> funct> : MMArch {
756 let Inst{31-26} = 0x15;
757 let Inst{25-21} = index;
758 let Inst{20-16} = base;
759 let Inst{15-11} = fd;
760 let Inst{10-9} = 0x0;
761 let Inst{8-0} = funct;
764 class SWXC1_FM_MM<bits<9> funct> : MMArch {
771 let Inst{31-26} = 0x15;
772 let Inst{25-21} = index;
773 let Inst{20-16} = base;
774 let Inst{15-11} = fs;
775 let Inst{10-9} = 0x0;
776 let Inst{8-0} = funct;
779 class CEQS_FM_MM<bits<2> fmt> : MMArch {
787 let Inst{31-26} = 0x15;
788 let Inst{25-21} = ft;
789 let Inst{20-16} = fs;
790 let Inst{15-13} = fcc;
792 let Inst{11-10} = fmt;
793 let Inst{9-6} = cond;
794 let Inst{5-0} = 0x3c;
797 class C_COND_FM_MM<bits <2> fmt, bits<4> c> : CEQS_FM_MM<fmt> {
801 class BC1F_FM_MM<bits<5> tf> : MMArch {
807 let Inst{31-26} = 0x10;
808 let Inst{25-21} = tf;
809 let Inst{20-18} = fcc; // cc
810 let Inst{17-16} = 0x0;
811 let Inst{15-0} = offset;
814 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
820 let Inst{31-26} = 0x15;
821 let Inst{25-21} = fd;
822 let Inst{20-16} = fs;
825 let Inst{13-6} = funct;
826 let Inst{5-0} = 0x3b;
829 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
835 let Inst{31-26} = 0x15;
836 let Inst{25-21} = fd;
837 let Inst{20-16} = fs;
839 let Inst{14-13} = fmt;
840 let Inst{12-6} = funct;
841 let Inst{5-0} = 0x3b;
844 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
850 let Inst{31-26} = 0x15;
851 let Inst{25-21} = fd;
852 let Inst{20-16} = fs;
853 let Inst{15-13} = fcc; //cc
854 let Inst{12-11} = 0x0;
855 let Inst{10-9} = fmt;
856 let Inst{8-0} = func;
859 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
866 let Inst{31-26} = 0x15;
867 let Inst{25-21} = rt;
868 let Inst{20-16} = fs;
869 let Inst{15-11} = fd;
871 let Inst{7-0} = funct;
874 class MFC1_FM_MM<bits<8> funct> : MMArch {
880 let Inst{31-26} = 0x15;
881 let Inst{25-21} = rt;
882 let Inst{20-16} = fs;
883 let Inst{15-14} = 0x0;
884 let Inst{13-6} = funct;
885 let Inst{5-0} = 0x3b;
888 class MADDS_FM_MM<bits<6> funct>: MMArch {
896 let Inst{31-26} = 0x15;
897 let Inst{25-21} = ft;
898 let Inst{20-16} = fs;
899 let Inst{15-11} = fd;
901 let Inst{5-0} = funct;
904 class COMPACT_BRANCH_FM_MM<bits<5> funct> {
910 let Inst{31-26} = 0x10;
911 let Inst{25-21} = funct;
912 let Inst{20-16} = rs;
913 let Inst{15-0} = offset;
916 class COP0_TLB_FM_MM<bits<10> op> : MMArch {
919 let Inst{31-26} = 0x0;
920 let Inst{25-16} = 0x0;
922 let Inst{5-0} = 0x3c;
925 class SDBBP_FM_MM : MMArch {
930 let Inst{31-26} = 0x0;
931 let Inst{25-16} = code_;
932 let Inst{15-6} = 0x36d;
933 let Inst{5-0} = 0x3c;
936 class RDHWR_FM_MM : MMArch {
942 let Inst{31-26} = 0x0;
943 let Inst{25-21} = rt;
944 let Inst{20-16} = rd;
945 let Inst{15-6} = 0x1ac;
946 let Inst{5-0} = 0x3c;
949 class LWXS_FM_MM<bits<10> funct> {
956 let Inst{31-26} = 0x0;
957 let Inst{25-21} = index;
958 let Inst{20-16} = base;
959 let Inst{15-11} = rd;
961 let Inst{9-0} = funct;
964 class LWM_FM_MM<bits<4> funct> : MMArch {
970 let Inst{31-26} = 0x8;
971 let Inst{25-21} = rt;
972 let Inst{20-16} = addr{20-16};
973 let Inst{15-12} = funct;
974 let Inst{11-0} = addr{11-0};
977 class LWM_FM_MM16<bits<4> funct> : MMArch {
983 let Inst{15-10} = 0x11;
984 let Inst{9-6} = funct;
986 let Inst{3-0} = addr;
989 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
992 bits<5> base = addr{20-16};
993 bits<12> offset = addr{11-0};
997 let Inst{31-26} = op;
998 let Inst{25-21} = hint;
999 let Inst{20-16} = base;
1000 let Inst{15-12} = funct;
1001 let Inst{11-0} = offset;
1004 class CACHE_PREFE_FM_MM<bits<6> op, bits<3> funct> : MMArch {
1007 bits<5> base = addr{20-16};
1008 bits<9> offset = addr{8-0};
1012 let Inst{31-26} = op;
1013 let Inst{25-21} = hint;
1014 let Inst{20-16} = base;
1015 let Inst{15-12} = 0xA;
1016 let Inst{11-9} = funct;
1017 let Inst{8-0} = offset;
1020 class POOL32F_PREFX_FM_MM<bits<6> op, bits<9> funct> : MMArch {
1027 let Inst{31-26} = op;
1028 let Inst{25-21} = index;
1029 let Inst{20-16} = base;
1030 let Inst{15-11} = hint;
1031 let Inst{10-9} = 0x0;
1032 let Inst{8-0} = funct;
1035 class BARRIER_FM_MM<bits<5> op> : MMArch {
1038 let Inst{31-26} = 0x0;
1039 let Inst{25-21} = 0x0;
1040 let Inst{20-16} = 0x0;
1041 let Inst{15-11} = op;
1042 let Inst{10-6} = 0x0;
1043 let Inst{5-0} = 0x0;
1046 class ADDIUPC_FM_MM {
1052 let Inst{31-26} = 0x1e;
1053 let Inst{25-23} = rs;
1054 let Inst{22-0} = imm;
1057 class POOL32A_CFTC2_FM_MM<bits<10> funct> : MMArch {
1063 let Inst{31-26} = 0b000000;
1064 let Inst{25-21} = rt;
1065 let Inst{20-16} = impl;
1066 let Inst{15-6} = funct;
1067 let Inst{5-0} = 0b111100;
1070 class POOL32A_TLBINV_FM_MM<bits<10> funct> : MMArch {
1073 let Inst{31-26} = 0x0;
1074 let Inst{25-16} = 0x0;
1075 let Inst{15-6} = funct;
1076 let Inst{5-0} = 0b111100;
1079 class POOL32A_MFTC0_FM_MM<bits<5> funct, bits<6> opcode> : MMArch {
1086 let Inst{31-26} = 0b000000;
1087 let Inst{25-21} = rt;
1088 let Inst{20-16} = rs;
1089 let Inst{15-14} = 0;
1090 let Inst{13-11} = sel;
1091 let Inst{10-6} = funct;
1092 let Inst{5-0} = opcode;
1095 class POOL32A_HYPCALL_FM_MM : MMArch {
1100 let Inst{31-26} = 0x0;
1101 let Inst{25-16} = code_;
1102 let Inst{15-6} = 0b1100001101;
1103 let Inst{5-0} = 0b111100;