Fix uninitialized variable
[llvm-core.git] / lib / Target / Mips / MipsISelDAGToDAG.h
blob09003459d180eb707d68afca95b7e0e1b863e4df
1 //===---- MipsISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
17 #include "Mips.h"
18 #include "MipsSubtarget.h"
19 #include "MipsTargetMachine.h"
20 #include "llvm/CodeGen/SelectionDAGISel.h"
22 //===----------------------------------------------------------------------===//
23 // Instruction Selector Implementation
24 //===----------------------------------------------------------------------===//
26 //===----------------------------------------------------------------------===//
27 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
28 // instructions for SelectionDAG operations.
29 //===----------------------------------------------------------------------===//
30 namespace llvm {
32 class MipsDAGToDAGISel : public SelectionDAGISel {
33 public:
34 explicit MipsDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL)
35 : SelectionDAGISel(TM, OL), Subtarget(nullptr) {}
37 // Pass Name
38 StringRef getPassName() const override {
39 return "MIPS DAG->DAG Pattern Instruction Selection";
42 bool runOnMachineFunction(MachineFunction &MF) override;
44 void getAnalysisUsage(AnalysisUsage &AU) const override;
46 protected:
47 SDNode *getGlobalBaseReg();
49 /// Keep a pointer to the MipsSubtarget around so that we can make the right
50 /// decision when generating code for different targets.
51 const MipsSubtarget *Subtarget;
53 private:
54 // Include the pieces autogenerated from the target description.
55 #include "MipsGenDAGISel.inc"
57 // Complex Pattern.
58 /// (reg + imm).
59 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
60 SDValue &Offset) const;
62 /// Fall back on this function if all else fails.
63 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
64 SDValue &Offset) const;
66 /// Match integer address pattern.
67 virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
68 SDValue &Offset) const;
70 virtual bool selectIntAddr11MM(SDValue Addr, SDValue &Base,
71 SDValue &Offset) const;
73 virtual bool selectIntAddr12MM(SDValue Addr, SDValue &Base,
74 SDValue &Offset) const;
76 virtual bool selectIntAddr16MM(SDValue Addr, SDValue &Base,
77 SDValue &Offset) const;
79 virtual bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
80 SDValue &Offset) const;
82 /// Match addr+simm10 and addr
83 virtual bool selectIntAddrSImm10(SDValue Addr, SDValue &Base,
84 SDValue &Offset) const;
86 virtual bool selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base,
87 SDValue &Offset) const;
89 virtual bool selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base,
90 SDValue &Offset) const;
92 virtual bool selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
93 SDValue &Offset) const;
95 virtual bool selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset);
96 virtual bool selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset);
98 /// Select constant vector splats.
99 virtual bool selectVSplat(SDNode *N, APInt &Imm,
100 unsigned MinSizeInBits) const;
101 /// Select constant vector splats whose value fits in a uimm1.
102 virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const;
103 /// Select constant vector splats whose value fits in a uimm2.
104 virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const;
105 /// Select constant vector splats whose value fits in a uimm3.
106 virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const;
107 /// Select constant vector splats whose value fits in a uimm4.
108 virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const;
109 /// Select constant vector splats whose value fits in a uimm5.
110 virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const;
111 /// Select constant vector splats whose value fits in a uimm6.
112 virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const;
113 /// Select constant vector splats whose value fits in a uimm8.
114 virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const;
115 /// Select constant vector splats whose value fits in a simm5.
116 virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const;
117 /// Select constant vector splats whose value is a power of 2.
118 virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const;
119 /// Select constant vector splats whose value is the inverse of a
120 /// power of 2.
121 virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const;
122 /// Select constant vector splats whose value is a run of set bits
123 /// ending at the most significant bit
124 virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const;
125 /// Select constant vector splats whose value is a run of set bits
126 /// starting at bit zero.
127 virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const;
129 void Select(SDNode *N) override;
131 virtual bool trySelect(SDNode *Node) = 0;
133 // getImm - Return a target constant with the specified value.
134 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
135 return CurDAG->getTargetConstant(Imm, SDLoc(Node), Node->getValueType(0));
138 virtual void processFunctionAfterISel(MachineFunction &MF) = 0;
140 bool SelectInlineAsmMemoryOperand(const SDValue &Op,
141 unsigned ConstraintID,
142 std::vector<SDValue> &OutOps) override;
146 #endif