| blob | b4d73ce9e5abca40cbb3c095106b3d47d1b0a6d3 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+f16c | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge | FileCheck %s --check-prefix=CHECK --check-prefix=IVY
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER2
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
11 define <4 x float> @test_vcvtph2ps_128(<8 x i16> %a0, <8 x i16> *%a1) {
12 ; GENERIC-LABEL: test_vcvtph2ps_128:
13 ; GENERIC: # %bb.0:
14 ; GENERIC-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [8:1.00]
15 ; GENERIC-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [3:1.00]
16 ; GENERIC-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
17 ; GENERIC-NEXT: retq # sched: [1:1.00]
18 ;
19 ; IVY-LABEL: test_vcvtph2ps_128:
20 ; IVY: # %bb.0:
21 ; IVY-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [8:1.00]
22 ; IVY-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [3:1.00]
23 ; IVY-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
24 ; IVY-NEXT: retq # sched: [1:1.00]
25 ;
26 ; HASWELL-LABEL: test_vcvtph2ps_128:
27 ; HASWELL: # %bb.0:
28 ; HASWELL-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [6:1.00]
29 ; HASWELL-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [2:1.00]
30 ; HASWELL-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
31 ; HASWELL-NEXT: retq # sched: [7:1.00]
32 ;
33 ; BROADWELL-LABEL: test_vcvtph2ps_128:
34 ; BROADWELL: # %bb.0:
35 ; BROADWELL-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [6:1.00]
36 ; BROADWELL-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [2:1.00]
37 ; BROADWELL-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
38 ; BROADWELL-NEXT: retq # sched: [7:1.00]
39 ;
40 ; SKYLAKE-LABEL: test_vcvtph2ps_128:
41 ; SKYLAKE: # %bb.0:
42 ; SKYLAKE-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [9:0.50]
43 ; SKYLAKE-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [5:1.00]
44 ; SKYLAKE-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
45 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
46 ;
47 ; BDVER2-LABEL: test_vcvtph2ps_128:
48 ; BDVER2: # %bb.0:
49 ; BDVER2-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [13:1.00]
50 ; BDVER2-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [8:1.00]
51 ; BDVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [5:1.00]
52 ; BDVER2-NEXT: retq # sched: [5:1.00]
53 ;
54 ; BTVER2-LABEL: test_vcvtph2ps_128:
55 ; BTVER2: # %bb.0:
56 ; BTVER2-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [8:1.00]
57 ; BTVER2-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [3:1.00]
58 ; BTVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
59 ; BTVER2-NEXT: retq # sched: [4:1.00]
60 ;
61 ; ZNVER1-LABEL: test_vcvtph2ps_128:
62 ; ZNVER1: # %bb.0:
63 ; ZNVER1-NEXT: vcvtph2ps (%rdi), %xmm1 # sched: [100:0.25]
64 ; ZNVER1-NEXT: vcvtph2ps %xmm0, %xmm0 # sched: [100:0.25]
65 ; ZNVER1-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [3:1.00]
66 ; ZNVER1-NEXT: retq # sched: [1:0.50]
67 %1 = load <8 x i16>, <8 x i16> *%a1
68 %2 = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %1)
69 %3 = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0)
70 %4 = fadd <4 x float> %2, %3
71 ret <4 x float> %4
72 }
73 declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>)
75 define <8 x float> @test_vcvtph2ps_256(<8 x i16> %a0, <8 x i16> *%a1) {
76 ; GENERIC-LABEL: test_vcvtph2ps_256:
77 ; GENERIC: # %bb.0:
78 ; GENERIC-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [8:1.00]
79 ; GENERIC-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [3:1.00]
80 ; GENERIC-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
81 ; GENERIC-NEXT: retq # sched: [1:1.00]
82 ;
83 ; IVY-LABEL: test_vcvtph2ps_256:
84 ; IVY: # %bb.0:
85 ; IVY-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [8:1.00]
86 ; IVY-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [3:1.00]
87 ; IVY-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
88 ; IVY-NEXT: retq # sched: [1:1.00]
89 ;
90 ; HASWELL-LABEL: test_vcvtph2ps_256:
91 ; HASWELL: # %bb.0:
92 ; HASWELL-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [7:1.00]
93 ; HASWELL-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [2:1.00]
94 ; HASWELL-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
95 ; HASWELL-NEXT: retq # sched: [7:1.00]
96 ;
97 ; BROADWELL-LABEL: test_vcvtph2ps_256:
98 ; BROADWELL: # %bb.0:
99 ; BROADWELL-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [6:1.00]
100 ; BROADWELL-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [2:1.00]
101 ; BROADWELL-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
102 ; BROADWELL-NEXT: retq # sched: [7:1.00]
103 ;
104 ; SKYLAKE-LABEL: test_vcvtph2ps_256:
105 ; SKYLAKE: # %bb.0:
106 ; SKYLAKE-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [10:0.50]
107 ; SKYLAKE-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [7:1.00]
108 ; SKYLAKE-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [4:0.50]
109 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
110 ;
111 ; BDVER2-LABEL: test_vcvtph2ps_256:
112 ; BDVER2: # %bb.0:
113 ; BDVER2-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [13:2.00]
114 ; BDVER2-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [8:2.00]
115 ; BDVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [5:2.00]
116 ; BDVER2-NEXT: retq # sched: [5:1.00]
117 ;
118 ; BTVER2-LABEL: test_vcvtph2ps_256:
119 ; BTVER2: # %bb.0:
120 ; BTVER2-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [8:2.00]
121 ; BTVER2-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [3:2.00]
122 ; BTVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:2.00]
123 ; BTVER2-NEXT: retq # sched: [4:1.00]
124 ;
125 ; ZNVER1-LABEL: test_vcvtph2ps_256:
126 ; ZNVER1: # %bb.0:
127 ; ZNVER1-NEXT: vcvtph2ps (%rdi), %ymm1 # sched: [100:0.25]
128 ; ZNVER1-NEXT: vcvtph2ps %xmm0, %ymm0 # sched: [100:0.25]
129 ; ZNVER1-NEXT: vaddps %ymm0, %ymm1, %ymm0 # sched: [3:1.00]
130 ; ZNVER1-NEXT: retq # sched: [1:0.50]
131 %1 = load <8 x i16>, <8 x i16> *%a1
132 %2 = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %1)
133 %3 = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0)
134 %4 = fadd <8 x float> %2, %3
135 ret <8 x float> %4
136 }
137 declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>)
139 define <8 x i16> @test_vcvtps2ph_128(<4 x float> %a0, <4 x float> %a1, <4 x i16> *%a2) {
140 ; GENERIC-LABEL: test_vcvtps2ph_128:
141 ; GENERIC: # %bb.0:
142 ; GENERIC-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00]
143 ; GENERIC-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [4:1.00]
144 ; GENERIC-NEXT: retq # sched: [1:1.00]
145 ;
146 ; IVY-LABEL: test_vcvtps2ph_128:
147 ; IVY: # %bb.0:
148 ; IVY-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00]
149 ; IVY-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [4:1.00]
150 ; IVY-NEXT: retq # sched: [1:1.00]
151 ;
152 ; HASWELL-LABEL: test_vcvtps2ph_128:
153 ; HASWELL: # %bb.0:
154 ; HASWELL-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [4:1.00]
155 ; HASWELL-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [5:1.00]
156 ; HASWELL-NEXT: retq # sched: [7:1.00]
157 ;
158 ; BROADWELL-LABEL: test_vcvtps2ph_128:
159 ; BROADWELL: # %bb.0:
160 ; BROADWELL-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [4:1.00]
161 ; BROADWELL-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [5:1.00]
162 ; BROADWELL-NEXT: retq # sched: [7:1.00]
163 ;
164 ; SKYLAKE-LABEL: test_vcvtps2ph_128:
165 ; SKYLAKE: # %bb.0:
166 ; SKYLAKE-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [5:1.00]
167 ; SKYLAKE-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [6:1.00]
168 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
169 ;
170 ; BDVER2-LABEL: test_vcvtps2ph_128:
171 ; BDVER2: # %bb.0:
172 ; BDVER2-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [8:1.00]
173 ; BDVER2-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [4:1.00]
174 ; BDVER2-NEXT: retq # sched: [5:1.00]
175 ;
176 ; BTVER2-LABEL: test_vcvtps2ph_128:
177 ; BTVER2: # %bb.0:
178 ; BTVER2-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00]
179 ; BTVER2-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [4:1.00]
180 ; BTVER2-NEXT: retq # sched: [4:1.00]
181 ;
182 ; ZNVER1-LABEL: test_vcvtps2ph_128:
183 ; ZNVER1: # %bb.0:
184 ; ZNVER1-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [100:0.25]
185 ; ZNVER1-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [100:0.25]
186 ; ZNVER1-NEXT: retq # sched: [1:0.50]
187 %1 = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0)
188 %2 = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a1, i32 0)
189 %3 = shufflevector <8 x i16> %2, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
190 store <4 x i16> %3, <4 x i16> *%a2
191 ret <8 x i16> %1
192 }
193 declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32)
195 define <8 x i16> @test_vcvtps2ph_256(<8 x float> %a0, <8 x float> %a1, <8 x i16> *%a2) {
196 ; GENERIC-LABEL: test_vcvtps2ph_256:
197 ; GENERIC: # %bb.0:
198 ; GENERIC-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [3:1.00]
199 ; GENERIC-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [4:1.00]
200 ; GENERIC-NEXT: vzeroupper # sched: [1:1.00]
201 ; GENERIC-NEXT: retq # sched: [1:1.00]
202 ;
203 ; IVY-LABEL: test_vcvtps2ph_256:
204 ; IVY: # %bb.0:
205 ; IVY-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [3:1.00]
206 ; IVY-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [4:1.00]
207 ; IVY-NEXT: vzeroupper # sched: [1:1.00]
208 ; IVY-NEXT: retq # sched: [1:1.00]
209 ;
210 ; HASWELL-LABEL: test_vcvtps2ph_256:
211 ; HASWELL: # %bb.0:
212 ; HASWELL-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [6:1.00]
213 ; HASWELL-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [7:1.00]
214 ; HASWELL-NEXT: vzeroupper # sched: [0:1.00]
215 ; HASWELL-NEXT: retq # sched: [7:1.00]
216 ;
217 ; BROADWELL-LABEL: test_vcvtps2ph_256:
218 ; BROADWELL: # %bb.0:
219 ; BROADWELL-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [6:1.00]
220 ; BROADWELL-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [7:1.00]
221 ; BROADWELL-NEXT: vzeroupper # sched: [0:1.00]
222 ; BROADWELL-NEXT: retq # sched: [7:1.00]
223 ;
224 ; SKYLAKE-LABEL: test_vcvtps2ph_256:
225 ; SKYLAKE: # %bb.0:
226 ; SKYLAKE-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [7:1.00]
227 ; SKYLAKE-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [8:1.00]
228 ; SKYLAKE-NEXT: vzeroupper # sched: [0:0.67]
229 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
230 ;
231 ; BDVER2-LABEL: test_vcvtps2ph_256:
232 ; BDVER2: # %bb.0:
233 ; BDVER2-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [8:2.00]
234 ; BDVER2-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [4:2.00]
235 ; BDVER2-NEXT: vzeroupper # sched: [46:4.00]
236 ; BDVER2-NEXT: retq # sched: [5:1.00]
237 ;
238 ; BTVER2-LABEL: test_vcvtps2ph_256:
239 ; BTVER2: # %bb.0:
240 ; BTVER2-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [6:2.00]
241 ; BTVER2-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [7:2.00]
242 ; BTVER2-NEXT: retq # sched: [4:1.00]
243 ;
244 ; ZNVER1-LABEL: test_vcvtps2ph_256:
245 ; ZNVER1: # %bb.0:
246 ; ZNVER1-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [100:0.25]
247 ; ZNVER1-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [100:0.25]
248 ; ZNVER1-NEXT: vzeroupper # sched: [100:0.25]
249 ; ZNVER1-NEXT: retq # sched: [1:0.50]
250 %1 = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0)
251 %2 = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a1, i32 0)
252 store <8 x i16> %2, <8 x i16> *%a2
253 ret <8 x i16> %1
254 }
255 declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32)