1 lli - directly execute programs from LLVM bitcode
2 =================================================
7 :program:`lli` [*options*] [*filename*] [*program args*]
12 :program:`lli` directly executes programs in LLVM bitcode format. It takes a program
13 in LLVM bitcode format and executes it using a just-in-time compiler or an
16 :program:`lli` is *not* an emulator. It will not execute IR of different architectures
17 and it can only interpret (or JIT-compile) for the host architecture.
19 The JIT compiler takes the same arguments as other tools, like :program:`llc`,
20 but they don't necessarily work for the interpreter.
22 If `filename` is not specified, then :program:`lli` reads the LLVM bitcode for the
23 program from standard input.
25 The optional *args* specified on the command line are passed to the program as
31 .. option:: -fake-argv0=executable
33 Override the ``argv[0]`` value passed into the executing program.
35 .. option:: -force-interpreter={false,true}
37 If set to true, use the interpreter even if a just-in-time compiler is available
38 for this architecture. Defaults to false.
42 Print a summary of command line options.
44 .. option:: -load=pluginfilename
46 Causes :program:`lli` to load the plugin (shared object) named *pluginfilename* and use
51 Print statistics from the code-generation passes. This is only meaningful for
52 the just-in-time compiler, at present.
54 .. option:: -time-passes
56 Record the amount of time needed for each code-generation pass and print it to
61 Print out the version of :program:`lli` and exit without doing anything else.
66 .. option:: -mtriple=target triple
68 Override the target triple specified in the input bitcode file with the
69 specified string. This may result in a crash if you pick an
70 architecture which is not compatible with the current system.
72 .. option:: -march=arch
74 Specify the architecture for which to generate assembly, overriding the target
75 encoded in the bitcode file. See the output of **llc -help** for a list of
76 valid architectures. By default this is inferred from the target triple or
77 autodetected to the current architecture.
79 .. option:: -mcpu=cpuname
81 Specify a specific chip in the current architecture to generate code for.
82 By default this is inferred from the target triple and autodetected to
83 the current architecture. For a list of available CPUs, use:
84 **llvm-as < /dev/null | llc -march=xyz -mcpu=help**
86 .. option:: -mattr=a1,+a2,-a3,...
88 Override or control specific attributes of the target, such as whether SIMD
89 operations are enabled or not. The default set of attributes is set by the
90 current CPU. For a list of available attributes, use:
91 **llvm-as < /dev/null | llc -march=xyz -mattr=help**
93 FLOATING POINT OPTIONS
94 ----------------------
96 .. option:: -disable-excess-fp-precision
98 Disable optimizations that may increase floating point precision.
100 .. option:: -enable-no-infs-fp-math
102 Enable optimizations that assume no Inf values.
104 .. option:: -enable-no-nans-fp-math
106 Enable optimizations that assume no NAN values.
108 .. option:: -enable-unsafe-fp-math
110 Causes :program:`lli` to enable optimizations that may decrease floating point
113 .. option:: -soft-float
115 Causes :program:`lli` to generate software floating point library calls instead of
116 equivalent hardware instructions.
118 CODE GENERATION OPTIONS
119 -----------------------
121 .. option:: -code-model=model
123 Choose the code model from:
127 default: Target default code model
128 tiny: Tiny code model
129 small: Small code model
130 kernel: Kernel code model
131 medium: Medium code model
132 large: Large code model
134 .. option:: -disable-post-RA-scheduler
136 Disable scheduling after register allocation.
138 .. option:: -disable-spill-fusing
140 Disable fusing of spill code into instructions.
142 .. option:: -jit-enable-eh
144 Exception handling should be enabled in the just-in-time compiler.
146 .. option:: -join-liveintervals
148 Coalesce copies (default=true).
150 .. option:: -nozero-initialized-in-bss
152 Don't place zero-initialized symbols into the BSS section.
154 .. option:: -pre-RA-sched=scheduler
156 Instruction schedulers available (before register allocation):
160 =default: Best scheduler for the target
161 =none: No scheduling: breadth first sequencing
162 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
163 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
164 =list-burr: Bottom-up register reduction list scheduling
165 =list-tdrr: Top-down register reduction list scheduling
166 =list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code
168 .. option:: -regalloc=allocator
170 Register allocator to use (default=linearscan)
174 =bigblock: Big-block register allocator
175 =linearscan: linear scan register allocator =local - local register allocator
176 =simple: simple register allocator
178 .. option:: -relocation-model=model
180 Choose relocation model from:
184 =default: Target default relocation model
185 =static: Non-relocatable code =pic - Fully relocatable, position independent code
186 =dynamic-no-pic: Relocatable external references, non-relocatable code
190 Spiller to use (default=local)
194 =simple: simple spiller
195 =local: local spiller
197 .. option:: -x86-asm-syntax=syntax
199 Choose style of code to emit from X86 backend:
203 =att: Emit AT&T-style assembly
204 =intel: Emit Intel-style assembly
209 If :program:`lli` fails to load the program, it will exit with an exit code of 1.
210 Otherwise, it will return the exit code of the program it executes.