1 # RUN: llc -mtriple=armv8.1m.main -mattr=+lob -run-pass=arm-low-overhead-loops --verify-machineinstrs %s -o - | FileCheck %s
4 # CHECK-NOT: t2LEUpdate
7 ; ModuleID = 'massive.ll'
8 source_filename = "massive.ll"
9 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
10 target triple = "thumbv8.1m.main"
12 define dso_local arm_aapcscc void @massive(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) {
14 %cmp8 = icmp eq i32 %N, 0
15 br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader
17 for.body.preheader: ; preds = %entry
18 %scevgep = getelementptr i32, i32* %a, i32 -1
19 %scevgep4 = getelementptr i32, i32* %c, i32 -1
20 %scevgep8 = getelementptr i32, i32* %b, i32 -1
21 call void @llvm.set.loop.iterations.i32(i32 %N)
24 for.cond.cleanup: ; preds = %for.body, %entry
27 for.body: ; preds = %for.body, %for.body.preheader
28 %lsr.iv9 = phi i32* [ %scevgep8, %for.body.preheader ], [ %scevgep10, %for.body ]
29 %lsr.iv5 = phi i32* [ %scevgep4, %for.body.preheader ], [ %scevgep6, %for.body ]
30 %lsr.iv1 = phi i32* [ %scevgep, %for.body.preheader ], [ %scevgep2, %for.body ]
31 %0 = phi i32 [ %N, %for.body.preheader ], [ %3, %for.body ]
32 %size = call i32 @llvm.arm.space(i32 4096, i32 undef)
33 %scevgep3 = getelementptr i32, i32* %lsr.iv9, i32 1
34 %1 = load i32, i32* %scevgep3, align 4
35 %scevgep7 = getelementptr i32, i32* %lsr.iv5, i32 1
36 %2 = load i32, i32* %scevgep7, align 4
37 %mul = mul nsw i32 %2, %1
38 %scevgep11 = getelementptr i32, i32* %lsr.iv1, i32 1
39 store i32 %mul, i32* %scevgep11, align 4
40 %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1
41 %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1
42 %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1
43 %3 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1)
44 %4 = icmp ne i32 %3, 0
45 br i1 %4, label %for.body, label %for.cond.cleanup
48 ; Function Attrs: nounwind
49 declare i32 @llvm.arm.space(i32 immarg, i32) #0
51 ; Function Attrs: noduplicate nounwind
52 declare void @llvm.set.loop.iterations.i32(i32) #1
54 ; Function Attrs: noduplicate nounwind
55 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #1
57 ; Function Attrs: nounwind
58 declare void @llvm.stackprotector(i8*, i8**) #0
60 attributes #0 = { nounwind }
61 attributes #1 = { noduplicate nounwind }
67 exposesReturnsTwice: false
69 regBankSelected: false
72 tracksRegLiveness: true
76 - { reg: '$r0', virtual-reg: '' }
77 - { reg: '$r1', virtual-reg: '' }
78 - { reg: '$r2', virtual-reg: '' }
79 - { reg: '$r3', virtual-reg: '' }
81 isFrameAddressTaken: false
82 isReturnAddressTaken: false
92 cvBytesOfCalleeSavedRegisters: 0
93 hasOpaqueSPAdjustment: false
95 hasMustTailInVarArgFunc: false
101 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
102 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
103 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
104 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
105 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
106 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
109 machineFunctionInfo: {}
112 successors: %bb.1(0x80000000)
113 liveins: $r0, $r1, $r2, $r3, $r7, $lr
115 frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp
116 frame-setup CFI_INSTRUCTION def_cfa_offset 8
117 frame-setup CFI_INSTRUCTION offset $lr, -4
118 frame-setup CFI_INSTRUCTION offset $r7, -8
119 tCMPi8 $r3, 0, 14, $noreg, implicit-def $cpsr
120 t2IT 0, 8, implicit-def $itstate
121 tPOP_RET 0, killed $cpsr, def $r7, def $pc, implicit killed $itstate
122 renamable $r1, dead $cpsr = tSUBi8 killed renamable $r1, 4, 14, $noreg
123 renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 4, 14, $noreg
124 renamable $r0, dead $cpsr = tSUBi8 killed renamable $r0, 4, 14, $noreg
125 $lr = tMOVr $r3, 14, $noreg
126 t2DoLoopStart killed $r3
129 successors: %bb.1(0x7c000000), %bb.2(0x04000000)
130 liveins: $lr, $r0, $r1, $r2
132 dead renamable $r3 = SPACE 4096, undef renamable $r0
133 renamable $r12, renamable $r1 = t2LDR_PRE killed renamable $r1, 4, 14, $noreg :: (load 4 from %ir.scevgep3)
134 renamable $r3, renamable $r2 = t2LDR_PRE killed renamable $r2, 4, 14, $noreg :: (load 4 from %ir.scevgep7)
135 renamable $r3 = nsw t2MUL killed renamable $r3, killed renamable $r12, 14, $noreg
136 early-clobber renamable $r0 = t2STR_PRE killed renamable $r3, killed renamable $r0, 4, 14, $noreg :: (store 4 into %ir.scevgep11)
137 renamable $lr = t2LoopDec killed renamable $lr, 1
138 t2LoopEnd renamable $lr, %bb.1, implicit-def dead $cpsr
141 bb.2.for.cond.cleanup:
142 tPOP_RET 14, $noreg, def $r7, def $pc