[PowerPC] Do not use vectors to codegen bswap with Altivec turned off
[llvm-core.git] / unittests / CodeGen / AArch64SelectionDAGTest.cpp
blob03bfdc2b5b29ef78dd2295f2837437b1d29bb6b0
1 //===- llvm/unittest/CodeGen/AArch64SelectionDAGTest.cpp -------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
10 #include "llvm/CodeGen/SelectionDAG.h"
11 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
12 #include "llvm/AsmParser/Parser.h"
13 #include "llvm/CodeGen/MachineModuleInfo.h"
14 #include "llvm/CodeGen/TargetLowering.h"
15 #include "llvm/Support/SourceMgr.h"
16 #include "llvm/Support/TargetRegistry.h"
17 #include "llvm/Support/TargetSelect.h"
18 #include "llvm/Target/TargetMachine.h"
19 #include "gtest/gtest.h"
21 using namespace llvm;
23 namespace {
25 class AArch64SelectionDAGTest : public testing::Test {
26 protected:
27 static void SetUpTestCase() {
28 InitializeAllTargets();
29 InitializeAllTargetMCs();
32 void SetUp() override {
33 StringRef Assembly = "define void @f() { ret void }";
35 Triple TargetTriple("aarch64--");
36 std::string Error;
37 const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
38 // FIXME: These tests do not depend on AArch64 specifically, but we have to
39 // initialize a target. A skeleton Target for unittests would allow us to
40 // always run these tests.
41 if (!T)
42 return;
44 TargetOptions Options;
45 TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
46 T->createTargetMachine("AArch64", "", "", Options, None, None,
47 CodeGenOpt::Aggressive)));
48 if (!TM)
49 return;
51 SMDiagnostic SMError;
52 M = parseAssemblyString(Assembly, SMError, Context);
53 if (!M)
54 report_fatal_error(SMError.getMessage());
55 M->setDataLayout(TM->createDataLayout());
57 F = M->getFunction("f");
58 if (!F)
59 report_fatal_error("F?");
61 MachineModuleInfo MMI(TM.get());
63 MF = make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F), 0,
64 MMI);
66 DAG = make_unique<SelectionDAG>(*TM, CodeGenOpt::None);
67 if (!DAG)
68 report_fatal_error("DAG?");
69 OptimizationRemarkEmitter ORE(F);
70 DAG->init(*MF, ORE, nullptr, nullptr, nullptr);
73 LLVMContext Context;
74 std::unique_ptr<LLVMTargetMachine> TM;
75 std::unique_ptr<Module> M;
76 Function *F;
77 std::unique_ptr<MachineFunction> MF;
78 std::unique_ptr<SelectionDAG> DAG;
81 TEST_F(AArch64SelectionDAGTest, computeKnownBits_ZERO_EXTEND_VECTOR_INREG) {
82 if (!TM)
83 return;
84 SDLoc Loc;
85 auto Int8VT = EVT::getIntegerVT(Context, 8);
86 auto Int16VT = EVT::getIntegerVT(Context, 16);
87 auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
88 auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
89 auto InVec = DAG->getConstant(0, Loc, InVecVT);
90 auto Op = DAG->getNode(ISD::ZERO_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
91 auto DemandedElts = APInt(2, 3);
92 KnownBits Known;
93 DAG->computeKnownBits(Op, Known, DemandedElts);
94 EXPECT_TRUE(Known.isZero());
97 TEST_F(AArch64SelectionDAGTest, computeKnownBits_EXTRACT_SUBVECTOR) {
98 if (!TM)
99 return;
100 SDLoc Loc;
101 auto IntVT = EVT::getIntegerVT(Context, 8);
102 auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
103 auto IdxVT = EVT::getIntegerVT(Context, 64);
104 auto Vec = DAG->getConstant(0, Loc, VecVT);
105 auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
106 auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
107 auto DemandedElts = APInt(3, 7);
108 KnownBits Known;
109 DAG->computeKnownBits(Op, Known, DemandedElts);
110 EXPECT_TRUE(Known.isZero());
113 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_SIGN_EXTEND_VECTOR_INREG) {
114 if (!TM)
115 return;
116 SDLoc Loc;
117 auto Int8VT = EVT::getIntegerVT(Context, 8);
118 auto Int16VT = EVT::getIntegerVT(Context, 16);
119 auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
120 auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
121 auto InVec = DAG->getConstant(1, Loc, InVecVT);
122 auto Op = DAG->getNode(ISD::SIGN_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
123 auto DemandedElts = APInt(2, 3);
124 EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 15u);
127 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_EXTRACT_SUBVECTOR) {
128 if (!TM)
129 return;
130 SDLoc Loc;
131 auto IntVT = EVT::getIntegerVT(Context, 8);
132 auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
133 auto IdxVT = EVT::getIntegerVT(Context, 64);
134 auto Vec = DAG->getConstant(1, Loc, VecVT);
135 auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
136 auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
137 auto DemandedElts = APInt(3, 7);
138 EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 7u);
141 TEST_F(AArch64SelectionDAGTest, SimplifyDemandedVectorElts_EXTRACT_SUBVECTOR) {
142 if (!TM)
143 return;
145 TargetLowering TL(*TM);
147 SDLoc Loc;
148 auto IntVT = EVT::getIntegerVT(Context, 8);
149 auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
150 auto IdxVT = EVT::getIntegerVT(Context, 64);
151 auto Vec = DAG->getConstant(1, Loc, VecVT);
152 auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
153 auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
154 auto DemandedElts = APInt(3, 7);
155 auto KnownUndef = APInt(3, 0);
156 auto KnownZero = APInt(3, 0);
157 TargetLowering::TargetLoweringOpt TLO(*DAG, false, false);
158 EXPECT_EQ(TL.SimplifyDemandedVectorElts(Op, DemandedElts, KnownUndef,
159 KnownZero, TLO),
160 false);
163 } // end anonymous namespace