lib/CodeGen/DeadMachineInstructionElim.cpp

   1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/ADT/Statistic.h"
  15 #include "llvm/CodeGen/MachineFunctionPass.h"
  16 #include "llvm/CodeGen/MachineRegisterInfo.h"
  17 #include "llvm/CodeGen/Passes.h"
  18 #include "llvm/CodeGen/TargetSubtargetInfo.h"
  19 #include "llvm/Pass.h"
  20 #include "llvm/Support/Debug.h"
  21 #include "llvm/Support/raw_ostream.h"
  22
  23 using namespace llvm;
  24
  25 #define DEBUG_TYPE "dead-mi-elimination"
  26
  27 STATISTIC(NumDeletes,          "Number of dead instructions deleted");
  28
  29 namespace {
  30   class DeadMachineInstructionElim : public MachineFunctionPass {
  31     bool runOnMachineFunction(MachineFunction &MF) override;
  32
  33     const TargetRegisterInfo *TRI;
  34     const MachineRegisterInfo *MRI;
  35     const TargetInstrInfo *TII;
  36     BitVector LivePhysRegs;
  37
  38   public:
  39     static char ID; // Pass identification, replacement for typeid
  40     DeadMachineInstructionElim() : MachineFunctionPass(ID) {
  41      initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
  42     }
  43
  44     void getAnalysisUsage(AnalysisUsage &AU) const override {
  45       AU.setPreservesCFG();
  46       MachineFunctionPass::getAnalysisUsage(AU);
  47     }
  48
  49   private:
  50     bool isDead(const MachineInstr *MI) const;
  51   };
  52 }
  53 char DeadMachineInstructionElim::ID = 0;
  54 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
  55
  56 INITIALIZE_PASS(DeadMachineInstructionElim, DEBUG_TYPE,
  57                 "Remove dead machine instructions", false, false)
  58
  59 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
  60   // Technically speaking inline asm without side effects and no defs can still
  61   // be deleted. But there is so much bad inline asm code out there, we should
  62   // let them be.
  63   if (MI->isInlineAsm())
  64     return false;
  65
  66   // Don't delete frame allocation labels.
  67   if (MI->getOpcode() == TargetOpcode::LOCAL_ESCAPE)
  68     return false;
  69
  70   // Don't delete instructions with side effects.
  71   bool SawStore = false;
  72   if (!MI->isSafeToMove(nullptr, SawStore) && !MI->isPHI())
  73     return false;
  74
  75   // Examine each operand.
  76   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
  77     const MachineOperand &MO = MI->getOperand(i);
  78     if (MO.isReg() && MO.isDef()) {
  79       unsigned Reg = MO.getReg();
  80       if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
  81         // Don't delete live physreg defs, or any reserved register defs.
  82         if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
  83           return false;
  84       } else {
  85         if (!MRI->use_nodbg_empty(Reg))
  86           // This def has a non-debug use. Don't delete the instruction!
  87           return false;
  88       }
  89     }
  90   }
  91
  92   // If there are no defs with uses, the instruction is dead.
  93   return true;
  94 }
  95
  96 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
  97   if (skipFunction(MF.getFunction()))
  98     return false;
  99
 100   bool AnyChanges = false;
 101   MRI = &MF.getRegInfo();
 102   TRI = MF.getSubtarget().getRegisterInfo();
 103   TII = MF.getSubtarget().getInstrInfo();
 104
 105   // Loop over all instructions in all blocks, from bottom to top, so that it's
 106   // more likely that chains of dependent but ultimately dead instructions will
 107   // be cleaned up.
 108   for (MachineBasicBlock &MBB : make_range(MF.rbegin(), MF.rend())) {
 109     // Start out assuming that reserved registers are live out of this block.
 110     LivePhysRegs = MRI->getReservedRegs();
 111
 112     // Add live-ins from successors to LivePhysRegs. Normally, physregs are not
 113     // live across blocks, but some targets (x86) can have flags live out of a
 114     // block.
 115     for (MachineBasicBlock::succ_iterator S = MBB.succ_begin(),
 116            E = MBB.succ_end(); S != E; S++)
 117       for (const auto &LI : (*S)->liveins())
 118         LivePhysRegs.set(LI.PhysReg);
 119
 120     // Now scan the instructions and delete dead ones, tracking physreg
 121     // liveness as we go.
 122     for (MachineBasicBlock::reverse_iterator MII = MBB.rbegin(),
 123          MIE = MBB.rend(); MII != MIE; ) {
 124       MachineInstr *MI = &*MII++;
 125
 126       // If the instruction is dead, delete it!
 127       if (isDead(MI)) {
 128         LLVM_DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
 129         // It is possible that some DBG_VALUE instructions refer to this
 130         // instruction.  They get marked as undef and will be deleted
 131         // in the live debug variable analysis.
 132         MI->eraseFromParentAndMarkDBGValuesForRemoval();
 133         AnyChanges = true;
 134         ++NumDeletes;
 135         continue;
 136       }
 137
 138       // Record the physreg defs.
 139       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
 140         const MachineOperand &MO = MI->getOperand(i);
 141         if (MO.isReg() && MO.isDef()) {
 142           unsigned Reg = MO.getReg();
 143           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
 144             // Check the subreg set, not the alias set, because a def
 145             // of a super-register may still be partially live after
 146             // this def.
 147             for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
 148                  SR.isValid(); ++SR)
 149               LivePhysRegs.reset(*SR);
 150           }
 151         } else if (MO.isRegMask()) {
 152           // Register mask of preserved registers. All clobbers are dead.
 153           LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
 154         }
 155       }
 156       // Record the physreg uses, after the defs, in case a physreg is
 157       // both defined and used in the same instruction.
 158       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
 159         const MachineOperand &MO = MI->getOperand(i);
 160         if (MO.isReg() && MO.isUse()) {
 161           unsigned Reg = MO.getReg();
 162           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
 163             for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
 164               LivePhysRegs.set(*AI);
 165           }
 166         }
 167       }
 168     }
 169   }
 170
 171   LivePhysRegs.clear();
 172   return AnyChanges;
 173 }