1 //===- MIParser.h - Machine Instructions Parser -----------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the function that parses the machine instructions.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
15 #define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/ADT/StringMap.h"
19 #include "llvm/Support/Allocator.h"
23 class MachineBasicBlock
;
24 class MachineFunction
;
31 class TargetRegisterClass
;
35 UNKNOWN
, NORMAL
, GENERIC
, REGBANK
37 bool Explicit
= false; ///< VReg was explicitly specified in the .mir file.
39 const TargetRegisterClass
*RC
;
40 const RegisterBank
*RegBank
;
43 unsigned PreferredReg
= 0;
46 using Name2RegClassMap
= StringMap
<const TargetRegisterClass
*>;
47 using Name2RegBankMap
= StringMap
<const RegisterBank
*>;
49 struct PerFunctionMIParsingState
{
50 BumpPtrAllocator Allocator
;
53 const SlotMapping
&IRSlots
;
54 const Name2RegClassMap
&Names2RegClasses
;
55 const Name2RegBankMap
&Names2RegBanks
;
57 DenseMap
<unsigned, MachineBasicBlock
*> MBBSlots
;
58 DenseMap
<unsigned, VRegInfo
*> VRegInfos
;
59 StringMap
<VRegInfo
*> VRegInfosNamed
;
60 DenseMap
<unsigned, int> FixedStackObjectSlots
;
61 DenseMap
<unsigned, int> StackObjectSlots
;
62 DenseMap
<unsigned, unsigned> ConstantPoolSlots
;
63 DenseMap
<unsigned, unsigned> JumpTableSlots
;
65 PerFunctionMIParsingState(MachineFunction
&MF
, SourceMgr
&SM
,
66 const SlotMapping
&IRSlots
,
67 const Name2RegClassMap
&Names2RegClasses
,
68 const Name2RegBankMap
&Names2RegBanks
);
70 VRegInfo
&getVRegInfo(unsigned Num
);
71 VRegInfo
&getVRegInfoNamed(StringRef RegName
);
74 /// Parse the machine basic block definitions, and skip the machine
77 /// This function runs the first parsing pass on the machine function's body.
78 /// It parses only the machine basic block definitions and creates the machine
79 /// basic blocks in the given machine function.
81 /// The machine instructions aren't parsed during the first pass because all
82 /// the machine basic blocks aren't defined yet - this makes it impossible to
83 /// resolve the machine basic block references.
85 /// Return true if an error occurred.
86 bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState
&PFS
,
87 StringRef Src
, SMDiagnostic
&Error
);
89 /// Parse the machine instructions.
91 /// This function runs the second parsing pass on the machine function's body.
92 /// It skips the machine basic block definitions and parses only the machine
93 /// instructions and basic block attributes like liveins and successors.
95 /// The second parsing pass assumes that the first parsing pass already ran
96 /// on the given source string.
98 /// Return true if an error occurred.
99 bool parseMachineInstructions(PerFunctionMIParsingState
&PFS
, StringRef Src
,
100 SMDiagnostic
&Error
);
102 bool parseMBBReference(PerFunctionMIParsingState
&PFS
,
103 MachineBasicBlock
*&MBB
, StringRef Src
,
104 SMDiagnostic
&Error
);
106 bool parseRegisterReference(PerFunctionMIParsingState
&PFS
,
107 unsigned &Reg
, StringRef Src
,
108 SMDiagnostic
&Error
);
110 bool parseNamedRegisterReference(PerFunctionMIParsingState
&PFS
, unsigned &Reg
,
111 StringRef Src
, SMDiagnostic
&Error
);
113 bool parseVirtualRegisterReference(PerFunctionMIParsingState
&PFS
,
114 VRegInfo
*&Info
, StringRef Src
,
115 SMDiagnostic
&Error
);
117 bool parseStackObjectReference(PerFunctionMIParsingState
&PFS
, int &FI
,
118 StringRef Src
, SMDiagnostic
&Error
);
120 bool parseMDNode(PerFunctionMIParsingState
&PFS
, MDNode
*&Node
, StringRef Src
,
121 SMDiagnostic
&Error
);
123 } // end namespace llvm
125 #endif // LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H