[AMDGPU][AsmParser][NFC] Get rid of custom default operand handlers.
[llvm-project.git] / clang / lib / Basic / Targets / Lanai.h
blob144cbc7de98931c61937075c9073579474287871
1 //===--- Lanai.h - Declare Lanai target feature support ---------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares Lanai TargetInfo objects.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LANAI_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_LANAI_H
16 #include "clang/Basic/TargetInfo.h"
17 #include "clang/Basic/TargetOptions.h"
18 #include "llvm/Support/Compiler.h"
19 #include "llvm/TargetParser/Triple.h"
21 namespace clang {
22 namespace targets {
24 class LLVM_LIBRARY_VISIBILITY LanaiTargetInfo : public TargetInfo {
25 // Class for Lanai (32-bit).
26 // The CPU profiles supported by the Lanai backend
27 enum CPUKind {
28 CK_NONE,
29 CK_V11,
30 } CPU;
32 static const TargetInfo::GCCRegAlias GCCRegAliases[];
33 static const char *const GCCRegNames[];
35 public:
36 LanaiTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
37 : TargetInfo(Triple) {
38 // Description string has to be kept in sync with backend.
39 resetDataLayout("E" // Big endian
40 "-m:e" // ELF name manging
41 "-p:32:32" // 32 bit pointers, 32 bit aligned
42 "-i64:64" // 64 bit integers, 64 bit aligned
43 "-a:0:32" // 32 bit alignment of objects of aggregate type
44 "-n32" // 32 bit native integer width
45 "-S64" // 64 bit natural stack alignment
48 // Setting RegParmMax equal to what mregparm was set to in the old
49 // toolchain
50 RegParmMax = 4;
52 // Set the default CPU to V11
53 CPU = CK_V11;
55 // Temporary approach to make everything at least word-aligned and allow for
56 // safely casting between pointers with different alignment requirements.
57 // TODO: Remove this when there are no more cast align warnings on the
58 // firmware.
59 MinGlobalAlign = 32;
62 void getTargetDefines(const LangOptions &Opts,
63 MacroBuilder &Builder) const override;
65 bool isValidCPUName(StringRef Name) const override;
67 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
69 bool setCPU(const std::string &Name) override;
71 bool hasFeature(StringRef Feature) const override;
73 ArrayRef<const char *> getGCCRegNames() const override;
75 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
77 BuiltinVaListKind getBuiltinVaListKind() const override {
78 return TargetInfo::VoidPtrBuiltinVaList;
81 ArrayRef<Builtin::Info> getTargetBuiltins() const override {
82 return std::nullopt;
85 bool validateAsmConstraint(const char *&Name,
86 TargetInfo::ConstraintInfo &info) const override {
87 return false;
90 std::string_view getClobbers() const override { return ""; }
92 bool hasBitIntType() const override { return true; }
94 } // namespace targets
95 } // namespace clang
97 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_LANAI_H