[AMDGPU][AsmParser][NFC] Get rid of custom default operand handlers.
[llvm-project.git] / clang / lib / Headers / movdirintrin.h
blob30c4d02c832d1d0e5847913bb36b1740cfc5701d
1 /*===------------------------- movdirintrin.h ------------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
8 */
9 #if !defined __X86INTRIN_H && !defined __IMMINTRIN_H
10 #error "Never use <movdirintrin.h> directly; include <x86intrin.h> instead."
11 #endif
13 #ifndef _MOVDIRINTRIN_H
14 #define _MOVDIRINTRIN_H
16 /* Move doubleword as direct store */
17 static __inline__ void
18 __attribute__((__always_inline__, __nodebug__, __target__("movdiri")))
19 _directstoreu_u32 (void *__dst, unsigned int __value)
21 __builtin_ia32_directstore_u32((unsigned int *)__dst, (unsigned int)__value);
24 #ifdef __x86_64__
26 /* Move quadword as direct store */
27 static __inline__ void
28 __attribute__((__always_inline__, __nodebug__, __target__("movdiri")))
29 _directstoreu_u64 (void *__dst, unsigned long __value)
31 __builtin_ia32_directstore_u64((unsigned long *)__dst, __value);
34 #endif /* __x86_64__ */
37 * movdir64b - Move 64 bytes as direct store.
38 * The destination must be 64 byte aligned, and the store is atomic.
39 * The source address has no alignment requirement, and the load from
40 * the source address is not atomic.
42 static __inline__ void
43 __attribute__((__always_inline__, __nodebug__, __target__("movdir64b")))
44 _movdir64b (void *__dst __attribute__((align_value(64))), const void *__src)
46 __builtin_ia32_movdir64b(__dst, __src);
49 #endif /* _MOVDIRINTRIN_H */