1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=loop-versioning -S < %s | FileCheck %s
4 ; NB: addrspaces 10-13 are non-integral
5 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12:13"
7 %jl_value_t = type opaque
8 %jl_array_t = type { ptr addrspace(13), i64, i16, i16, i32 }
10 define void @test(ptr %arg) {
12 ; CHECK-NEXT: L74.lver.check:
13 ; CHECK-NEXT: [[I:%.*]] = alloca [3 x i64], align 8
14 ; CHECK-NEXT: [[I1:%.*]] = load ptr addrspace(10), ptr [[ARG:%.*]], align 8
15 ; CHECK-NEXT: [[I2:%.*]] = getelementptr inbounds ptr addrspace(10), ptr [[ARG]], i64 1
16 ; CHECK-NEXT: [[I3:%.*]] = load ptr addrspace(10), ptr [[I2]], align 8
17 ; CHECK-NEXT: store i64 1, ptr [[I]], align 8
18 ; CHECK-NEXT: [[I5:%.*]] = getelementptr inbounds [3 x i64], ptr [[I]], i64 0, i64 1
19 ; CHECK-NEXT: [[I6:%.*]] = load i64, ptr inttoptr (i64 24 to ptr), align 8
20 ; CHECK-NEXT: [[I7:%.*]] = addrspacecast ptr addrspace(10) [[I3]] to ptr addrspace(11)
21 ; CHECK-NEXT: [[I9:%.*]] = load ptr addrspace(13), ptr addrspace(11) [[I7]], align 8
22 ; CHECK-NEXT: [[I10:%.*]] = addrspacecast ptr addrspace(10) [[I1]] to ptr addrspace(11)
23 ; CHECK-NEXT: [[I12:%.*]] = load ptr addrspace(13), ptr addrspace(11) [[I10]], align 8
24 ; CHECK-NEXT: [[I13:%.*]] = load i64, ptr [[I5]], align 8
25 ; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[I6]], 3
26 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(13) [[I12]], i64 [[TMP0]]
27 ; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr addrspace(13) [[I9]], i64 [[TMP0]]
28 ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr addrspace(13) [[I12]], [[SCEVGEP1]]
29 ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr addrspace(13) [[I9]], [[SCEVGEP]]
30 ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
31 ; CHECK-NEXT: [[IDENT_CHECK:%.*]] = icmp ne i64 [[I13]], 1
32 ; CHECK-NEXT: [[LVER_SAFE:%.*]] = or i1 [[FOUND_CONFLICT]], [[IDENT_CHECK]]
33 ; CHECK-NEXT: br i1 [[LVER_SAFE]], label [[L74_PH_LVER_ORIG:%.*]], label [[L74_PH:%.*]]
34 ; CHECK: L74.ph.lver.orig:
35 ; CHECK-NEXT: br label [[L74_LVER_ORIG:%.*]]
36 ; CHECK: L74.lver.orig:
37 ; CHECK-NEXT: [[VALUE_PHI20_LVER_ORIG:%.*]] = phi i64 [ 1, [[L74_PH_LVER_ORIG]] ], [ [[I21_LVER_ORIG:%.*]], [[L74_LVER_ORIG]] ]
38 ; CHECK-NEXT: [[VALUE_PHI21_LVER_ORIG:%.*]] = phi i64 [ 1, [[L74_PH_LVER_ORIG]] ], [ [[I22_LVER_ORIG:%.*]], [[L74_LVER_ORIG]] ]
39 ; CHECK-NEXT: [[VALUE_PHI22_LVER_ORIG:%.*]] = phi i64 [ 1, [[L74_PH_LVER_ORIG]] ], [ [[I24_LVER_ORIG:%.*]], [[L74_LVER_ORIG]] ]
40 ; CHECK-NEXT: [[I14_LVER_ORIG:%.*]] = add i64 [[VALUE_PHI21_LVER_ORIG]], -1
41 ; CHECK-NEXT: [[I15_LVER_ORIG:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I9]], i64 [[I14_LVER_ORIG]]
42 ; CHECK-NEXT: [[I17_LVER_ORIG:%.*]] = load i64, ptr addrspace(13) [[I15_LVER_ORIG]], align 8
43 ; CHECK-NEXT: [[I18_LVER_ORIG:%.*]] = add i64 [[VALUE_PHI20_LVER_ORIG]], -1
44 ; CHECK-NEXT: [[I19_LVER_ORIG:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I12]], i64 [[I18_LVER_ORIG]]
45 ; CHECK-NEXT: store i64 [[I17_LVER_ORIG]], ptr addrspace(13) [[I19_LVER_ORIG]], align 8
46 ; CHECK-NEXT: [[I21_LVER_ORIG]] = add i64 [[VALUE_PHI20_LVER_ORIG]], 1
47 ; CHECK-NEXT: [[I22_LVER_ORIG]] = add i64 [[I13]], [[VALUE_PHI21_LVER_ORIG]]
48 ; CHECK-NEXT: [[I23_LVER_ORIG:%.*]] = icmp eq i64 [[VALUE_PHI22_LVER_ORIG]], [[I6]]
49 ; CHECK-NEXT: [[I24_LVER_ORIG]] = add i64 [[VALUE_PHI22_LVER_ORIG]], 1
50 ; CHECK-NEXT: br i1 [[I23_LVER_ORIG]], label [[L94_LOOPEXIT:%.*]], label [[L74_LVER_ORIG]]
52 ; CHECK-NEXT: br label [[L74:%.*]]
54 ; CHECK-NEXT: [[VALUE_PHI20:%.*]] = phi i64 [ 1, [[L74_PH]] ], [ [[I21:%.*]], [[L74]] ]
55 ; CHECK-NEXT: [[VALUE_PHI21:%.*]] = phi i64 [ 1, [[L74_PH]] ], [ [[I22:%.*]], [[L74]] ]
56 ; CHECK-NEXT: [[VALUE_PHI22:%.*]] = phi i64 [ 1, [[L74_PH]] ], [ [[I24:%.*]], [[L74]] ]
57 ; CHECK-NEXT: [[I14:%.*]] = add i64 [[VALUE_PHI21]], -1
58 ; CHECK-NEXT: [[I15:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I9]], i64 [[I14]]
59 ; CHECK-NEXT: [[I17:%.*]] = load i64, ptr addrspace(13) [[I15]], align 8, !alias.scope !0
60 ; CHECK-NEXT: [[I18:%.*]] = add i64 [[VALUE_PHI20]], -1
61 ; CHECK-NEXT: [[I19:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I12]], i64 [[I18]]
62 ; CHECK-NEXT: store i64 [[I17]], ptr addrspace(13) [[I19]], align 8, !alias.scope !3, !noalias !0
63 ; CHECK-NEXT: [[I21]] = add i64 [[VALUE_PHI20]], 1
64 ; CHECK-NEXT: [[I22]] = add i64 [[I13]], [[VALUE_PHI21]]
65 ; CHECK-NEXT: [[I23:%.*]] = icmp eq i64 [[VALUE_PHI22]], [[I6]]
66 ; CHECK-NEXT: [[I24]] = add i64 [[VALUE_PHI22]], 1
67 ; CHECK-NEXT: br i1 [[I23]], label [[L94_LOOPEXIT2:%.*]], label [[L74]]
68 ; CHECK: L94.loopexit:
69 ; CHECK-NEXT: br label [[L94:%.*]]
70 ; CHECK: L94.loopexit2:
71 ; CHECK-NEXT: br label [[L94]]
73 ; CHECK-NEXT: ret void
76 %i = alloca [3 x i64], align 8
77 %i1 = load ptr addrspace(10), ptr %arg, align 8
78 %i2 = getelementptr inbounds ptr addrspace(10), ptr %arg, i64 1
79 %i3 = load ptr addrspace(10), ptr %i2, align 8
80 store i64 1, ptr %i, align 8
81 %i5 = getelementptr inbounds [3 x i64], ptr %i, i64 0, i64 1
82 %i6 = load i64, ptr inttoptr (i64 24 to ptr), align 8
83 %i7 = addrspacecast ptr addrspace(10) %i3 to ptr addrspace(11)
84 %i9 = load ptr addrspace(13), ptr addrspace(11) %i7, align 8
85 %i10 = addrspacecast ptr addrspace(10) %i1 to ptr addrspace(11)
86 %i12 = load ptr addrspace(13), ptr addrspace(11) %i10, align 8
87 %i13 = load i64, ptr %i5, align 8
90 L74: ; preds = %L74, %top
91 %value_phi20 = phi i64 [ 1, %top ], [ %i21, %L74 ]
92 %value_phi21 = phi i64 [ 1, %top ], [ %i22, %L74 ]
93 %value_phi22 = phi i64 [ 1, %top ], [ %i24, %L74 ]
94 %i14 = add i64 %value_phi21, -1
95 %i15 = getelementptr inbounds double, ptr addrspace(13) %i9, i64 %i14
96 %i17 = load i64, ptr addrspace(13) %i15, align 8
97 %i18 = add i64 %value_phi20, -1
98 %i19 = getelementptr inbounds double, ptr addrspace(13) %i12, i64 %i18
99 store i64 %i17, ptr addrspace(13) %i19, align 8
100 %i21 = add i64 %value_phi20, 1
101 %i22 = add i64 %i13, %value_phi21
102 %i23 = icmp eq i64 %value_phi22, %i6
103 %i24 = add i64 %value_phi22, 1
104 br i1 %i23, label %L94, label %L74