1 ; RUN: opt -mtriple amdgcn-unknown-amdhsa -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
3 ; CHECK: DIVERGENT: %Guard.bb4 = phi i1 [ true, %bb1 ], [ false, %bb2 ]
4 ; CHECK: DIVERGENT: br i1 %Guard.bb4, label %bb4, label %bb5
6 ; Function Attrs: nounwind readnone speculatable
7 declare i32 @llvm.amdgcn.workitem.id.x() #0
9 define protected amdgpu_kernel void @test() {
11 %tid.x = call i32 @llvm.amdgcn.workitem.id.x()
12 %i5 = icmp eq i32 %tid.x, -1
15 bb1: ; preds = %bb2, %bb0
16 %lsr.iv = phi i32 [ 7, %bb0 ], [ %lsr.iv.next, %bb2 ]
17 br i1 %i5, label %bb2, label %bb3
20 %lsr.iv.next = add nsw i32 %lsr.iv, -1
21 %i14 = icmp eq i32 %lsr.iv.next, 0
22 br i1 %i14, label %bb3, label %bb1
24 bb3: ; preds = %bb2, %bb1
25 %Guard.bb4 = phi i1 [ true, %bb1 ], [ false, %bb2 ]
26 br i1 %Guard.bb4, label %bb4, label %bb5
31 bb5: ; preds = %bb3, %bb4
35 attributes #0 = { nounwind readnone speculatable }