1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \
3 # RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
10 tracksRegLiveness: true
13 liveins: $x10, $f10_d, $f11_d
15 ; CHECK-LABEL: name: fp_select_s32
16 ; CHECK: liveins: $x10, $f10_d, $f11_d
18 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
19 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f10_f
20 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr32 = COPY $f11_f
21 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 1
22 ; CHECK-NEXT: [[Select_FPR32_Using_CC_GPR:%[0-9]+]]:fpr32 = Select_FPR32_Using_CC_GPR [[ANDI]], $x0, 1, [[COPY1]], [[COPY2]]
23 ; CHECK-NEXT: $f10_f = COPY [[Select_FPR32_Using_CC_GPR]]
24 ; CHECK-NEXT: PseudoRET implicit $f10_f
25 %0:gprb(s64) = COPY $x10
26 %1:fprb(s32) = COPY $f10_f
27 %2:fprb(s32) = COPY $f11_f
28 %3:gprb(s64) = G_CONSTANT i64 1
29 %4:gprb(s64) = G_AND %0, %3
30 %5:fprb(s32) = G_SELECT %4(s64), %1, %2
32 PseudoRET implicit $f10_f
40 tracksRegLiveness: true
43 liveins: $x10, $f10_d, $f11_d
45 ; CHECK-LABEL: name: fp_select_s64
46 ; CHECK: liveins: $x10, $f10_d, $f11_d
48 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
49 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f10_d
50 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $f11_d
51 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 1
52 ; CHECK-NEXT: [[Select_FPR64_Using_CC_GPR:%[0-9]+]]:fpr64 = Select_FPR64_Using_CC_GPR [[ANDI]], $x0, 1, [[COPY1]], [[COPY2]]
53 ; CHECK-NEXT: $f10_d = COPY [[Select_FPR64_Using_CC_GPR]]
54 ; CHECK-NEXT: PseudoRET implicit $f10_d
55 %0:gprb(s64) = COPY $x10
56 %1:fprb(s64) = COPY $f10_d
57 %2:fprb(s64) = COPY $f11_d
58 %3:gprb(s64) = G_CONSTANT i64 1
59 %4:gprb(s64) = G_AND %0, %3
60 %5:fprb(s64) = G_SELECT %4(s64), %1, %2
62 PseudoRET implicit $f10_d