| blob | 9c69fe0a6e48653052c06cb920cd070b2cdcb4e0 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck %s -check-prefix=RV32I
4 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5 ; RUN: | FileCheck %s -check-prefix=RV64I
6 ; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
7 ; RUN: | FileCheck %s -check-prefixes=RV32ZB,RV32ZBB
8 ; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
9 ; RUN: | FileCheck %s -check-prefixes=RV64ZB,RV64ZBB
10 ; RUN: llc -mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs < %s \
11 ; RUN: | FileCheck %s -check-prefixes=RV32ZB,RV32ZBKB
12 ; RUN: llc -mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs < %s \
13 ; RUN: | FileCheck %s -check-prefixes=RV64ZB,RV64ZBKB
15 declare i16 @llvm.bswap.i16(i16)
16 declare i32 @llvm.bswap.i32(i32)
17 declare i64 @llvm.bswap.i64(i64)
18 declare i8 @llvm.bitreverse.i8(i8)
19 declare i16 @llvm.bitreverse.i16(i16)
20 declare i32 @llvm.bitreverse.i32(i32)
21 declare i64 @llvm.bitreverse.i64(i64)
23 define i16 @test_bswap_i16(i16 %a) nounwind {
24 ; RV32I-LABEL: test_bswap_i16:
25 ; RV32I: # %bb.0:
26 ; RV32I-NEXT: slli a1, a0, 8
27 ; RV32I-NEXT: slli a0, a0, 16
28 ; RV32I-NEXT: srli a0, a0, 24
29 ; RV32I-NEXT: or a0, a1, a0
30 ; RV32I-NEXT: ret
31 ;
32 ; RV64I-LABEL: test_bswap_i16:
33 ; RV64I: # %bb.0:
34 ; RV64I-NEXT: slli a1, a0, 8
35 ; RV64I-NEXT: slli a0, a0, 48
36 ; RV64I-NEXT: srli a0, a0, 56
37 ; RV64I-NEXT: or a0, a1, a0
38 ; RV64I-NEXT: ret
39 ;
40 ; RV32ZB-LABEL: test_bswap_i16:
41 ; RV32ZB: # %bb.0:
42 ; RV32ZB-NEXT: rev8 a0, a0
43 ; RV32ZB-NEXT: srli a0, a0, 16
44 ; RV32ZB-NEXT: ret
45 ;
46 ; RV64ZB-LABEL: test_bswap_i16:
47 ; RV64ZB: # %bb.0:
48 ; RV64ZB-NEXT: rev8 a0, a0
49 ; RV64ZB-NEXT: srli a0, a0, 48
50 ; RV64ZB-NEXT: ret
51 %tmp = call i16 @llvm.bswap.i16(i16 %a)
52 ret i16 %tmp
53 }
55 define i32 @test_bswap_i32(i32 %a) nounwind {
56 ; RV32I-LABEL: test_bswap_i32:
57 ; RV32I: # %bb.0:
58 ; RV32I-NEXT: srli a1, a0, 8
59 ; RV32I-NEXT: lui a2, 16
60 ; RV32I-NEXT: addi a2, a2, -256
61 ; RV32I-NEXT: and a1, a1, a2
62 ; RV32I-NEXT: srli a3, a0, 24
63 ; RV32I-NEXT: or a1, a1, a3
64 ; RV32I-NEXT: and a2, a0, a2
65 ; RV32I-NEXT: slli a2, a2, 8
66 ; RV32I-NEXT: slli a0, a0, 24
67 ; RV32I-NEXT: or a0, a0, a2
68 ; RV32I-NEXT: or a0, a0, a1
69 ; RV32I-NEXT: ret
70 ;
71 ; RV64I-LABEL: test_bswap_i32:
72 ; RV64I: # %bb.0:
73 ; RV64I-NEXT: srli a1, a0, 8
74 ; RV64I-NEXT: lui a2, 16
75 ; RV64I-NEXT: addiw a2, a2, -256
76 ; RV64I-NEXT: and a1, a1, a2
77 ; RV64I-NEXT: srliw a3, a0, 24
78 ; RV64I-NEXT: or a1, a1, a3
79 ; RV64I-NEXT: and a2, a0, a2
80 ; RV64I-NEXT: slli a2, a2, 8
81 ; RV64I-NEXT: slliw a0, a0, 24
82 ; RV64I-NEXT: or a0, a0, a2
83 ; RV64I-NEXT: or a0, a0, a1
84 ; RV64I-NEXT: ret
85 ;
86 ; RV32ZB-LABEL: test_bswap_i32:
87 ; RV32ZB: # %bb.0:
88 ; RV32ZB-NEXT: rev8 a0, a0
89 ; RV32ZB-NEXT: ret
90 ;
91 ; RV64ZB-LABEL: test_bswap_i32:
92 ; RV64ZB: # %bb.0:
93 ; RV64ZB-NEXT: rev8 a0, a0
94 ; RV64ZB-NEXT: srli a0, a0, 32
95 ; RV64ZB-NEXT: ret
96 %tmp = call i32 @llvm.bswap.i32(i32 %a)
97 ret i32 %tmp
98 }
100 define i64 @test_bswap_i64(i64 %a) nounwind {
101 ; RV32I-LABEL: test_bswap_i64:
102 ; RV32I: # %bb.0:
103 ; RV32I-NEXT: srli a2, a1, 8
104 ; RV32I-NEXT: lui a3, 16
105 ; RV32I-NEXT: addi a3, a3, -256
106 ; RV32I-NEXT: and a2, a2, a3
107 ; RV32I-NEXT: srli a4, a1, 24
108 ; RV32I-NEXT: or a2, a2, a4
109 ; RV32I-NEXT: and a4, a1, a3
110 ; RV32I-NEXT: slli a4, a4, 8
111 ; RV32I-NEXT: slli a1, a1, 24
112 ; RV32I-NEXT: or a1, a1, a4
113 ; RV32I-NEXT: or a2, a1, a2
114 ; RV32I-NEXT: srli a1, a0, 8
115 ; RV32I-NEXT: and a1, a1, a3
116 ; RV32I-NEXT: srli a4, a0, 24
117 ; RV32I-NEXT: or a1, a1, a4
118 ; RV32I-NEXT: and a3, a0, a3
119 ; RV32I-NEXT: slli a3, a3, 8
120 ; RV32I-NEXT: slli a0, a0, 24
121 ; RV32I-NEXT: or a0, a0, a3
122 ; RV32I-NEXT: or a1, a0, a1
123 ; RV32I-NEXT: mv a0, a2
124 ; RV32I-NEXT: ret
125 ;
126 ; RV64I-LABEL: test_bswap_i64:
127 ; RV64I: # %bb.0:
128 ; RV64I-NEXT: srli a1, a0, 40
129 ; RV64I-NEXT: lui a2, 16
130 ; RV64I-NEXT: addiw a2, a2, -256
131 ; RV64I-NEXT: and a1, a1, a2
132 ; RV64I-NEXT: srli a3, a0, 56
133 ; RV64I-NEXT: or a1, a1, a3
134 ; RV64I-NEXT: srli a3, a0, 24
135 ; RV64I-NEXT: lui a4, 4080
136 ; RV64I-NEXT: and a3, a3, a4
137 ; RV64I-NEXT: srli a5, a0, 8
138 ; RV64I-NEXT: srliw a5, a5, 24
139 ; RV64I-NEXT: slli a5, a5, 24
140 ; RV64I-NEXT: or a3, a5, a3
141 ; RV64I-NEXT: or a1, a3, a1
142 ; RV64I-NEXT: and a4, a0, a4
143 ; RV64I-NEXT: slli a4, a4, 24
144 ; RV64I-NEXT: srliw a3, a0, 24
145 ; RV64I-NEXT: slli a3, a3, 32
146 ; RV64I-NEXT: or a3, a4, a3
147 ; RV64I-NEXT: and a2, a0, a2
148 ; RV64I-NEXT: slli a2, a2, 40
149 ; RV64I-NEXT: slli a0, a0, 56
150 ; RV64I-NEXT: or a0, a0, a2
151 ; RV64I-NEXT: or a0, a0, a3
152 ; RV64I-NEXT: or a0, a0, a1
153 ; RV64I-NEXT: ret
154 ;
155 ; RV32ZB-LABEL: test_bswap_i64:
156 ; RV32ZB: # %bb.0:
157 ; RV32ZB-NEXT: rev8 a2, a1
158 ; RV32ZB-NEXT: rev8 a1, a0
159 ; RV32ZB-NEXT: mv a0, a2
160 ; RV32ZB-NEXT: ret
161 ;
162 ; RV64ZB-LABEL: test_bswap_i64:
163 ; RV64ZB: # %bb.0:
164 ; RV64ZB-NEXT: rev8 a0, a0
165 ; RV64ZB-NEXT: ret
166 %tmp = call i64 @llvm.bswap.i64(i64 %a)
167 ret i64 %tmp
168 }
170 define i8 @test_bitreverse_i8(i8 %a) nounwind {
171 ; RV32I-LABEL: test_bitreverse_i8:
172 ; RV32I: # %bb.0:
173 ; RV32I-NEXT: andi a1, a0, 15
174 ; RV32I-NEXT: slli a1, a1, 4
175 ; RV32I-NEXT: slli a0, a0, 24
176 ; RV32I-NEXT: srli a0, a0, 28
177 ; RV32I-NEXT: or a0, a0, a1
178 ; RV32I-NEXT: andi a1, a0, 51
179 ; RV32I-NEXT: slli a1, a1, 2
180 ; RV32I-NEXT: srli a0, a0, 2
181 ; RV32I-NEXT: andi a0, a0, 51
182 ; RV32I-NEXT: or a0, a0, a1
183 ; RV32I-NEXT: andi a1, a0, 85
184 ; RV32I-NEXT: slli a1, a1, 1
185 ; RV32I-NEXT: srli a0, a0, 1
186 ; RV32I-NEXT: andi a0, a0, 85
187 ; RV32I-NEXT: or a0, a0, a1
188 ; RV32I-NEXT: ret
189 ;
190 ; RV64I-LABEL: test_bitreverse_i8:
191 ; RV64I: # %bb.0:
192 ; RV64I-NEXT: andi a1, a0, 15
193 ; RV64I-NEXT: slli a1, a1, 4
194 ; RV64I-NEXT: slli a0, a0, 56
195 ; RV64I-NEXT: srli a0, a0, 60
196 ; RV64I-NEXT: or a0, a0, a1
197 ; RV64I-NEXT: andi a1, a0, 51
198 ; RV64I-NEXT: slli a1, a1, 2
199 ; RV64I-NEXT: srli a0, a0, 2
200 ; RV64I-NEXT: andi a0, a0, 51
201 ; RV64I-NEXT: or a0, a0, a1
202 ; RV64I-NEXT: andi a1, a0, 85
203 ; RV64I-NEXT: slli a1, a1, 1
204 ; RV64I-NEXT: srli a0, a0, 1
205 ; RV64I-NEXT: andi a0, a0, 85
206 ; RV64I-NEXT: or a0, a0, a1
207 ; RV64I-NEXT: ret
208 ;
209 ; RV32ZBB-LABEL: test_bitreverse_i8:
210 ; RV32ZBB: # %bb.0:
211 ; RV32ZBB-NEXT: andi a1, a0, 15
212 ; RV32ZBB-NEXT: slli a1, a1, 4
213 ; RV32ZBB-NEXT: slli a0, a0, 24
214 ; RV32ZBB-NEXT: srli a0, a0, 28
215 ; RV32ZBB-NEXT: or a0, a0, a1
216 ; RV32ZBB-NEXT: andi a1, a0, 51
217 ; RV32ZBB-NEXT: slli a1, a1, 2
218 ; RV32ZBB-NEXT: srli a0, a0, 2
219 ; RV32ZBB-NEXT: andi a0, a0, 51
220 ; RV32ZBB-NEXT: or a0, a0, a1
221 ; RV32ZBB-NEXT: andi a1, a0, 85
222 ; RV32ZBB-NEXT: slli a1, a1, 1
223 ; RV32ZBB-NEXT: srli a0, a0, 1
224 ; RV32ZBB-NEXT: andi a0, a0, 85
225 ; RV32ZBB-NEXT: or a0, a0, a1
226 ; RV32ZBB-NEXT: ret
227 ;
228 ; RV64ZBB-LABEL: test_bitreverse_i8:
229 ; RV64ZBB: # %bb.0:
230 ; RV64ZBB-NEXT: andi a1, a0, 15
231 ; RV64ZBB-NEXT: slli a1, a1, 4
232 ; RV64ZBB-NEXT: slli a0, a0, 56
233 ; RV64ZBB-NEXT: srli a0, a0, 60
234 ; RV64ZBB-NEXT: or a0, a0, a1
235 ; RV64ZBB-NEXT: andi a1, a0, 51
236 ; RV64ZBB-NEXT: slli a1, a1, 2
237 ; RV64ZBB-NEXT: srli a0, a0, 2
238 ; RV64ZBB-NEXT: andi a0, a0, 51
239 ; RV64ZBB-NEXT: or a0, a0, a1
240 ; RV64ZBB-NEXT: andi a1, a0, 85
241 ; RV64ZBB-NEXT: slli a1, a1, 1
242 ; RV64ZBB-NEXT: srli a0, a0, 1
243 ; RV64ZBB-NEXT: andi a0, a0, 85
244 ; RV64ZBB-NEXT: or a0, a0, a1
245 ; RV64ZBB-NEXT: ret
246 ;
247 ; RV32ZBKB-LABEL: test_bitreverse_i8:
248 ; RV32ZBKB: # %bb.0:
249 ; RV32ZBKB-NEXT: rev8 a0, a0
250 ; RV32ZBKB-NEXT: brev8 a0, a0
251 ; RV32ZBKB-NEXT: srli a0, a0, 24
252 ; RV32ZBKB-NEXT: ret
253 ;
254 ; RV64ZBKB-LABEL: test_bitreverse_i8:
255 ; RV64ZBKB: # %bb.0:
256 ; RV64ZBKB-NEXT: rev8 a0, a0
257 ; RV64ZBKB-NEXT: brev8 a0, a0
258 ; RV64ZBKB-NEXT: srli a0, a0, 56
259 ; RV64ZBKB-NEXT: ret
260 %tmp = call i8 @llvm.bitreverse.i8(i8 %a)
261 ret i8 %tmp
262 }
264 define i16 @test_bitreverse_i16(i16 %a) nounwind {
265 ; RV32I-LABEL: test_bitreverse_i16:
266 ; RV32I: # %bb.0:
267 ; RV32I-NEXT: slli a1, a0, 8
268 ; RV32I-NEXT: slli a0, a0, 16
269 ; RV32I-NEXT: srli a0, a0, 24
270 ; RV32I-NEXT: or a0, a1, a0
271 ; RV32I-NEXT: srli a1, a0, 4
272 ; RV32I-NEXT: lui a2, 1
273 ; RV32I-NEXT: addi a2, a2, -241
274 ; RV32I-NEXT: and a1, a1, a2
275 ; RV32I-NEXT: and a0, a0, a2
276 ; RV32I-NEXT: slli a0, a0, 4
277 ; RV32I-NEXT: or a0, a1, a0
278 ; RV32I-NEXT: srli a1, a0, 2
279 ; RV32I-NEXT: lui a2, 3
280 ; RV32I-NEXT: addi a2, a2, 819
281 ; RV32I-NEXT: and a1, a1, a2
282 ; RV32I-NEXT: and a0, a0, a2
283 ; RV32I-NEXT: slli a0, a0, 2
284 ; RV32I-NEXT: or a0, a1, a0
285 ; RV32I-NEXT: srli a1, a0, 1
286 ; RV32I-NEXT: lui a2, 5
287 ; RV32I-NEXT: addi a2, a2, 1365
288 ; RV32I-NEXT: and a1, a1, a2
289 ; RV32I-NEXT: and a0, a0, a2
290 ; RV32I-NEXT: slli a0, a0, 1
291 ; RV32I-NEXT: or a0, a1, a0
292 ; RV32I-NEXT: ret
293 ;
294 ; RV64I-LABEL: test_bitreverse_i16:
295 ; RV64I: # %bb.0:
296 ; RV64I-NEXT: slli a1, a0, 8
297 ; RV64I-NEXT: slli a0, a0, 48
298 ; RV64I-NEXT: srli a0, a0, 56
299 ; RV64I-NEXT: or a0, a1, a0
300 ; RV64I-NEXT: srli a1, a0, 4
301 ; RV64I-NEXT: lui a2, 1
302 ; RV64I-NEXT: addiw a2, a2, -241
303 ; RV64I-NEXT: and a1, a1, a2
304 ; RV64I-NEXT: and a0, a0, a2
305 ; RV64I-NEXT: slli a0, a0, 4
306 ; RV64I-NEXT: or a0, a1, a0
307 ; RV64I-NEXT: srli a1, a0, 2
308 ; RV64I-NEXT: lui a2, 3
309 ; RV64I-NEXT: addiw a2, a2, 819
310 ; RV64I-NEXT: and a1, a1, a2
311 ; RV64I-NEXT: and a0, a0, a2
312 ; RV64I-NEXT: slli a0, a0, 2
313 ; RV64I-NEXT: or a0, a1, a0
314 ; RV64I-NEXT: srli a1, a0, 1
315 ; RV64I-NEXT: lui a2, 5
316 ; RV64I-NEXT: addiw a2, a2, 1365
317 ; RV64I-NEXT: and a1, a1, a2
318 ; RV64I-NEXT: and a0, a0, a2
319 ; RV64I-NEXT: slli a0, a0, 1
320 ; RV64I-NEXT: or a0, a1, a0
321 ; RV64I-NEXT: ret
322 ;
323 ; RV32ZBB-LABEL: test_bitreverse_i16:
324 ; RV32ZBB: # %bb.0:
325 ; RV32ZBB-NEXT: rev8 a0, a0
326 ; RV32ZBB-NEXT: srli a1, a0, 12
327 ; RV32ZBB-NEXT: lui a2, 15
328 ; RV32ZBB-NEXT: addi a2, a2, 240
329 ; RV32ZBB-NEXT: and a1, a1, a2
330 ; RV32ZBB-NEXT: srli a0, a0, 20
331 ; RV32ZBB-NEXT: andi a0, a0, -241
332 ; RV32ZBB-NEXT: or a0, a0, a1
333 ; RV32ZBB-NEXT: srli a1, a0, 2
334 ; RV32ZBB-NEXT: lui a2, 3
335 ; RV32ZBB-NEXT: addi a2, a2, 819
336 ; RV32ZBB-NEXT: and a1, a1, a2
337 ; RV32ZBB-NEXT: and a0, a0, a2
338 ; RV32ZBB-NEXT: slli a0, a0, 2
339 ; RV32ZBB-NEXT: or a0, a1, a0
340 ; RV32ZBB-NEXT: srli a1, a0, 1
341 ; RV32ZBB-NEXT: lui a2, 5
342 ; RV32ZBB-NEXT: addi a2, a2, 1365
343 ; RV32ZBB-NEXT: and a1, a1, a2
344 ; RV32ZBB-NEXT: and a0, a0, a2
345 ; RV32ZBB-NEXT: slli a0, a0, 1
346 ; RV32ZBB-NEXT: or a0, a1, a0
347 ; RV32ZBB-NEXT: ret
348 ;
349 ; RV64ZBB-LABEL: test_bitreverse_i16:
350 ; RV64ZBB: # %bb.0:
351 ; RV64ZBB-NEXT: rev8 a0, a0
352 ; RV64ZBB-NEXT: srli a1, a0, 44
353 ; RV64ZBB-NEXT: lui a2, 15
354 ; RV64ZBB-NEXT: addiw a2, a2, 240
355 ; RV64ZBB-NEXT: and a1, a1, a2
356 ; RV64ZBB-NEXT: srli a0, a0, 52
357 ; RV64ZBB-NEXT: andi a0, a0, -241
358 ; RV64ZBB-NEXT: or a0, a0, a1
359 ; RV64ZBB-NEXT: srli a1, a0, 2
360 ; RV64ZBB-NEXT: lui a2, 3
361 ; RV64ZBB-NEXT: addiw a2, a2, 819
362 ; RV64ZBB-NEXT: and a1, a1, a2
363 ; RV64ZBB-NEXT: and a0, a0, a2
364 ; RV64ZBB-NEXT: slli a0, a0, 2
365 ; RV64ZBB-NEXT: or a0, a1, a0
366 ; RV64ZBB-NEXT: srli a1, a0, 1
367 ; RV64ZBB-NEXT: lui a2, 5
368 ; RV64ZBB-NEXT: addiw a2, a2, 1365
369 ; RV64ZBB-NEXT: and a1, a1, a2
370 ; RV64ZBB-NEXT: and a0, a0, a2
371 ; RV64ZBB-NEXT: slli a0, a0, 1
372 ; RV64ZBB-NEXT: or a0, a1, a0
373 ; RV64ZBB-NEXT: ret
374 ;
375 ; RV32ZBKB-LABEL: test_bitreverse_i16:
376 ; RV32ZBKB: # %bb.0:
377 ; RV32ZBKB-NEXT: rev8 a0, a0
378 ; RV32ZBKB-NEXT: brev8 a0, a0
379 ; RV32ZBKB-NEXT: srli a0, a0, 16
380 ; RV32ZBKB-NEXT: ret
381 ;
382 ; RV64ZBKB-LABEL: test_bitreverse_i16:
383 ; RV64ZBKB: # %bb.0:
384 ; RV64ZBKB-NEXT: rev8 a0, a0
385 ; RV64ZBKB-NEXT: brev8 a0, a0
386 ; RV64ZBKB-NEXT: srli a0, a0, 48
387 ; RV64ZBKB-NEXT: ret
388 %tmp = call i16 @llvm.bitreverse.i16(i16 %a)
389 ret i16 %tmp
390 }
392 define i32 @test_bitreverse_i32(i32 %a) nounwind {
393 ; RV32I-LABEL: test_bitreverse_i32:
394 ; RV32I: # %bb.0:
395 ; RV32I-NEXT: srli a1, a0, 8
396 ; RV32I-NEXT: lui a2, 16
397 ; RV32I-NEXT: addi a2, a2, -256
398 ; RV32I-NEXT: and a1, a1, a2
399 ; RV32I-NEXT: srli a3, a0, 24
400 ; RV32I-NEXT: or a1, a1, a3
401 ; RV32I-NEXT: and a2, a0, a2
402 ; RV32I-NEXT: slli a2, a2, 8
403 ; RV32I-NEXT: slli a0, a0, 24
404 ; RV32I-NEXT: or a0, a0, a2
405 ; RV32I-NEXT: or a0, a0, a1
406 ; RV32I-NEXT: srli a1, a0, 4
407 ; RV32I-NEXT: lui a2, 61681
408 ; RV32I-NEXT: addi a2, a2, -241
409 ; RV32I-NEXT: and a1, a1, a2
410 ; RV32I-NEXT: and a0, a0, a2
411 ; RV32I-NEXT: slli a0, a0, 4
412 ; RV32I-NEXT: or a0, a1, a0
413 ; RV32I-NEXT: srli a1, a0, 2
414 ; RV32I-NEXT: lui a2, 209715
415 ; RV32I-NEXT: addi a2, a2, 819
416 ; RV32I-NEXT: and a1, a1, a2
417 ; RV32I-NEXT: and a0, a0, a2
418 ; RV32I-NEXT: slli a0, a0, 2
419 ; RV32I-NEXT: or a0, a1, a0
420 ; RV32I-NEXT: srli a1, a0, 1
421 ; RV32I-NEXT: lui a2, 349525
422 ; RV32I-NEXT: addi a2, a2, 1365
423 ; RV32I-NEXT: and a1, a1, a2
424 ; RV32I-NEXT: and a0, a0, a2
425 ; RV32I-NEXT: slli a0, a0, 1
426 ; RV32I-NEXT: or a0, a1, a0
427 ; RV32I-NEXT: ret
428 ;
429 ; RV64I-LABEL: test_bitreverse_i32:
430 ; RV64I: # %bb.0:
431 ; RV64I-NEXT: srli a1, a0, 8
432 ; RV64I-NEXT: lui a2, 16
433 ; RV64I-NEXT: addiw a2, a2, -256
434 ; RV64I-NEXT: and a1, a1, a2
435 ; RV64I-NEXT: srliw a3, a0, 24
436 ; RV64I-NEXT: or a1, a1, a3
437 ; RV64I-NEXT: and a2, a0, a2
438 ; RV64I-NEXT: slli a2, a2, 8
439 ; RV64I-NEXT: slliw a0, a0, 24
440 ; RV64I-NEXT: or a0, a0, a2
441 ; RV64I-NEXT: or a0, a0, a1
442 ; RV64I-NEXT: srli a1, a0, 4
443 ; RV64I-NEXT: lui a2, 61681
444 ; RV64I-NEXT: addiw a2, a2, -241
445 ; RV64I-NEXT: and a1, a1, a2
446 ; RV64I-NEXT: and a0, a0, a2
447 ; RV64I-NEXT: slliw a0, a0, 4
448 ; RV64I-NEXT: or a0, a1, a0
449 ; RV64I-NEXT: srli a1, a0, 2
450 ; RV64I-NEXT: lui a2, 209715
451 ; RV64I-NEXT: addiw a2, a2, 819
452 ; RV64I-NEXT: and a1, a1, a2
453 ; RV64I-NEXT: and a0, a0, a2
454 ; RV64I-NEXT: slliw a0, a0, 2
455 ; RV64I-NEXT: or a0, a1, a0
456 ; RV64I-NEXT: srli a1, a0, 1
457 ; RV64I-NEXT: lui a2, 349525
458 ; RV64I-NEXT: addiw a2, a2, 1365
459 ; RV64I-NEXT: and a1, a1, a2
460 ; RV64I-NEXT: and a0, a0, a2
461 ; RV64I-NEXT: slliw a0, a0, 1
462 ; RV64I-NEXT: or a0, a1, a0
463 ; RV64I-NEXT: ret
464 ;
465 ; RV32ZBB-LABEL: test_bitreverse_i32:
466 ; RV32ZBB: # %bb.0:
467 ; RV32ZBB-NEXT: rev8 a0, a0
468 ; RV32ZBB-NEXT: srli a1, a0, 4
469 ; RV32ZBB-NEXT: lui a2, 61681
470 ; RV32ZBB-NEXT: addi a2, a2, -241
471 ; RV32ZBB-NEXT: and a1, a1, a2
472 ; RV32ZBB-NEXT: and a0, a0, a2
473 ; RV32ZBB-NEXT: slli a0, a0, 4
474 ; RV32ZBB-NEXT: or a0, a1, a0
475 ; RV32ZBB-NEXT: srli a1, a0, 2
476 ; RV32ZBB-NEXT: lui a2, 209715
477 ; RV32ZBB-NEXT: addi a2, a2, 819
478 ; RV32ZBB-NEXT: and a1, a1, a2
479 ; RV32ZBB-NEXT: and a0, a0, a2
480 ; RV32ZBB-NEXT: slli a0, a0, 2
481 ; RV32ZBB-NEXT: or a0, a1, a0
482 ; RV32ZBB-NEXT: srli a1, a0, 1
483 ; RV32ZBB-NEXT: lui a2, 349525
484 ; RV32ZBB-NEXT: addi a2, a2, 1365
485 ; RV32ZBB-NEXT: and a1, a1, a2
486 ; RV32ZBB-NEXT: and a0, a0, a2
487 ; RV32ZBB-NEXT: slli a0, a0, 1
488 ; RV32ZBB-NEXT: or a0, a1, a0
489 ; RV32ZBB-NEXT: ret
490 ;
491 ; RV64ZBB-LABEL: test_bitreverse_i32:
492 ; RV64ZBB: # %bb.0:
493 ; RV64ZBB-NEXT: rev8 a0, a0
494 ; RV64ZBB-NEXT: srli a1, a0, 36
495 ; RV64ZBB-NEXT: lui a2, 61681
496 ; RV64ZBB-NEXT: addiw a2, a2, -241
497 ; RV64ZBB-NEXT: and a1, a1, a2
498 ; RV64ZBB-NEXT: srli a0, a0, 28
499 ; RV64ZBB-NEXT: lui a2, 986895
500 ; RV64ZBB-NEXT: addi a2, a2, 240
501 ; RV64ZBB-NEXT: and a0, a0, a2
502 ; RV64ZBB-NEXT: sext.w a0, a0
503 ; RV64ZBB-NEXT: or a0, a1, a0
504 ; RV64ZBB-NEXT: srli a1, a0, 2
505 ; RV64ZBB-NEXT: lui a2, 209715
506 ; RV64ZBB-NEXT: addiw a2, a2, 819
507 ; RV64ZBB-NEXT: and a1, a1, a2
508 ; RV64ZBB-NEXT: and a0, a0, a2
509 ; RV64ZBB-NEXT: slliw a0, a0, 2
510 ; RV64ZBB-NEXT: or a0, a1, a0
511 ; RV64ZBB-NEXT: srli a1, a0, 1
512 ; RV64ZBB-NEXT: lui a2, 349525
513 ; RV64ZBB-NEXT: addiw a2, a2, 1365
514 ; RV64ZBB-NEXT: and a1, a1, a2
515 ; RV64ZBB-NEXT: and a0, a0, a2
516 ; RV64ZBB-NEXT: slliw a0, a0, 1
517 ; RV64ZBB-NEXT: or a0, a1, a0
518 ; RV64ZBB-NEXT: ret
519 ;
520 ; RV32ZBKB-LABEL: test_bitreverse_i32:
521 ; RV32ZBKB: # %bb.0:
522 ; RV32ZBKB-NEXT: rev8 a0, a0
523 ; RV32ZBKB-NEXT: brev8 a0, a0
524 ; RV32ZBKB-NEXT: ret
525 ;
526 ; RV64ZBKB-LABEL: test_bitreverse_i32:
527 ; RV64ZBKB: # %bb.0:
528 ; RV64ZBKB-NEXT: rev8 a0, a0
529 ; RV64ZBKB-NEXT: brev8 a0, a0
530 ; RV64ZBKB-NEXT: srli a0, a0, 32
531 ; RV64ZBKB-NEXT: ret
532 %tmp = call i32 @llvm.bitreverse.i32(i32 %a)
533 ret i32 %tmp
534 }
536 define i64 @test_bitreverse_i64(i64 %a) nounwind {
537 ; RV32I-LABEL: test_bitreverse_i64:
538 ; RV32I: # %bb.0:
539 ; RV32I-NEXT: srli a2, a1, 8
540 ; RV32I-NEXT: lui a3, 16
541 ; RV32I-NEXT: addi a3, a3, -256
542 ; RV32I-NEXT: and a2, a2, a3
543 ; RV32I-NEXT: srli a4, a1, 24
544 ; RV32I-NEXT: or a2, a2, a4
545 ; RV32I-NEXT: and a4, a1, a3
546 ; RV32I-NEXT: slli a4, a4, 8
547 ; RV32I-NEXT: slli a1, a1, 24
548 ; RV32I-NEXT: or a1, a1, a4
549 ; RV32I-NEXT: or a1, a1, a2
550 ; RV32I-NEXT: srli a2, a1, 4
551 ; RV32I-NEXT: lui a4, 61681
552 ; RV32I-NEXT: addi a4, a4, -241
553 ; RV32I-NEXT: and a2, a2, a4
554 ; RV32I-NEXT: and a1, a1, a4
555 ; RV32I-NEXT: slli a1, a1, 4
556 ; RV32I-NEXT: or a1, a2, a1
557 ; RV32I-NEXT: srli a2, a1, 2
558 ; RV32I-NEXT: lui a5, 209715
559 ; RV32I-NEXT: addi a5, a5, 819
560 ; RV32I-NEXT: and a2, a2, a5
561 ; RV32I-NEXT: and a1, a1, a5
562 ; RV32I-NEXT: slli a1, a1, 2
563 ; RV32I-NEXT: or a1, a2, a1
564 ; RV32I-NEXT: srli a2, a1, 1
565 ; RV32I-NEXT: lui a6, 349525
566 ; RV32I-NEXT: addi a6, a6, 1365
567 ; RV32I-NEXT: and a2, a2, a6
568 ; RV32I-NEXT: and a1, a1, a6
569 ; RV32I-NEXT: slli a1, a1, 1
570 ; RV32I-NEXT: or a2, a2, a1
571 ; RV32I-NEXT: srli a1, a0, 8
572 ; RV32I-NEXT: and a1, a1, a3
573 ; RV32I-NEXT: srli a7, a0, 24
574 ; RV32I-NEXT: or a1, a1, a7
575 ; RV32I-NEXT: and a3, a0, a3
576 ; RV32I-NEXT: slli a3, a3, 8
577 ; RV32I-NEXT: slli a0, a0, 24
578 ; RV32I-NEXT: or a0, a0, a3
579 ; RV32I-NEXT: or a0, a0, a1
580 ; RV32I-NEXT: srli a1, a0, 4
581 ; RV32I-NEXT: and a1, a1, a4
582 ; RV32I-NEXT: and a0, a0, a4
583 ; RV32I-NEXT: slli a0, a0, 4
584 ; RV32I-NEXT: or a0, a1, a0
585 ; RV32I-NEXT: srli a1, a0, 2
586 ; RV32I-NEXT: and a1, a1, a5
587 ; RV32I-NEXT: and a0, a0, a5
588 ; RV32I-NEXT: slli a0, a0, 2
589 ; RV32I-NEXT: or a0, a1, a0
590 ; RV32I-NEXT: srli a1, a0, 1
591 ; RV32I-NEXT: and a1, a1, a6
592 ; RV32I-NEXT: and a0, a0, a6
593 ; RV32I-NEXT: slli a0, a0, 1
594 ; RV32I-NEXT: or a1, a1, a0
595 ; RV32I-NEXT: mv a0, a2
596 ; RV32I-NEXT: ret
597 ;
598 ; RV64I-LABEL: test_bitreverse_i64:
599 ; RV64I: # %bb.0:
600 ; RV64I-NEXT: srli a1, a0, 40
601 ; RV64I-NEXT: lui a2, 16
602 ; RV64I-NEXT: addiw a2, a2, -256
603 ; RV64I-NEXT: and a1, a1, a2
604 ; RV64I-NEXT: srli a3, a0, 56
605 ; RV64I-NEXT: or a1, a1, a3
606 ; RV64I-NEXT: srli a3, a0, 24
607 ; RV64I-NEXT: lui a4, 4080
608 ; RV64I-NEXT: and a3, a3, a4
609 ; RV64I-NEXT: srli a5, a0, 8
610 ; RV64I-NEXT: srliw a5, a5, 24
611 ; RV64I-NEXT: slli a5, a5, 24
612 ; RV64I-NEXT: or a3, a5, a3
613 ; RV64I-NEXT: or a1, a3, a1
614 ; RV64I-NEXT: and a4, a0, a4
615 ; RV64I-NEXT: slli a4, a4, 24
616 ; RV64I-NEXT: srliw a3, a0, 24
617 ; RV64I-NEXT: slli a3, a3, 32
618 ; RV64I-NEXT: or a3, a4, a3
619 ; RV64I-NEXT: and a2, a0, a2
620 ; RV64I-NEXT: slli a2, a2, 40
621 ; RV64I-NEXT: slli a0, a0, 56
622 ; RV64I-NEXT: or a0, a0, a2
623 ; RV64I-NEXT: or a0, a0, a3
624 ; RV64I-NEXT: or a0, a0, a1
625 ; RV64I-NEXT: srli a1, a0, 4
626 ; RV64I-NEXT: lui a2, 61681
627 ; RV64I-NEXT: addiw a2, a2, -241
628 ; RV64I-NEXT: slli a3, a2, 32
629 ; RV64I-NEXT: add a2, a2, a3
630 ; RV64I-NEXT: and a1, a1, a2
631 ; RV64I-NEXT: and a0, a0, a2
632 ; RV64I-NEXT: slli a0, a0, 4
633 ; RV64I-NEXT: or a0, a1, a0
634 ; RV64I-NEXT: srli a1, a0, 2
635 ; RV64I-NEXT: lui a2, 209715
636 ; RV64I-NEXT: addiw a2, a2, 819
637 ; RV64I-NEXT: slli a3, a2, 32
638 ; RV64I-NEXT: add a2, a2, a3
639 ; RV64I-NEXT: and a1, a1, a2
640 ; RV64I-NEXT: and a0, a0, a2
641 ; RV64I-NEXT: slli a0, a0, 2
642 ; RV64I-NEXT: or a0, a1, a0
643 ; RV64I-NEXT: srli a1, a0, 1
644 ; RV64I-NEXT: lui a2, 349525
645 ; RV64I-NEXT: addiw a2, a2, 1365
646 ; RV64I-NEXT: slli a3, a2, 32
647 ; RV64I-NEXT: add a2, a2, a3
648 ; RV64I-NEXT: and a1, a1, a2
649 ; RV64I-NEXT: and a0, a0, a2
650 ; RV64I-NEXT: slli a0, a0, 1
651 ; RV64I-NEXT: or a0, a1, a0
652 ; RV64I-NEXT: ret
653 ;
654 ; RV32ZBB-LABEL: test_bitreverse_i64:
655 ; RV32ZBB: # %bb.0:
656 ; RV32ZBB-NEXT: rev8 a1, a1
657 ; RV32ZBB-NEXT: srli a2, a1, 4
658 ; RV32ZBB-NEXT: lui a3, 61681
659 ; RV32ZBB-NEXT: addi a3, a3, -241
660 ; RV32ZBB-NEXT: and a2, a2, a3
661 ; RV32ZBB-NEXT: and a1, a1, a3
662 ; RV32ZBB-NEXT: slli a1, a1, 4
663 ; RV32ZBB-NEXT: or a1, a2, a1
664 ; RV32ZBB-NEXT: srli a2, a1, 2
665 ; RV32ZBB-NEXT: lui a4, 209715
666 ; RV32ZBB-NEXT: addi a4, a4, 819
667 ; RV32ZBB-NEXT: and a2, a2, a4
668 ; RV32ZBB-NEXT: and a1, a1, a4
669 ; RV32ZBB-NEXT: slli a1, a1, 2
670 ; RV32ZBB-NEXT: or a1, a2, a1
671 ; RV32ZBB-NEXT: srli a2, a1, 1
672 ; RV32ZBB-NEXT: lui a5, 349525
673 ; RV32ZBB-NEXT: addi a5, a5, 1365
674 ; RV32ZBB-NEXT: and a2, a2, a5
675 ; RV32ZBB-NEXT: and a1, a1, a5
676 ; RV32ZBB-NEXT: slli a1, a1, 1
677 ; RV32ZBB-NEXT: or a2, a2, a1
678 ; RV32ZBB-NEXT: rev8 a0, a0
679 ; RV32ZBB-NEXT: srli a1, a0, 4
680 ; RV32ZBB-NEXT: and a1, a1, a3
681 ; RV32ZBB-NEXT: and a0, a0, a3
682 ; RV32ZBB-NEXT: slli a0, a0, 4
683 ; RV32ZBB-NEXT: or a0, a1, a0
684 ; RV32ZBB-NEXT: srli a1, a0, 2
685 ; RV32ZBB-NEXT: and a1, a1, a4
686 ; RV32ZBB-NEXT: and a0, a0, a4
687 ; RV32ZBB-NEXT: slli a0, a0, 2
688 ; RV32ZBB-NEXT: or a0, a1, a0
689 ; RV32ZBB-NEXT: srli a1, a0, 1
690 ; RV32ZBB-NEXT: and a1, a1, a5
691 ; RV32ZBB-NEXT: and a0, a0, a5
692 ; RV32ZBB-NEXT: slli a0, a0, 1
693 ; RV32ZBB-NEXT: or a1, a1, a0
694 ; RV32ZBB-NEXT: mv a0, a2
695 ; RV32ZBB-NEXT: ret
696 ;
697 ; RV64ZBB-LABEL: test_bitreverse_i64:
698 ; RV64ZBB: # %bb.0:
699 ; RV64ZBB-NEXT: rev8 a0, a0
700 ; RV64ZBB-NEXT: srli a1, a0, 4
701 ; RV64ZBB-NEXT: lui a2, 61681
702 ; RV64ZBB-NEXT: addiw a2, a2, -241
703 ; RV64ZBB-NEXT: slli a3, a2, 32
704 ; RV64ZBB-NEXT: add a2, a2, a3
705 ; RV64ZBB-NEXT: and a1, a1, a2
706 ; RV64ZBB-NEXT: and a0, a0, a2
707 ; RV64ZBB-NEXT: slli a0, a0, 4
708 ; RV64ZBB-NEXT: or a0, a1, a0
709 ; RV64ZBB-NEXT: srli a1, a0, 2
710 ; RV64ZBB-NEXT: lui a2, 209715
711 ; RV64ZBB-NEXT: addiw a2, a2, 819
712 ; RV64ZBB-NEXT: slli a3, a2, 32
713 ; RV64ZBB-NEXT: add a2, a2, a3
714 ; RV64ZBB-NEXT: and a1, a1, a2
715 ; RV64ZBB-NEXT: and a0, a0, a2
716 ; RV64ZBB-NEXT: slli a0, a0, 2
717 ; RV64ZBB-NEXT: or a0, a1, a0
718 ; RV64ZBB-NEXT: srli a1, a0, 1
719 ; RV64ZBB-NEXT: lui a2, 349525
720 ; RV64ZBB-NEXT: addiw a2, a2, 1365
721 ; RV64ZBB-NEXT: slli a3, a2, 32
722 ; RV64ZBB-NEXT: add a2, a2, a3
723 ; RV64ZBB-NEXT: and a1, a1, a2
724 ; RV64ZBB-NEXT: and a0, a0, a2
725 ; RV64ZBB-NEXT: slli a0, a0, 1
726 ; RV64ZBB-NEXT: or a0, a1, a0
727 ; RV64ZBB-NEXT: ret
728 ;
729 ; RV32ZBKB-LABEL: test_bitreverse_i64:
730 ; RV32ZBKB: # %bb.0:
731 ; RV32ZBKB-NEXT: rev8 a1, a1
732 ; RV32ZBKB-NEXT: brev8 a2, a1
733 ; RV32ZBKB-NEXT: rev8 a0, a0
734 ; RV32ZBKB-NEXT: brev8 a1, a0
735 ; RV32ZBKB-NEXT: mv a0, a2
736 ; RV32ZBKB-NEXT: ret
737 ;
738 ; RV64ZBKB-LABEL: test_bitreverse_i64:
739 ; RV64ZBKB: # %bb.0:
740 ; RV64ZBKB-NEXT: rev8 a0, a0
741 ; RV64ZBKB-NEXT: brev8 a0, a0
742 ; RV64ZBKB-NEXT: ret
743 %tmp = call i64 @llvm.bitreverse.i64(i64 %a)
744 ret i64 %tmp
745 }
747 define i16 @test_bswap_bitreverse_i16(i16 %a) nounwind {
748 ; RV32I-LABEL: test_bswap_bitreverse_i16:
749 ; RV32I: # %bb.0:
750 ; RV32I-NEXT: srli a1, a0, 4
751 ; RV32I-NEXT: lui a2, 1
752 ; RV32I-NEXT: addi a2, a2, -241
753 ; RV32I-NEXT: and a1, a1, a2
754 ; RV32I-NEXT: and a0, a0, a2
755 ; RV32I-NEXT: slli a0, a0, 4
756 ; RV32I-NEXT: or a0, a1, a0
757 ; RV32I-NEXT: srli a1, a0, 2
758 ; RV32I-NEXT: lui a2, 3
759 ; RV32I-NEXT: addi a2, a2, 819
760 ; RV32I-NEXT: and a1, a1, a2
761 ; RV32I-NEXT: and a0, a0, a2
762 ; RV32I-NEXT: slli a0, a0, 2
763 ; RV32I-NEXT: or a0, a1, a0
764 ; RV32I-NEXT: srli a1, a0, 1
765 ; RV32I-NEXT: lui a2, 5
766 ; RV32I-NEXT: addi a2, a2, 1365
767 ; RV32I-NEXT: and a1, a1, a2
768 ; RV32I-NEXT: and a0, a0, a2
769 ; RV32I-NEXT: slli a0, a0, 1
770 ; RV32I-NEXT: or a0, a1, a0
771 ; RV32I-NEXT: ret
772 ;
773 ; RV64I-LABEL: test_bswap_bitreverse_i16:
774 ; RV64I: # %bb.0:
775 ; RV64I-NEXT: srli a1, a0, 4
776 ; RV64I-NEXT: lui a2, 1
777 ; RV64I-NEXT: addiw a2, a2, -241
778 ; RV64I-NEXT: and a1, a1, a2
779 ; RV64I-NEXT: and a0, a0, a2
780 ; RV64I-NEXT: slli a0, a0, 4
781 ; RV64I-NEXT: or a0, a1, a0
782 ; RV64I-NEXT: srli a1, a0, 2
783 ; RV64I-NEXT: lui a2, 3
784 ; RV64I-NEXT: addiw a2, a2, 819
785 ; RV64I-NEXT: and a1, a1, a2
786 ; RV64I-NEXT: and a0, a0, a2
787 ; RV64I-NEXT: slli a0, a0, 2
788 ; RV64I-NEXT: or a0, a1, a0
789 ; RV64I-NEXT: srli a1, a0, 1
790 ; RV64I-NEXT: lui a2, 5
791 ; RV64I-NEXT: addiw a2, a2, 1365
792 ; RV64I-NEXT: and a1, a1, a2
793 ; RV64I-NEXT: and a0, a0, a2
794 ; RV64I-NEXT: slli a0, a0, 1
795 ; RV64I-NEXT: or a0, a1, a0
796 ; RV64I-NEXT: ret
797 ;
798 ; RV32ZBB-LABEL: test_bswap_bitreverse_i16:
799 ; RV32ZBB: # %bb.0:
800 ; RV32ZBB-NEXT: srli a1, a0, 4
801 ; RV32ZBB-NEXT: lui a2, 1
802 ; RV32ZBB-NEXT: addi a2, a2, -241
803 ; RV32ZBB-NEXT: and a1, a1, a2
804 ; RV32ZBB-NEXT: and a0, a0, a2
805 ; RV32ZBB-NEXT: slli a0, a0, 4
806 ; RV32ZBB-NEXT: or a0, a1, a0
807 ; RV32ZBB-NEXT: srli a1, a0, 2
808 ; RV32ZBB-NEXT: lui a2, 3
809 ; RV32ZBB-NEXT: addi a2, a2, 819
810 ; RV32ZBB-NEXT: and a1, a1, a2
811 ; RV32ZBB-NEXT: and a0, a0, a2
812 ; RV32ZBB-NEXT: slli a0, a0, 2
813 ; RV32ZBB-NEXT: or a0, a1, a0
814 ; RV32ZBB-NEXT: srli a1, a0, 1
815 ; RV32ZBB-NEXT: lui a2, 5
816 ; RV32ZBB-NEXT: addi a2, a2, 1365
817 ; RV32ZBB-NEXT: and a1, a1, a2
818 ; RV32ZBB-NEXT: and a0, a0, a2
819 ; RV32ZBB-NEXT: slli a0, a0, 1
820 ; RV32ZBB-NEXT: or a0, a1, a0
821 ; RV32ZBB-NEXT: ret
822 ;
823 ; RV64ZBB-LABEL: test_bswap_bitreverse_i16:
824 ; RV64ZBB: # %bb.0:
825 ; RV64ZBB-NEXT: srli a1, a0, 4
826 ; RV64ZBB-NEXT: lui a2, 1
827 ; RV64ZBB-NEXT: addiw a2, a2, -241
828 ; RV64ZBB-NEXT: and a1, a1, a2
829 ; RV64ZBB-NEXT: and a0, a0, a2
830 ; RV64ZBB-NEXT: slli a0, a0, 4
831 ; RV64ZBB-NEXT: or a0, a1, a0
832 ; RV64ZBB-NEXT: srli a1, a0, 2
833 ; RV64ZBB-NEXT: lui a2, 3
834 ; RV64ZBB-NEXT: addiw a2, a2, 819
835 ; RV64ZBB-NEXT: and a1, a1, a2
836 ; RV64ZBB-NEXT: and a0, a0, a2
837 ; RV64ZBB-NEXT: slli a0, a0, 2
838 ; RV64ZBB-NEXT: or a0, a1, a0
839 ; RV64ZBB-NEXT: srli a1, a0, 1
840 ; RV64ZBB-NEXT: lui a2, 5
841 ; RV64ZBB-NEXT: addiw a2, a2, 1365
842 ; RV64ZBB-NEXT: and a1, a1, a2
843 ; RV64ZBB-NEXT: and a0, a0, a2
844 ; RV64ZBB-NEXT: slli a0, a0, 1
845 ; RV64ZBB-NEXT: or a0, a1, a0
846 ; RV64ZBB-NEXT: ret
847 ;
848 ; RV32ZBKB-LABEL: test_bswap_bitreverse_i16:
849 ; RV32ZBKB: # %bb.0:
850 ; RV32ZBKB-NEXT: brev8 a0, a0
851 ; RV32ZBKB-NEXT: ret
852 ;
853 ; RV64ZBKB-LABEL: test_bswap_bitreverse_i16:
854 ; RV64ZBKB: # %bb.0:
855 ; RV64ZBKB-NEXT: brev8 a0, a0
856 ; RV64ZBKB-NEXT: ret
857 %tmp = call i16 @llvm.bswap.i16(i16 %a)
858 %tmp2 = call i16 @llvm.bitreverse.i16(i16 %tmp)
859 ret i16 %tmp2
860 }
862 define i32 @test_bswap_bitreverse_i32(i32 %a) nounwind {
863 ; RV32I-LABEL: test_bswap_bitreverse_i32:
864 ; RV32I: # %bb.0:
865 ; RV32I-NEXT: srli a1, a0, 4
866 ; RV32I-NEXT: lui a2, 61681
867 ; RV32I-NEXT: addi a2, a2, -241
868 ; RV32I-NEXT: and a1, a1, a2
869 ; RV32I-NEXT: and a0, a0, a2
870 ; RV32I-NEXT: slli a0, a0, 4
871 ; RV32I-NEXT: or a0, a1, a0
872 ; RV32I-NEXT: srli a1, a0, 2
873 ; RV32I-NEXT: lui a2, 209715
874 ; RV32I-NEXT: addi a2, a2, 819
875 ; RV32I-NEXT: and a1, a1, a2
876 ; RV32I-NEXT: and a0, a0, a2
877 ; RV32I-NEXT: slli a0, a0, 2
878 ; RV32I-NEXT: or a0, a1, a0
879 ; RV32I-NEXT: srli a1, a0, 1
880 ; RV32I-NEXT: lui a2, 349525
881 ; RV32I-NEXT: addi a2, a2, 1365
882 ; RV32I-NEXT: and a1, a1, a2
883 ; RV32I-NEXT: and a0, a0, a2
884 ; RV32I-NEXT: slli a0, a0, 1
885 ; RV32I-NEXT: or a0, a1, a0
886 ; RV32I-NEXT: ret
887 ;
888 ; RV64I-LABEL: test_bswap_bitreverse_i32:
889 ; RV64I: # %bb.0:
890 ; RV64I-NEXT: srli a1, a0, 4
891 ; RV64I-NEXT: lui a2, 61681
892 ; RV64I-NEXT: addiw a2, a2, -241
893 ; RV64I-NEXT: and a1, a1, a2
894 ; RV64I-NEXT: and a0, a0, a2
895 ; RV64I-NEXT: slliw a0, a0, 4
896 ; RV64I-NEXT: or a0, a1, a0
897 ; RV64I-NEXT: srli a1, a0, 2
898 ; RV64I-NEXT: lui a2, 209715
899 ; RV64I-NEXT: addiw a2, a2, 819
900 ; RV64I-NEXT: and a1, a1, a2
901 ; RV64I-NEXT: and a0, a0, a2
902 ; RV64I-NEXT: slliw a0, a0, 2
903 ; RV64I-NEXT: or a0, a1, a0
904 ; RV64I-NEXT: srli a1, a0, 1
905 ; RV64I-NEXT: lui a2, 349525
906 ; RV64I-NEXT: addiw a2, a2, 1365
907 ; RV64I-NEXT: and a1, a1, a2
908 ; RV64I-NEXT: and a0, a0, a2
909 ; RV64I-NEXT: slliw a0, a0, 1
910 ; RV64I-NEXT: or a0, a1, a0
911 ; RV64I-NEXT: ret
912 ;
913 ; RV32ZBB-LABEL: test_bswap_bitreverse_i32:
914 ; RV32ZBB: # %bb.0:
915 ; RV32ZBB-NEXT: srli a1, a0, 4
916 ; RV32ZBB-NEXT: lui a2, 61681
917 ; RV32ZBB-NEXT: addi a2, a2, -241
918 ; RV32ZBB-NEXT: and a1, a1, a2
919 ; RV32ZBB-NEXT: and a0, a0, a2
920 ; RV32ZBB-NEXT: slli a0, a0, 4
921 ; RV32ZBB-NEXT: or a0, a1, a0
922 ; RV32ZBB-NEXT: srli a1, a0, 2
923 ; RV32ZBB-NEXT: lui a2, 209715
924 ; RV32ZBB-NEXT: addi a2, a2, 819
925 ; RV32ZBB-NEXT: and a1, a1, a2
926 ; RV32ZBB-NEXT: and a0, a0, a2
927 ; RV32ZBB-NEXT: slli a0, a0, 2
928 ; RV32ZBB-NEXT: or a0, a1, a0
929 ; RV32ZBB-NEXT: srli a1, a0, 1
930 ; RV32ZBB-NEXT: lui a2, 349525
931 ; RV32ZBB-NEXT: addi a2, a2, 1365
932 ; RV32ZBB-NEXT: and a1, a1, a2
933 ; RV32ZBB-NEXT: and a0, a0, a2
934 ; RV32ZBB-NEXT: slli a0, a0, 1
935 ; RV32ZBB-NEXT: or a0, a1, a0
936 ; RV32ZBB-NEXT: ret
937 ;
938 ; RV64ZBB-LABEL: test_bswap_bitreverse_i32:
939 ; RV64ZBB: # %bb.0:
940 ; RV64ZBB-NEXT: srli a1, a0, 4
941 ; RV64ZBB-NEXT: lui a2, 61681
942 ; RV64ZBB-NEXT: addiw a2, a2, -241
943 ; RV64ZBB-NEXT: and a1, a1, a2
944 ; RV64ZBB-NEXT: and a0, a0, a2
945 ; RV64ZBB-NEXT: slliw a0, a0, 4
946 ; RV64ZBB-NEXT: or a0, a1, a0
947 ; RV64ZBB-NEXT: srli a1, a0, 2
948 ; RV64ZBB-NEXT: lui a2, 209715
949 ; RV64ZBB-NEXT: addiw a2, a2, 819
950 ; RV64ZBB-NEXT: and a1, a1, a2
951 ; RV64ZBB-NEXT: and a0, a0, a2
952 ; RV64ZBB-NEXT: slliw a0, a0, 2
953 ; RV64ZBB-NEXT: or a0, a1, a0
954 ; RV64ZBB-NEXT: srli a1, a0, 1
955 ; RV64ZBB-NEXT: lui a2, 349525
956 ; RV64ZBB-NEXT: addiw a2, a2, 1365
957 ; RV64ZBB-NEXT: and a1, a1, a2
958 ; RV64ZBB-NEXT: and a0, a0, a2
959 ; RV64ZBB-NEXT: slliw a0, a0, 1
960 ; RV64ZBB-NEXT: or a0, a1, a0
961 ; RV64ZBB-NEXT: ret
962 ;
963 ; RV32ZBKB-LABEL: test_bswap_bitreverse_i32:
964 ; RV32ZBKB: # %bb.0:
965 ; RV32ZBKB-NEXT: brev8 a0, a0
966 ; RV32ZBKB-NEXT: ret
967 ;
968 ; RV64ZBKB-LABEL: test_bswap_bitreverse_i32:
969 ; RV64ZBKB: # %bb.0:
970 ; RV64ZBKB-NEXT: brev8 a0, a0
971 ; RV64ZBKB-NEXT: ret
972 %tmp = call i32 @llvm.bswap.i32(i32 %a)
973 %tmp2 = call i32 @llvm.bitreverse.i32(i32 %tmp)
974 ret i32 %tmp2
975 }
977 define i64 @test_bswap_bitreverse_i64(i64 %a) nounwind {
978 ; RV32I-LABEL: test_bswap_bitreverse_i64:
979 ; RV32I: # %bb.0:
980 ; RV32I-NEXT: srli a2, a0, 4
981 ; RV32I-NEXT: lui a3, 61681
982 ; RV32I-NEXT: addi a3, a3, -241
983 ; RV32I-NEXT: and a2, a2, a3
984 ; RV32I-NEXT: and a0, a0, a3
985 ; RV32I-NEXT: slli a0, a0, 4
986 ; RV32I-NEXT: or a0, a2, a0
987 ; RV32I-NEXT: srli a2, a0, 2
988 ; RV32I-NEXT: lui a4, 209715
989 ; RV32I-NEXT: addi a4, a4, 819
990 ; RV32I-NEXT: and a2, a2, a4
991 ; RV32I-NEXT: and a0, a0, a4
992 ; RV32I-NEXT: slli a0, a0, 2
993 ; RV32I-NEXT: or a0, a2, a0
994 ; RV32I-NEXT: srli a2, a0, 1
995 ; RV32I-NEXT: lui a5, 349525
996 ; RV32I-NEXT: addi a5, a5, 1365
997 ; RV32I-NEXT: and a2, a2, a5
998 ; RV32I-NEXT: and a0, a0, a5
999 ; RV32I-NEXT: slli a0, a0, 1
1000 ; RV32I-NEXT: or a0, a2, a0
1001 ; RV32I-NEXT: srli a2, a1, 4
1002 ; RV32I-NEXT: and a2, a2, a3
1003 ; RV32I-NEXT: and a1, a1, a3
1004 ; RV32I-NEXT: slli a1, a1, 4
1005 ; RV32I-NEXT: or a1, a2, a1
1006 ; RV32I-NEXT: srli a2, a1, 2
1007 ; RV32I-NEXT: and a2, a2, a4
1008 ; RV32I-NEXT: and a1, a1, a4
1009 ; RV32I-NEXT: slli a1, a1, 2
1010 ; RV32I-NEXT: or a1, a2, a1
1011 ; RV32I-NEXT: srli a2, a1, 1
1012 ; RV32I-NEXT: and a2, a2, a5
1013 ; RV32I-NEXT: and a1, a1, a5
1014 ; RV32I-NEXT: slli a1, a1, 1
1015 ; RV32I-NEXT: or a1, a2, a1
1016 ; RV32I-NEXT: ret
1017 ;
1018 ; RV64I-LABEL: test_bswap_bitreverse_i64:
1019 ; RV64I: # %bb.0:
1020 ; RV64I-NEXT: srli a1, a0, 4
1021 ; RV64I-NEXT: lui a2, 61681
1022 ; RV64I-NEXT: addiw a2, a2, -241
1023 ; RV64I-NEXT: slli a3, a2, 32
1024 ; RV64I-NEXT: add a2, a2, a3
1025 ; RV64I-NEXT: and a1, a1, a2
1026 ; RV64I-NEXT: and a0, a0, a2
1027 ; RV64I-NEXT: slli a0, a0, 4
1028 ; RV64I-NEXT: or a0, a1, a0
1029 ; RV64I-NEXT: srli a1, a0, 2
1030 ; RV64I-NEXT: lui a2, 209715
1031 ; RV64I-NEXT: addiw a2, a2, 819
1032 ; RV64I-NEXT: slli a3, a2, 32
1033 ; RV64I-NEXT: add a2, a2, a3
1034 ; RV64I-NEXT: and a1, a1, a2
1035 ; RV64I-NEXT: and a0, a0, a2
1036 ; RV64I-NEXT: slli a0, a0, 2
1037 ; RV64I-NEXT: or a0, a1, a0
1038 ; RV64I-NEXT: srli a1, a0, 1
1039 ; RV64I-NEXT: lui a2, 349525
1040 ; RV64I-NEXT: addiw a2, a2, 1365
1041 ; RV64I-NEXT: slli a3, a2, 32
1042 ; RV64I-NEXT: add a2, a2, a3
1043 ; RV64I-NEXT: and a1, a1, a2
1044 ; RV64I-NEXT: and a0, a0, a2
1045 ; RV64I-NEXT: slli a0, a0, 1
1046 ; RV64I-NEXT: or a0, a1, a0
1047 ; RV64I-NEXT: ret
1048 ;
1049 ; RV32ZBB-LABEL: test_bswap_bitreverse_i64:
1050 ; RV32ZBB: # %bb.0:
1051 ; RV32ZBB-NEXT: srli a2, a0, 4
1052 ; RV32ZBB-NEXT: lui a3, 61681
1053 ; RV32ZBB-NEXT: addi a3, a3, -241
1054 ; RV32ZBB-NEXT: and a2, a2, a3
1055 ; RV32ZBB-NEXT: and a0, a0, a3
1056 ; RV32ZBB-NEXT: slli a0, a0, 4
1057 ; RV32ZBB-NEXT: or a0, a2, a0
1058 ; RV32ZBB-NEXT: srli a2, a0, 2
1059 ; RV32ZBB-NEXT: lui a4, 209715
1060 ; RV32ZBB-NEXT: addi a4, a4, 819
1061 ; RV32ZBB-NEXT: and a2, a2, a4
1062 ; RV32ZBB-NEXT: and a0, a0, a4
1063 ; RV32ZBB-NEXT: slli a0, a0, 2
1064 ; RV32ZBB-NEXT: or a0, a2, a0
1065 ; RV32ZBB-NEXT: srli a2, a0, 1
1066 ; RV32ZBB-NEXT: lui a5, 349525
1067 ; RV32ZBB-NEXT: addi a5, a5, 1365
1068 ; RV32ZBB-NEXT: and a2, a2, a5
1069 ; RV32ZBB-NEXT: and a0, a0, a5
1070 ; RV32ZBB-NEXT: slli a0, a0, 1
1071 ; RV32ZBB-NEXT: or a0, a2, a0
1072 ; RV32ZBB-NEXT: srli a2, a1, 4
1073 ; RV32ZBB-NEXT: and a2, a2, a3
1074 ; RV32ZBB-NEXT: and a1, a1, a3
1075 ; RV32ZBB-NEXT: slli a1, a1, 4
1076 ; RV32ZBB-NEXT: or a1, a2, a1
1077 ; RV32ZBB-NEXT: srli a2, a1, 2
1078 ; RV32ZBB-NEXT: and a2, a2, a4
1079 ; RV32ZBB-NEXT: and a1, a1, a4
1080 ; RV32ZBB-NEXT: slli a1, a1, 2
1081 ; RV32ZBB-NEXT: or a1, a2, a1
1082 ; RV32ZBB-NEXT: srli a2, a1, 1
1083 ; RV32ZBB-NEXT: and a2, a2, a5
1084 ; RV32ZBB-NEXT: and a1, a1, a5
1085 ; RV32ZBB-NEXT: slli a1, a1, 1
1086 ; RV32ZBB-NEXT: or a1, a2, a1
1087 ; RV32ZBB-NEXT: ret
1088 ;
1089 ; RV64ZBB-LABEL: test_bswap_bitreverse_i64:
1090 ; RV64ZBB: # %bb.0:
1091 ; RV64ZBB-NEXT: srli a1, a0, 4
1092 ; RV64ZBB-NEXT: lui a2, 61681
1093 ; RV64ZBB-NEXT: addiw a2, a2, -241
1094 ; RV64ZBB-NEXT: slli a3, a2, 32
1095 ; RV64ZBB-NEXT: add a2, a2, a3
1096 ; RV64ZBB-NEXT: and a1, a1, a2
1097 ; RV64ZBB-NEXT: and a0, a0, a2
1098 ; RV64ZBB-NEXT: slli a0, a0, 4
1099 ; RV64ZBB-NEXT: or a0, a1, a0
1100 ; RV64ZBB-NEXT: srli a1, a0, 2
1101 ; RV64ZBB-NEXT: lui a2, 209715
1102 ; RV64ZBB-NEXT: addiw a2, a2, 819
1103 ; RV64ZBB-NEXT: slli a3, a2, 32
1104 ; RV64ZBB-NEXT: add a2, a2, a3
1105 ; RV64ZBB-NEXT: and a1, a1, a2
1106 ; RV64ZBB-NEXT: and a0, a0, a2
1107 ; RV64ZBB-NEXT: slli a0, a0, 2
1108 ; RV64ZBB-NEXT: or a0, a1, a0
1109 ; RV64ZBB-NEXT: srli a1, a0, 1
1110 ; RV64ZBB-NEXT: lui a2, 349525
1111 ; RV64ZBB-NEXT: addiw a2, a2, 1365
1112 ; RV64ZBB-NEXT: slli a3, a2, 32
1113 ; RV64ZBB-NEXT: add a2, a2, a3
1114 ; RV64ZBB-NEXT: and a1, a1, a2
1115 ; RV64ZBB-NEXT: and a0, a0, a2
1116 ; RV64ZBB-NEXT: slli a0, a0, 1
1117 ; RV64ZBB-NEXT: or a0, a1, a0
1118 ; RV64ZBB-NEXT: ret
1119 ;
1120 ; RV32ZBKB-LABEL: test_bswap_bitreverse_i64:
1121 ; RV32ZBKB: # %bb.0:
1122 ; RV32ZBKB-NEXT: brev8 a0, a0
1123 ; RV32ZBKB-NEXT: brev8 a1, a1
1124 ; RV32ZBKB-NEXT: ret
1125 ;
1126 ; RV64ZBKB-LABEL: test_bswap_bitreverse_i64:
1127 ; RV64ZBKB: # %bb.0:
1128 ; RV64ZBKB-NEXT: brev8 a0, a0
1129 ; RV64ZBKB-NEXT: ret
1130 %tmp = call i64 @llvm.bswap.i64(i64 %a)
1131 %tmp2 = call i64 @llvm.bitreverse.i64(i64 %tmp)
1132 ret i64 %tmp2
1133 }
1135 define i16 @test_bitreverse_bswap_i16(i16 %a) nounwind {
1136 ; RV32I-LABEL: test_bitreverse_bswap_i16:
1137 ; RV32I: # %bb.0:
1138 ; RV32I-NEXT: srli a1, a0, 4
1139 ; RV32I-NEXT: lui a2, 1
1140 ; RV32I-NEXT: addi a2, a2, -241
1141 ; RV32I-NEXT: and a1, a1, a2
1142 ; RV32I-NEXT: and a0, a0, a2
1143 ; RV32I-NEXT: slli a0, a0, 4
1144 ; RV32I-NEXT: or a0, a1, a0
1145 ; RV32I-NEXT: srli a1, a0, 2
1146 ; RV32I-NEXT: lui a2, 3
1147 ; RV32I-NEXT: addi a2, a2, 819
1148 ; RV32I-NEXT: and a1, a1, a2
1149 ; RV32I-NEXT: and a0, a0, a2
1150 ; RV32I-NEXT: slli a0, a0, 2
1151 ; RV32I-NEXT: or a0, a1, a0
1152 ; RV32I-NEXT: srli a1, a0, 1
1153 ; RV32I-NEXT: lui a2, 5
1154 ; RV32I-NEXT: addi a2, a2, 1365
1155 ; RV32I-NEXT: and a1, a1, a2
1156 ; RV32I-NEXT: and a0, a0, a2
1157 ; RV32I-NEXT: slli a0, a0, 1
1158 ; RV32I-NEXT: or a0, a1, a0
1159 ; RV32I-NEXT: ret
1160 ;
1161 ; RV64I-LABEL: test_bitreverse_bswap_i16:
1162 ; RV64I: # %bb.0:
1163 ; RV64I-NEXT: srli a1, a0, 4
1164 ; RV64I-NEXT: lui a2, 1
1165 ; RV64I-NEXT: addiw a2, a2, -241
1166 ; RV64I-NEXT: and a1, a1, a2
1167 ; RV64I-NEXT: and a0, a0, a2
1168 ; RV64I-NEXT: slli a0, a0, 4
1169 ; RV64I-NEXT: or a0, a1, a0
1170 ; RV64I-NEXT: srli a1, a0, 2
1171 ; RV64I-NEXT: lui a2, 3
1172 ; RV64I-NEXT: addiw a2, a2, 819
1173 ; RV64I-NEXT: and a1, a1, a2
1174 ; RV64I-NEXT: and a0, a0, a2
1175 ; RV64I-NEXT: slli a0, a0, 2
1176 ; RV64I-NEXT: or a0, a1, a0
1177 ; RV64I-NEXT: srli a1, a0, 1
1178 ; RV64I-NEXT: lui a2, 5
1179 ; RV64I-NEXT: addiw a2, a2, 1365
1180 ; RV64I-NEXT: and a1, a1, a2
1181 ; RV64I-NEXT: and a0, a0, a2
1182 ; RV64I-NEXT: slli a0, a0, 1
1183 ; RV64I-NEXT: or a0, a1, a0
1184 ; RV64I-NEXT: ret
1185 ;
1186 ; RV32ZBB-LABEL: test_bitreverse_bswap_i16:
1187 ; RV32ZBB: # %bb.0:
1188 ; RV32ZBB-NEXT: srli a1, a0, 4
1189 ; RV32ZBB-NEXT: lui a2, 1
1190 ; RV32ZBB-NEXT: addi a2, a2, -241
1191 ; RV32ZBB-NEXT: and a1, a1, a2
1192 ; RV32ZBB-NEXT: and a0, a0, a2
1193 ; RV32ZBB-NEXT: slli a0, a0, 4
1194 ; RV32ZBB-NEXT: or a0, a1, a0
1195 ; RV32ZBB-NEXT: srli a1, a0, 2
1196 ; RV32ZBB-NEXT: lui a2, 3
1197 ; RV32ZBB-NEXT: addi a2, a2, 819
1198 ; RV32ZBB-NEXT: and a1, a1, a2
1199 ; RV32ZBB-NEXT: and a0, a0, a2
1200 ; RV32ZBB-NEXT: slli a0, a0, 2
1201 ; RV32ZBB-NEXT: or a0, a1, a0
1202 ; RV32ZBB-NEXT: srli a1, a0, 1
1203 ; RV32ZBB-NEXT: lui a2, 5
1204 ; RV32ZBB-NEXT: addi a2, a2, 1365
1205 ; RV32ZBB-NEXT: and a1, a1, a2
1206 ; RV32ZBB-NEXT: and a0, a0, a2
1207 ; RV32ZBB-NEXT: slli a0, a0, 1
1208 ; RV32ZBB-NEXT: or a0, a1, a0
1209 ; RV32ZBB-NEXT: ret
1210 ;
1211 ; RV64ZBB-LABEL: test_bitreverse_bswap_i16:
1212 ; RV64ZBB: # %bb.0:
1213 ; RV64ZBB-NEXT: srli a1, a0, 4
1214 ; RV64ZBB-NEXT: lui a2, 1
1215 ; RV64ZBB-NEXT: addiw a2, a2, -241
1216 ; RV64ZBB-NEXT: and a1, a1, a2
1217 ; RV64ZBB-NEXT: and a0, a0, a2
1218 ; RV64ZBB-NEXT: slli a0, a0, 4
1219 ; RV64ZBB-NEXT: or a0, a1, a0
1220 ; RV64ZBB-NEXT: srli a1, a0, 2
1221 ; RV64ZBB-NEXT: lui a2, 3
1222 ; RV64ZBB-NEXT: addiw a2, a2, 819
1223 ; RV64ZBB-NEXT: and a1, a1, a2
1224 ; RV64ZBB-NEXT: and a0, a0, a2
1225 ; RV64ZBB-NEXT: slli a0, a0, 2
1226 ; RV64ZBB-NEXT: or a0, a1, a0
1227 ; RV64ZBB-NEXT: srli a1, a0, 1
1228 ; RV64ZBB-NEXT: lui a2, 5
1229 ; RV64ZBB-NEXT: addiw a2, a2, 1365
1230 ; RV64ZBB-NEXT: and a1, a1, a2
1231 ; RV64ZBB-NEXT: and a0, a0, a2
1232 ; RV64ZBB-NEXT: slli a0, a0, 1
1233 ; RV64ZBB-NEXT: or a0, a1, a0
1234 ; RV64ZBB-NEXT: ret
1235 ;
1236 ; RV32ZBKB-LABEL: test_bitreverse_bswap_i16:
1237 ; RV32ZBKB: # %bb.0:
1238 ; RV32ZBKB-NEXT: brev8 a0, a0
1239 ; RV32ZBKB-NEXT: ret
1240 ;
1241 ; RV64ZBKB-LABEL: test_bitreverse_bswap_i16:
1242 ; RV64ZBKB: # %bb.0:
1243 ; RV64ZBKB-NEXT: brev8 a0, a0
1244 ; RV64ZBKB-NEXT: ret
1245 %tmp = call i16 @llvm.bitreverse.i16(i16 %a)
1246 %tmp2 = call i16 @llvm.bswap.i16(i16 %tmp)
1247 ret i16 %tmp2
1248 }
1250 define i32 @test_bitreverse_bswap_i32(i32 %a) nounwind {
1251 ; RV32I-LABEL: test_bitreverse_bswap_i32:
1252 ; RV32I: # %bb.0:
1253 ; RV32I-NEXT: srli a1, a0, 4
1254 ; RV32I-NEXT: lui a2, 61681
1255 ; RV32I-NEXT: addi a2, a2, -241
1256 ; RV32I-NEXT: and a1, a1, a2
1257 ; RV32I-NEXT: and a0, a0, a2
1258 ; RV32I-NEXT: slli a0, a0, 4
1259 ; RV32I-NEXT: or a0, a1, a0
1260 ; RV32I-NEXT: srli a1, a0, 2
1261 ; RV32I-NEXT: lui a2, 209715
1262 ; RV32I-NEXT: addi a2, a2, 819
1263 ; RV32I-NEXT: and a1, a1, a2
1264 ; RV32I-NEXT: and a0, a0, a2
1265 ; RV32I-NEXT: slli a0, a0, 2
1266 ; RV32I-NEXT: or a0, a1, a0
1267 ; RV32I-NEXT: srli a1, a0, 1
1268 ; RV32I-NEXT: lui a2, 349525
1269 ; RV32I-NEXT: addi a2, a2, 1365
1270 ; RV32I-NEXT: and a1, a1, a2
1271 ; RV32I-NEXT: and a0, a0, a2
1272 ; RV32I-NEXT: slli a0, a0, 1
1273 ; RV32I-NEXT: or a0, a1, a0
1274 ; RV32I-NEXT: ret
1275 ;
1276 ; RV64I-LABEL: test_bitreverse_bswap_i32:
1277 ; RV64I: # %bb.0:
1278 ; RV64I-NEXT: srli a1, a0, 4
1279 ; RV64I-NEXT: lui a2, 61681
1280 ; RV64I-NEXT: addiw a2, a2, -241
1281 ; RV64I-NEXT: and a1, a1, a2
1282 ; RV64I-NEXT: and a0, a0, a2
1283 ; RV64I-NEXT: slliw a0, a0, 4
1284 ; RV64I-NEXT: or a0, a1, a0
1285 ; RV64I-NEXT: srli a1, a0, 2
1286 ; RV64I-NEXT: lui a2, 209715
1287 ; RV64I-NEXT: addiw a2, a2, 819
1288 ; RV64I-NEXT: and a1, a1, a2
1289 ; RV64I-NEXT: and a0, a0, a2
1290 ; RV64I-NEXT: slliw a0, a0, 2
1291 ; RV64I-NEXT: or a0, a1, a0
1292 ; RV64I-NEXT: srli a1, a0, 1
1293 ; RV64I-NEXT: lui a2, 349525
1294 ; RV64I-NEXT: addiw a2, a2, 1365
1295 ; RV64I-NEXT: and a1, a1, a2
1296 ; RV64I-NEXT: and a0, a0, a2
1297 ; RV64I-NEXT: slliw a0, a0, 1
1298 ; RV64I-NEXT: or a0, a1, a0
1299 ; RV64I-NEXT: ret
1300 ;
1301 ; RV32ZBB-LABEL: test_bitreverse_bswap_i32:
1302 ; RV32ZBB: # %bb.0:
1303 ; RV32ZBB-NEXT: srli a1, a0, 4
1304 ; RV32ZBB-NEXT: lui a2, 61681
1305 ; RV32ZBB-NEXT: addi a2, a2, -241
1306 ; RV32ZBB-NEXT: and a1, a1, a2
1307 ; RV32ZBB-NEXT: and a0, a0, a2
1308 ; RV32ZBB-NEXT: slli a0, a0, 4
1309 ; RV32ZBB-NEXT: or a0, a1, a0
1310 ; RV32ZBB-NEXT: srli a1, a0, 2
1311 ; RV32ZBB-NEXT: lui a2, 209715
1312 ; RV32ZBB-NEXT: addi a2, a2, 819
1313 ; RV32ZBB-NEXT: and a1, a1, a2
1314 ; RV32ZBB-NEXT: and a0, a0, a2
1315 ; RV32ZBB-NEXT: slli a0, a0, 2
1316 ; RV32ZBB-NEXT: or a0, a1, a0
1317 ; RV32ZBB-NEXT: srli a1, a0, 1
1318 ; RV32ZBB-NEXT: lui a2, 349525
1319 ; RV32ZBB-NEXT: addi a2, a2, 1365
1320 ; RV32ZBB-NEXT: and a1, a1, a2
1321 ; RV32ZBB-NEXT: and a0, a0, a2
1322 ; RV32ZBB-NEXT: slli a0, a0, 1
1323 ; RV32ZBB-NEXT: or a0, a1, a0
1324 ; RV32ZBB-NEXT: ret
1325 ;
1326 ; RV64ZBB-LABEL: test_bitreverse_bswap_i32:
1327 ; RV64ZBB: # %bb.0:
1328 ; RV64ZBB-NEXT: srli a1, a0, 4
1329 ; RV64ZBB-NEXT: lui a2, 61681
1330 ; RV64ZBB-NEXT: addiw a2, a2, -241
1331 ; RV64ZBB-NEXT: and a1, a1, a2
1332 ; RV64ZBB-NEXT: and a0, a0, a2
1333 ; RV64ZBB-NEXT: slliw a0, a0, 4
1334 ; RV64ZBB-NEXT: or a0, a1, a0
1335 ; RV64ZBB-NEXT: srli a1, a0, 2
1336 ; RV64ZBB-NEXT: lui a2, 209715
1337 ; RV64ZBB-NEXT: addiw a2, a2, 819
1338 ; RV64ZBB-NEXT: and a1, a1, a2
1339 ; RV64ZBB-NEXT: and a0, a0, a2
1340 ; RV64ZBB-NEXT: slliw a0, a0, 2
1341 ; RV64ZBB-NEXT: or a0, a1, a0
1342 ; RV64ZBB-NEXT: srli a1, a0, 1
1343 ; RV64ZBB-NEXT: lui a2, 349525
1344 ; RV64ZBB-NEXT: addiw a2, a2, 1365
1345 ; RV64ZBB-NEXT: and a1, a1, a2
1346 ; RV64ZBB-NEXT: and a0, a0, a2
1347 ; RV64ZBB-NEXT: slliw a0, a0, 1
1348 ; RV64ZBB-NEXT: or a0, a1, a0
1349 ; RV64ZBB-NEXT: ret
1350 ;
1351 ; RV32ZBKB-LABEL: test_bitreverse_bswap_i32:
1352 ; RV32ZBKB: # %bb.0:
1353 ; RV32ZBKB-NEXT: brev8 a0, a0
1354 ; RV32ZBKB-NEXT: ret
1355 ;
1356 ; RV64ZBKB-LABEL: test_bitreverse_bswap_i32:
1357 ; RV64ZBKB: # %bb.0:
1358 ; RV64ZBKB-NEXT: brev8 a0, a0
1359 ; RV64ZBKB-NEXT: ret
1360 %tmp = call i32 @llvm.bitreverse.i32(i32 %a)
1361 %tmp2 = call i32 @llvm.bswap.i32(i32 %tmp)
1362 ret i32 %tmp2
1363 }
1365 define i64 @test_bitreverse_bswap_i64(i64 %a) nounwind {
1366 ; RV32I-LABEL: test_bitreverse_bswap_i64:
1367 ; RV32I: # %bb.0:
1368 ; RV32I-NEXT: srli a2, a0, 4
1369 ; RV32I-NEXT: lui a3, 61681
1370 ; RV32I-NEXT: addi a3, a3, -241
1371 ; RV32I-NEXT: and a2, a2, a3
1372 ; RV32I-NEXT: and a0, a0, a3
1373 ; RV32I-NEXT: slli a0, a0, 4
1374 ; RV32I-NEXT: or a0, a2, a0
1375 ; RV32I-NEXT: srli a2, a0, 2
1376 ; RV32I-NEXT: lui a4, 209715
1377 ; RV32I-NEXT: addi a4, a4, 819
1378 ; RV32I-NEXT: and a2, a2, a4
1379 ; RV32I-NEXT: and a0, a0, a4
1380 ; RV32I-NEXT: slli a0, a0, 2
1381 ; RV32I-NEXT: or a0, a2, a0
1382 ; RV32I-NEXT: srli a2, a0, 1
1383 ; RV32I-NEXT: lui a5, 349525
1384 ; RV32I-NEXT: addi a5, a5, 1365
1385 ; RV32I-NEXT: and a2, a2, a5
1386 ; RV32I-NEXT: and a0, a0, a5
1387 ; RV32I-NEXT: slli a0, a0, 1
1388 ; RV32I-NEXT: or a0, a2, a0
1389 ; RV32I-NEXT: srli a2, a1, 4
1390 ; RV32I-NEXT: and a2, a2, a3
1391 ; RV32I-NEXT: and a1, a1, a3
1392 ; RV32I-NEXT: slli a1, a1, 4
1393 ; RV32I-NEXT: or a1, a2, a1
1394 ; RV32I-NEXT: srli a2, a1, 2
1395 ; RV32I-NEXT: and a2, a2, a4
1396 ; RV32I-NEXT: and a1, a1, a4
1397 ; RV32I-NEXT: slli a1, a1, 2
1398 ; RV32I-NEXT: or a1, a2, a1
1399 ; RV32I-NEXT: srli a2, a1, 1
1400 ; RV32I-NEXT: and a2, a2, a5
1401 ; RV32I-NEXT: and a1, a1, a5
1402 ; RV32I-NEXT: slli a1, a1, 1
1403 ; RV32I-NEXT: or a1, a2, a1
1404 ; RV32I-NEXT: ret
1405 ;
1406 ; RV64I-LABEL: test_bitreverse_bswap_i64:
1407 ; RV64I: # %bb.0:
1408 ; RV64I-NEXT: srli a1, a0, 4
1409 ; RV64I-NEXT: lui a2, 61681
1410 ; RV64I-NEXT: addiw a2, a2, -241
1411 ; RV64I-NEXT: slli a3, a2, 32
1412 ; RV64I-NEXT: add a2, a2, a3
1413 ; RV64I-NEXT: and a1, a1, a2
1414 ; RV64I-NEXT: and a0, a0, a2
1415 ; RV64I-NEXT: slli a0, a0, 4
1416 ; RV64I-NEXT: or a0, a1, a0
1417 ; RV64I-NEXT: srli a1, a0, 2
1418 ; RV64I-NEXT: lui a2, 209715
1419 ; RV64I-NEXT: addiw a2, a2, 819
1420 ; RV64I-NEXT: slli a3, a2, 32
1421 ; RV64I-NEXT: add a2, a2, a3
1422 ; RV64I-NEXT: and a1, a1, a2
1423 ; RV64I-NEXT: and a0, a0, a2
1424 ; RV64I-NEXT: slli a0, a0, 2
1425 ; RV64I-NEXT: or a0, a1, a0
1426 ; RV64I-NEXT: srli a1, a0, 1
1427 ; RV64I-NEXT: lui a2, 349525
1428 ; RV64I-NEXT: addiw a2, a2, 1365
1429 ; RV64I-NEXT: slli a3, a2, 32
1430 ; RV64I-NEXT: add a2, a2, a3
1431 ; RV64I-NEXT: and a1, a1, a2
1432 ; RV64I-NEXT: and a0, a0, a2
1433 ; RV64I-NEXT: slli a0, a0, 1
1434 ; RV64I-NEXT: or a0, a1, a0
1435 ; RV64I-NEXT: ret
1436 ;
1437 ; RV32ZBB-LABEL: test_bitreverse_bswap_i64:
1438 ; RV32ZBB: # %bb.0:
1439 ; RV32ZBB-NEXT: srli a2, a0, 4
1440 ; RV32ZBB-NEXT: lui a3, 61681
1441 ; RV32ZBB-NEXT: addi a3, a3, -241
1442 ; RV32ZBB-NEXT: and a2, a2, a3
1443 ; RV32ZBB-NEXT: and a0, a0, a3
1444 ; RV32ZBB-NEXT: slli a0, a0, 4
1445 ; RV32ZBB-NEXT: or a0, a2, a0
1446 ; RV32ZBB-NEXT: srli a2, a0, 2
1447 ; RV32ZBB-NEXT: lui a4, 209715
1448 ; RV32ZBB-NEXT: addi a4, a4, 819
1449 ; RV32ZBB-NEXT: and a2, a2, a4
1450 ; RV32ZBB-NEXT: and a0, a0, a4
1451 ; RV32ZBB-NEXT: slli a0, a0, 2
1452 ; RV32ZBB-NEXT: or a0, a2, a0
1453 ; RV32ZBB-NEXT: srli a2, a0, 1
1454 ; RV32ZBB-NEXT: lui a5, 349525
1455 ; RV32ZBB-NEXT: addi a5, a5, 1365
1456 ; RV32ZBB-NEXT: and a2, a2, a5
1457 ; RV32ZBB-NEXT: and a0, a0, a5
1458 ; RV32ZBB-NEXT: slli a0, a0, 1
1459 ; RV32ZBB-NEXT: or a0, a2, a0
1460 ; RV32ZBB-NEXT: srli a2, a1, 4
1461 ; RV32ZBB-NEXT: and a2, a2, a3
1462 ; RV32ZBB-NEXT: and a1, a1, a3
1463 ; RV32ZBB-NEXT: slli a1, a1, 4
1464 ; RV32ZBB-NEXT: or a1, a2, a1
1465 ; RV32ZBB-NEXT: srli a2, a1, 2
1466 ; RV32ZBB-NEXT: and a2, a2, a4
1467 ; RV32ZBB-NEXT: and a1, a1, a4
1468 ; RV32ZBB-NEXT: slli a1, a1, 2
1469 ; RV32ZBB-NEXT: or a1, a2, a1
1470 ; RV32ZBB-NEXT: srli a2, a1, 1
1471 ; RV32ZBB-NEXT: and a2, a2, a5
1472 ; RV32ZBB-NEXT: and a1, a1, a5
1473 ; RV32ZBB-NEXT: slli a1, a1, 1
1474 ; RV32ZBB-NEXT: or a1, a2, a1
1475 ; RV32ZBB-NEXT: ret
1476 ;
1477 ; RV64ZBB-LABEL: test_bitreverse_bswap_i64:
1478 ; RV64ZBB: # %bb.0:
1479 ; RV64ZBB-NEXT: srli a1, a0, 4
1480 ; RV64ZBB-NEXT: lui a2, 61681
1481 ; RV64ZBB-NEXT: addiw a2, a2, -241
1482 ; RV64ZBB-NEXT: slli a3, a2, 32
1483 ; RV64ZBB-NEXT: add a2, a2, a3
1484 ; RV64ZBB-NEXT: and a1, a1, a2
1485 ; RV64ZBB-NEXT: and a0, a0, a2
1486 ; RV64ZBB-NEXT: slli a0, a0, 4
1487 ; RV64ZBB-NEXT: or a0, a1, a0
1488 ; RV64ZBB-NEXT: srli a1, a0, 2
1489 ; RV64ZBB-NEXT: lui a2, 209715
1490 ; RV64ZBB-NEXT: addiw a2, a2, 819
1491 ; RV64ZBB-NEXT: slli a3, a2, 32
1492 ; RV64ZBB-NEXT: add a2, a2, a3
1493 ; RV64ZBB-NEXT: and a1, a1, a2
1494 ; RV64ZBB-NEXT: and a0, a0, a2
1495 ; RV64ZBB-NEXT: slli a0, a0, 2
1496 ; RV64ZBB-NEXT: or a0, a1, a0
1497 ; RV64ZBB-NEXT: srli a1, a0, 1
1498 ; RV64ZBB-NEXT: lui a2, 349525
1499 ; RV64ZBB-NEXT: addiw a2, a2, 1365
1500 ; RV64ZBB-NEXT: slli a3, a2, 32
1501 ; RV64ZBB-NEXT: add a2, a2, a3
1502 ; RV64ZBB-NEXT: and a1, a1, a2
1503 ; RV64ZBB-NEXT: and a0, a0, a2
1504 ; RV64ZBB-NEXT: slli a0, a0, 1
1505 ; RV64ZBB-NEXT: or a0, a1, a0
1506 ; RV64ZBB-NEXT: ret
1507 ;
1508 ; RV32ZBKB-LABEL: test_bitreverse_bswap_i64:
1509 ; RV32ZBKB: # %bb.0:
1510 ; RV32ZBKB-NEXT: brev8 a0, a0
1511 ; RV32ZBKB-NEXT: brev8 a1, a1
1512 ; RV32ZBKB-NEXT: ret
1513 ;
1514 ; RV64ZBKB-LABEL: test_bitreverse_bswap_i64:
1515 ; RV64ZBKB: # %bb.0:
1516 ; RV64ZBKB-NEXT: brev8 a0, a0
1517 ; RV64ZBKB-NEXT: ret
1518 %tmp = call i64 @llvm.bitreverse.i64(i64 %a)
1519 %tmp2 = call i64 @llvm.bswap.i64(i64 %tmp)
1520 ret i64 %tmp2
1521 }
1523 define i32 @pr55484(i32 %0) {
1524 ; RV32I-LABEL: pr55484:
1525 ; RV32I: # %bb.0:
1526 ; RV32I-NEXT: slli a1, a0, 8
1527 ; RV32I-NEXT: slli a0, a0, 24
1528 ; RV32I-NEXT: or a0, a0, a1
1529 ; RV32I-NEXT: srai a0, a0, 16
1530 ; RV32I-NEXT: ret
1531 ;
1532 ; RV64I-LABEL: pr55484:
1533 ; RV64I: # %bb.0:
1534 ; RV64I-NEXT: slli a1, a0, 40
1535 ; RV64I-NEXT: slli a0, a0, 56
1536 ; RV64I-NEXT: or a0, a0, a1
1537 ; RV64I-NEXT: srai a0, a0, 48
1538 ; RV64I-NEXT: ret
1539 ;
1540 ; RV32ZBB-LABEL: pr55484:
1541 ; RV32ZBB: # %bb.0:
1542 ; RV32ZBB-NEXT: srli a1, a0, 8
1543 ; RV32ZBB-NEXT: slli a0, a0, 8
1544 ; RV32ZBB-NEXT: or a0, a1, a0
1545 ; RV32ZBB-NEXT: sext.h a0, a0
1546 ; RV32ZBB-NEXT: ret
1547 ;
1548 ; RV64ZBB-LABEL: pr55484:
1549 ; RV64ZBB: # %bb.0:
1550 ; RV64ZBB-NEXT: srli a1, a0, 8
1551 ; RV64ZBB-NEXT: slli a0, a0, 8
1552 ; RV64ZBB-NEXT: or a0, a1, a0
1553 ; RV64ZBB-NEXT: sext.h a0, a0
1554 ; RV64ZBB-NEXT: ret
1555 ;
1556 ; RV32ZBKB-LABEL: pr55484:
1557 ; RV32ZBKB: # %bb.0:
1558 ; RV32ZBKB-NEXT: slli a1, a0, 8
1559 ; RV32ZBKB-NEXT: slli a0, a0, 24
1560 ; RV32ZBKB-NEXT: or a0, a0, a1
1561 ; RV32ZBKB-NEXT: srai a0, a0, 16
1562 ; RV32ZBKB-NEXT: ret
1563 ;
1564 ; RV64ZBKB-LABEL: pr55484:
1565 ; RV64ZBKB: # %bb.0:
1566 ; RV64ZBKB-NEXT: slli a1, a0, 40
1567 ; RV64ZBKB-NEXT: slli a0, a0, 56
1568 ; RV64ZBKB-NEXT: or a0, a0, a1
1569 ; RV64ZBKB-NEXT: srai a0, a0, 48
1570 ; RV64ZBKB-NEXT: ret
1571 %2 = lshr i32 %0, 8
1572 %3 = shl i32 %0, 8
1573 %4 = or i32 %2, %3
1574 %5 = trunc i32 %4 to i16
1575 %6 = sext i16 %5 to i32
1576 ret i32 %6
1577 }