1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv64 < %s | FileCheck %s
3 ; RUN: llc -mtriple=riscv64 --relocation-model=pic < %s | FileCheck %s
5 define ptr @f2(ptr %x0, ptr %x1) {
8 ; CHECK-NEXT: addi sp, sp, -16
9 ; CHECK-NEXT: .cfi_def_cfa_offset 16
10 ; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
11 ; CHECK-NEXT: .cfi_offset ra, -8
12 ; CHECK-NEXT: mv t0, a1
13 ; CHECK-NEXT: call __hwasan_check_x10_2_short
14 ; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
15 ; CHECK-NEXT: addi sp, sp, 16
17 call void @llvm.hwasan.check.memaccess.shortgranules(ptr %x1, ptr %x0, i32 2)
21 declare void @llvm.hwasan.check.memaccess.shortgranules(ptr, ptr, i32)
23 ; CHECK: .section .text.hot,"axG",@progbits,__hwasan_check_x10_2_short,comdat
24 ; CHECK-NEXT: .type __hwasan_check_x10_2_short,@function
25 ; CHECK-NEXT: .weak __hwasan_check_x10_2_short
26 ; CHECK-NEXT: .hidden __hwasan_check_x10_2_short
27 ; CHECK-NEXT: __hwasan_check_x10_2_short:
28 ; CHECK-NEXT: slli t1, a0, 8
29 ; CHECK-NEXT: srli t1, t1, 12
30 ; CHECK-NEXT: add t1, t0, t1
31 ; CHECK-NEXT: lbu t1, 0(t1)
32 ; CHECK-NEXT: srli t2, a0, 56
33 ; CHECK-NEXT: bne t2, t1, .Ltmp0
37 ; CHECK-NEXT: li t3, 16
38 ; CHECK-NEXT: bgeu t1, t3, .Ltmp2
39 ; CHECK-NEXT: andi t3, a0, 15
40 ; CHECK-NEXT: addi t3, t3, 3
41 ; CHECK-NEXT: bge t3, t1, .Ltmp2
42 ; CHECK-NEXT: ori t1, a0, 15
43 ; CHECK-NEXT: lbu t1, 0(t1)
44 ; CHECK-NEXT: beq t1, t2, .Ltmp1
46 ; CHECK-NEXT: addi sp, sp, -256
47 ; CHECK-NEXT: sd a0, 80(sp)
48 ; CHECK-NEXT: sd a1, 88(sp)
49 ; CHECK-NEXT: sd s0, 64(sp)
50 ; CHECK-NEXT: sd ra, 8(sp)
51 ; CHECK-NEXT: li a1, 2
52 ; CHECK-NEXT: call __hwasan_tag_mismatch_v2