| blob | 0ef17ca964db567b8d32423dc351d3a42a2a5c09 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \
3 ; RUN: -riscv-experimental-rv64-legal-i32 | FileCheck %s -check-prefixes=RV64I,RV64-NOPOOL
4 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5 ; RUN: -riscv-experimental-rv64-legal-i32 | FileCheck %s -check-prefixes=RV64I,RV64I-POOL
6 ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zba \
7 ; RUN: -riscv-experimental-rv64-legal-i32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBA
8 ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbb \
9 ; RUN: -riscv-experimental-rv64-legal-i32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBB
10 ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbs \
11 ; RUN: -riscv-experimental-rv64-legal-i32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBS
12 ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+xtheadbb \
13 ; RUN: -riscv-experimental-rv64-legal-i32 -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IXTHEADBB
15 ; Materializing constants
17 ; TODO: It would be preferable if anyext constant returns were sign rather
18 ; than zero extended. See PR39092. For now, mark returns as explicitly signext
19 ; (this matches what Clang would generate for equivalent C/C++ anyway).
21 define signext i32 @zero() nounwind {
22 ; RV64I-LABEL: zero:
23 ; RV64I: # %bb.0:
24 ; RV64I-NEXT: li a0, 0
25 ; RV64I-NEXT: ret
26 ;
27 ; RV64IZBA-LABEL: zero:
28 ; RV64IZBA: # %bb.0:
29 ; RV64IZBA-NEXT: li a0, 0
30 ; RV64IZBA-NEXT: ret
31 ;
32 ; RV64IZBB-LABEL: zero:
33 ; RV64IZBB: # %bb.0:
34 ; RV64IZBB-NEXT: li a0, 0
35 ; RV64IZBB-NEXT: ret
36 ;
37 ; RV64IZBS-LABEL: zero:
38 ; RV64IZBS: # %bb.0:
39 ; RV64IZBS-NEXT: li a0, 0
40 ; RV64IZBS-NEXT: ret
41 ;
42 ; RV64IXTHEADBB-LABEL: zero:
43 ; RV64IXTHEADBB: # %bb.0:
44 ; RV64IXTHEADBB-NEXT: li a0, 0
45 ; RV64IXTHEADBB-NEXT: ret
46 ret i32 0
47 }
49 define signext i32 @pos_small() nounwind {
50 ; RV64I-LABEL: pos_small:
51 ; RV64I: # %bb.0:
52 ; RV64I-NEXT: li a0, 2047
53 ; RV64I-NEXT: ret
54 ;
55 ; RV64IZBA-LABEL: pos_small:
56 ; RV64IZBA: # %bb.0:
57 ; RV64IZBA-NEXT: li a0, 2047
58 ; RV64IZBA-NEXT: ret
59 ;
60 ; RV64IZBB-LABEL: pos_small:
61 ; RV64IZBB: # %bb.0:
62 ; RV64IZBB-NEXT: li a0, 2047
63 ; RV64IZBB-NEXT: ret
64 ;
65 ; RV64IZBS-LABEL: pos_small:
66 ; RV64IZBS: # %bb.0:
67 ; RV64IZBS-NEXT: li a0, 2047
68 ; RV64IZBS-NEXT: ret
69 ;
70 ; RV64IXTHEADBB-LABEL: pos_small:
71 ; RV64IXTHEADBB: # %bb.0:
72 ; RV64IXTHEADBB-NEXT: li a0, 2047
73 ; RV64IXTHEADBB-NEXT: ret
74 ret i32 2047
75 }
77 define signext i32 @neg_small() nounwind {
78 ; RV64I-LABEL: neg_small:
79 ; RV64I: # %bb.0:
80 ; RV64I-NEXT: li a0, -2048
81 ; RV64I-NEXT: ret
82 ;
83 ; RV64IZBA-LABEL: neg_small:
84 ; RV64IZBA: # %bb.0:
85 ; RV64IZBA-NEXT: li a0, -2048
86 ; RV64IZBA-NEXT: ret
87 ;
88 ; RV64IZBB-LABEL: neg_small:
89 ; RV64IZBB: # %bb.0:
90 ; RV64IZBB-NEXT: li a0, -2048
91 ; RV64IZBB-NEXT: ret
92 ;
93 ; RV64IZBS-LABEL: neg_small:
94 ; RV64IZBS: # %bb.0:
95 ; RV64IZBS-NEXT: li a0, -2048
96 ; RV64IZBS-NEXT: ret
97 ;
98 ; RV64IXTHEADBB-LABEL: neg_small:
99 ; RV64IXTHEADBB: # %bb.0:
100 ; RV64IXTHEADBB-NEXT: li a0, -2048
101 ; RV64IXTHEADBB-NEXT: ret
102 ret i32 -2048
103 }
105 define signext i32 @pos_i32() nounwind {
106 ; RV64I-LABEL: pos_i32:
107 ; RV64I: # %bb.0:
108 ; RV64I-NEXT: lui a0, 423811
109 ; RV64I-NEXT: addiw a0, a0, -1297
110 ; RV64I-NEXT: ret
111 ;
112 ; RV64IZBA-LABEL: pos_i32:
113 ; RV64IZBA: # %bb.0:
114 ; RV64IZBA-NEXT: lui a0, 423811
115 ; RV64IZBA-NEXT: addiw a0, a0, -1297
116 ; RV64IZBA-NEXT: ret
117 ;
118 ; RV64IZBB-LABEL: pos_i32:
119 ; RV64IZBB: # %bb.0:
120 ; RV64IZBB-NEXT: lui a0, 423811
121 ; RV64IZBB-NEXT: addiw a0, a0, -1297
122 ; RV64IZBB-NEXT: ret
123 ;
124 ; RV64IZBS-LABEL: pos_i32:
125 ; RV64IZBS: # %bb.0:
126 ; RV64IZBS-NEXT: lui a0, 423811
127 ; RV64IZBS-NEXT: addiw a0, a0, -1297
128 ; RV64IZBS-NEXT: ret
129 ;
130 ; RV64IXTHEADBB-LABEL: pos_i32:
131 ; RV64IXTHEADBB: # %bb.0:
132 ; RV64IXTHEADBB-NEXT: lui a0, 423811
133 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1297
134 ; RV64IXTHEADBB-NEXT: ret
135 ret i32 1735928559
136 }
138 define signext i32 @neg_i32() nounwind {
139 ; RV64I-LABEL: neg_i32:
140 ; RV64I: # %bb.0:
141 ; RV64I-NEXT: lui a0, 912092
142 ; RV64I-NEXT: addiw a0, a0, -273
143 ; RV64I-NEXT: ret
144 ;
145 ; RV64IZBA-LABEL: neg_i32:
146 ; RV64IZBA: # %bb.0:
147 ; RV64IZBA-NEXT: lui a0, 912092
148 ; RV64IZBA-NEXT: addiw a0, a0, -273
149 ; RV64IZBA-NEXT: ret
150 ;
151 ; RV64IZBB-LABEL: neg_i32:
152 ; RV64IZBB: # %bb.0:
153 ; RV64IZBB-NEXT: lui a0, 912092
154 ; RV64IZBB-NEXT: addiw a0, a0, -273
155 ; RV64IZBB-NEXT: ret
156 ;
157 ; RV64IZBS-LABEL: neg_i32:
158 ; RV64IZBS: # %bb.0:
159 ; RV64IZBS-NEXT: lui a0, 912092
160 ; RV64IZBS-NEXT: addiw a0, a0, -273
161 ; RV64IZBS-NEXT: ret
162 ;
163 ; RV64IXTHEADBB-LABEL: neg_i32:
164 ; RV64IXTHEADBB: # %bb.0:
165 ; RV64IXTHEADBB-NEXT: lui a0, 912092
166 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -273
167 ; RV64IXTHEADBB-NEXT: ret
168 ret i32 -559038737
169 }
171 define signext i32 @pos_i32_hi20_only() nounwind {
172 ; RV64I-LABEL: pos_i32_hi20_only:
173 ; RV64I: # %bb.0:
174 ; RV64I-NEXT: lui a0, 16
175 ; RV64I-NEXT: ret
176 ;
177 ; RV64IZBA-LABEL: pos_i32_hi20_only:
178 ; RV64IZBA: # %bb.0:
179 ; RV64IZBA-NEXT: lui a0, 16
180 ; RV64IZBA-NEXT: ret
181 ;
182 ; RV64IZBB-LABEL: pos_i32_hi20_only:
183 ; RV64IZBB: # %bb.0:
184 ; RV64IZBB-NEXT: lui a0, 16
185 ; RV64IZBB-NEXT: ret
186 ;
187 ; RV64IZBS-LABEL: pos_i32_hi20_only:
188 ; RV64IZBS: # %bb.0:
189 ; RV64IZBS-NEXT: lui a0, 16
190 ; RV64IZBS-NEXT: ret
191 ;
192 ; RV64IXTHEADBB-LABEL: pos_i32_hi20_only:
193 ; RV64IXTHEADBB: # %bb.0:
194 ; RV64IXTHEADBB-NEXT: lui a0, 16
195 ; RV64IXTHEADBB-NEXT: ret
196 ret i32 65536 ; 0x10000
197 }
199 define signext i32 @neg_i32_hi20_only() nounwind {
200 ; RV64I-LABEL: neg_i32_hi20_only:
201 ; RV64I: # %bb.0:
202 ; RV64I-NEXT: lui a0, 1048560
203 ; RV64I-NEXT: ret
204 ;
205 ; RV64IZBA-LABEL: neg_i32_hi20_only:
206 ; RV64IZBA: # %bb.0:
207 ; RV64IZBA-NEXT: lui a0, 1048560
208 ; RV64IZBA-NEXT: ret
209 ;
210 ; RV64IZBB-LABEL: neg_i32_hi20_only:
211 ; RV64IZBB: # %bb.0:
212 ; RV64IZBB-NEXT: lui a0, 1048560
213 ; RV64IZBB-NEXT: ret
214 ;
215 ; RV64IZBS-LABEL: neg_i32_hi20_only:
216 ; RV64IZBS: # %bb.0:
217 ; RV64IZBS-NEXT: lui a0, 1048560
218 ; RV64IZBS-NEXT: ret
219 ;
220 ; RV64IXTHEADBB-LABEL: neg_i32_hi20_only:
221 ; RV64IXTHEADBB: # %bb.0:
222 ; RV64IXTHEADBB-NEXT: lui a0, 1048560
223 ; RV64IXTHEADBB-NEXT: ret
224 ret i32 -65536 ; -0x10000
225 }
227 ; This can be materialized with ADDI+SLLI, improving compressibility.
229 define signext i32 @imm_left_shifted_addi() nounwind {
230 ; RV64I-LABEL: imm_left_shifted_addi:
231 ; RV64I: # %bb.0:
232 ; RV64I-NEXT: lui a0, 32
233 ; RV64I-NEXT: addiw a0, a0, -64
234 ; RV64I-NEXT: ret
235 ;
236 ; RV64IZBA-LABEL: imm_left_shifted_addi:
237 ; RV64IZBA: # %bb.0:
238 ; RV64IZBA-NEXT: lui a0, 32
239 ; RV64IZBA-NEXT: addiw a0, a0, -64
240 ; RV64IZBA-NEXT: ret
241 ;
242 ; RV64IZBB-LABEL: imm_left_shifted_addi:
243 ; RV64IZBB: # %bb.0:
244 ; RV64IZBB-NEXT: lui a0, 32
245 ; RV64IZBB-NEXT: addiw a0, a0, -64
246 ; RV64IZBB-NEXT: ret
247 ;
248 ; RV64IZBS-LABEL: imm_left_shifted_addi:
249 ; RV64IZBS: # %bb.0:
250 ; RV64IZBS-NEXT: lui a0, 32
251 ; RV64IZBS-NEXT: addiw a0, a0, -64
252 ; RV64IZBS-NEXT: ret
253 ;
254 ; RV64IXTHEADBB-LABEL: imm_left_shifted_addi:
255 ; RV64IXTHEADBB: # %bb.0:
256 ; RV64IXTHEADBB-NEXT: lui a0, 32
257 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -64
258 ; RV64IXTHEADBB-NEXT: ret
259 ret i32 131008 ; 0x1FFC0
260 }
262 ; This can be materialized with ADDI+SRLI, improving compressibility.
264 define signext i32 @imm_right_shifted_addi() nounwind {
265 ; RV64I-LABEL: imm_right_shifted_addi:
266 ; RV64I: # %bb.0:
267 ; RV64I-NEXT: lui a0, 524288
268 ; RV64I-NEXT: addiw a0, a0, -1
269 ; RV64I-NEXT: ret
270 ;
271 ; RV64IZBA-LABEL: imm_right_shifted_addi:
272 ; RV64IZBA: # %bb.0:
273 ; RV64IZBA-NEXT: lui a0, 524288
274 ; RV64IZBA-NEXT: addiw a0, a0, -1
275 ; RV64IZBA-NEXT: ret
276 ;
277 ; RV64IZBB-LABEL: imm_right_shifted_addi:
278 ; RV64IZBB: # %bb.0:
279 ; RV64IZBB-NEXT: lui a0, 524288
280 ; RV64IZBB-NEXT: addiw a0, a0, -1
281 ; RV64IZBB-NEXT: ret
282 ;
283 ; RV64IZBS-LABEL: imm_right_shifted_addi:
284 ; RV64IZBS: # %bb.0:
285 ; RV64IZBS-NEXT: lui a0, 524288
286 ; RV64IZBS-NEXT: addiw a0, a0, -1
287 ; RV64IZBS-NEXT: ret
288 ;
289 ; RV64IXTHEADBB-LABEL: imm_right_shifted_addi:
290 ; RV64IXTHEADBB: # %bb.0:
291 ; RV64IXTHEADBB-NEXT: lui a0, 524288
292 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1
293 ; RV64IXTHEADBB-NEXT: ret
294 ret i32 2147483647 ; 0x7FFFFFFF
295 }
297 ; This can be materialized with LUI+SRLI, improving compressibility.
299 define signext i32 @imm_right_shifted_lui() nounwind {
300 ; RV64I-LABEL: imm_right_shifted_lui:
301 ; RV64I: # %bb.0:
302 ; RV64I-NEXT: lui a0, 56
303 ; RV64I-NEXT: addiw a0, a0, 580
304 ; RV64I-NEXT: ret
305 ;
306 ; RV64IZBA-LABEL: imm_right_shifted_lui:
307 ; RV64IZBA: # %bb.0:
308 ; RV64IZBA-NEXT: lui a0, 56
309 ; RV64IZBA-NEXT: addiw a0, a0, 580
310 ; RV64IZBA-NEXT: ret
311 ;
312 ; RV64IZBB-LABEL: imm_right_shifted_lui:
313 ; RV64IZBB: # %bb.0:
314 ; RV64IZBB-NEXT: lui a0, 56
315 ; RV64IZBB-NEXT: addiw a0, a0, 580
316 ; RV64IZBB-NEXT: ret
317 ;
318 ; RV64IZBS-LABEL: imm_right_shifted_lui:
319 ; RV64IZBS: # %bb.0:
320 ; RV64IZBS-NEXT: lui a0, 56
321 ; RV64IZBS-NEXT: addiw a0, a0, 580
322 ; RV64IZBS-NEXT: ret
323 ;
324 ; RV64IXTHEADBB-LABEL: imm_right_shifted_lui:
325 ; RV64IXTHEADBB: # %bb.0:
326 ; RV64IXTHEADBB-NEXT: lui a0, 56
327 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 580
328 ; RV64IXTHEADBB-NEXT: ret
329 ret i32 229956 ; 0x38244
330 }
332 define i64 @imm64_1() nounwind {
333 ; RV64I-LABEL: imm64_1:
334 ; RV64I: # %bb.0:
335 ; RV64I-NEXT: li a0, 1
336 ; RV64I-NEXT: slli a0, a0, 31
337 ; RV64I-NEXT: ret
338 ;
339 ; RV64IZBA-LABEL: imm64_1:
340 ; RV64IZBA: # %bb.0:
341 ; RV64IZBA-NEXT: li a0, 1
342 ; RV64IZBA-NEXT: slli a0, a0, 31
343 ; RV64IZBA-NEXT: ret
344 ;
345 ; RV64IZBB-LABEL: imm64_1:
346 ; RV64IZBB: # %bb.0:
347 ; RV64IZBB-NEXT: li a0, 1
348 ; RV64IZBB-NEXT: slli a0, a0, 31
349 ; RV64IZBB-NEXT: ret
350 ;
351 ; RV64IZBS-LABEL: imm64_1:
352 ; RV64IZBS: # %bb.0:
353 ; RV64IZBS-NEXT: bseti a0, zero, 31
354 ; RV64IZBS-NEXT: ret
355 ;
356 ; RV64IXTHEADBB-LABEL: imm64_1:
357 ; RV64IXTHEADBB: # %bb.0:
358 ; RV64IXTHEADBB-NEXT: li a0, 1
359 ; RV64IXTHEADBB-NEXT: slli a0, a0, 31
360 ; RV64IXTHEADBB-NEXT: ret
361 ret i64 2147483648 ; 0x8000_0000
362 }
364 define i64 @imm64_2() nounwind {
365 ; RV64I-LABEL: imm64_2:
366 ; RV64I: # %bb.0:
367 ; RV64I-NEXT: li a0, -1
368 ; RV64I-NEXT: srli a0, a0, 32
369 ; RV64I-NEXT: ret
370 ;
371 ; RV64IZBA-LABEL: imm64_2:
372 ; RV64IZBA: # %bb.0:
373 ; RV64IZBA-NEXT: li a0, -1
374 ; RV64IZBA-NEXT: srli a0, a0, 32
375 ; RV64IZBA-NEXT: ret
376 ;
377 ; RV64IZBB-LABEL: imm64_2:
378 ; RV64IZBB: # %bb.0:
379 ; RV64IZBB-NEXT: li a0, -1
380 ; RV64IZBB-NEXT: srli a0, a0, 32
381 ; RV64IZBB-NEXT: ret
382 ;
383 ; RV64IZBS-LABEL: imm64_2:
384 ; RV64IZBS: # %bb.0:
385 ; RV64IZBS-NEXT: li a0, -1
386 ; RV64IZBS-NEXT: srli a0, a0, 32
387 ; RV64IZBS-NEXT: ret
388 ;
389 ; RV64IXTHEADBB-LABEL: imm64_2:
390 ; RV64IXTHEADBB: # %bb.0:
391 ; RV64IXTHEADBB-NEXT: li a0, -1
392 ; RV64IXTHEADBB-NEXT: srli a0, a0, 32
393 ; RV64IXTHEADBB-NEXT: ret
394 ret i64 4294967295 ; 0xFFFF_FFFF
395 }
397 define i64 @imm64_3() nounwind {
398 ; RV64I-LABEL: imm64_3:
399 ; RV64I: # %bb.0:
400 ; RV64I-NEXT: li a0, 1
401 ; RV64I-NEXT: slli a0, a0, 32
402 ; RV64I-NEXT: ret
403 ;
404 ; RV64IZBA-LABEL: imm64_3:
405 ; RV64IZBA: # %bb.0:
406 ; RV64IZBA-NEXT: li a0, 1
407 ; RV64IZBA-NEXT: slli a0, a0, 32
408 ; RV64IZBA-NEXT: ret
409 ;
410 ; RV64IZBB-LABEL: imm64_3:
411 ; RV64IZBB: # %bb.0:
412 ; RV64IZBB-NEXT: li a0, 1
413 ; RV64IZBB-NEXT: slli a0, a0, 32
414 ; RV64IZBB-NEXT: ret
415 ;
416 ; RV64IZBS-LABEL: imm64_3:
417 ; RV64IZBS: # %bb.0:
418 ; RV64IZBS-NEXT: bseti a0, zero, 32
419 ; RV64IZBS-NEXT: ret
420 ;
421 ; RV64IXTHEADBB-LABEL: imm64_3:
422 ; RV64IXTHEADBB: # %bb.0:
423 ; RV64IXTHEADBB-NEXT: li a0, 1
424 ; RV64IXTHEADBB-NEXT: slli a0, a0, 32
425 ; RV64IXTHEADBB-NEXT: ret
426 ret i64 4294967296 ; 0x1_0000_0000
427 }
429 define i64 @imm64_4() nounwind {
430 ; RV64I-LABEL: imm64_4:
431 ; RV64I: # %bb.0:
432 ; RV64I-NEXT: li a0, -1
433 ; RV64I-NEXT: slli a0, a0, 63
434 ; RV64I-NEXT: ret
435 ;
436 ; RV64IZBA-LABEL: imm64_4:
437 ; RV64IZBA: # %bb.0:
438 ; RV64IZBA-NEXT: li a0, -1
439 ; RV64IZBA-NEXT: slli a0, a0, 63
440 ; RV64IZBA-NEXT: ret
441 ;
442 ; RV64IZBB-LABEL: imm64_4:
443 ; RV64IZBB: # %bb.0:
444 ; RV64IZBB-NEXT: li a0, -1
445 ; RV64IZBB-NEXT: slli a0, a0, 63
446 ; RV64IZBB-NEXT: ret
447 ;
448 ; RV64IZBS-LABEL: imm64_4:
449 ; RV64IZBS: # %bb.0:
450 ; RV64IZBS-NEXT: bseti a0, zero, 63
451 ; RV64IZBS-NEXT: ret
452 ;
453 ; RV64IXTHEADBB-LABEL: imm64_4:
454 ; RV64IXTHEADBB: # %bb.0:
455 ; RV64IXTHEADBB-NEXT: li a0, -1
456 ; RV64IXTHEADBB-NEXT: slli a0, a0, 63
457 ; RV64IXTHEADBB-NEXT: ret
458 ret i64 9223372036854775808 ; 0x8000_0000_0000_0000
459 }
461 define i64 @imm64_5() nounwind {
462 ; RV64I-LABEL: imm64_5:
463 ; RV64I: # %bb.0:
464 ; RV64I-NEXT: li a0, -1
465 ; RV64I-NEXT: slli a0, a0, 63
466 ; RV64I-NEXT: ret
467 ;
468 ; RV64IZBA-LABEL: imm64_5:
469 ; RV64IZBA: # %bb.0:
470 ; RV64IZBA-NEXT: li a0, -1
471 ; RV64IZBA-NEXT: slli a0, a0, 63
472 ; RV64IZBA-NEXT: ret
473 ;
474 ; RV64IZBB-LABEL: imm64_5:
475 ; RV64IZBB: # %bb.0:
476 ; RV64IZBB-NEXT: li a0, -1
477 ; RV64IZBB-NEXT: slli a0, a0, 63
478 ; RV64IZBB-NEXT: ret
479 ;
480 ; RV64IZBS-LABEL: imm64_5:
481 ; RV64IZBS: # %bb.0:
482 ; RV64IZBS-NEXT: bseti a0, zero, 63
483 ; RV64IZBS-NEXT: ret
484 ;
485 ; RV64IXTHEADBB-LABEL: imm64_5:
486 ; RV64IXTHEADBB: # %bb.0:
487 ; RV64IXTHEADBB-NEXT: li a0, -1
488 ; RV64IXTHEADBB-NEXT: slli a0, a0, 63
489 ; RV64IXTHEADBB-NEXT: ret
490 ret i64 -9223372036854775808 ; 0x8000_0000_0000_0000
491 }
493 define i64 @imm64_6() nounwind {
494 ; RV64I-LABEL: imm64_6:
495 ; RV64I: # %bb.0:
496 ; RV64I-NEXT: lui a0, 9321
497 ; RV64I-NEXT: addi a0, a0, -1329
498 ; RV64I-NEXT: slli a0, a0, 35
499 ; RV64I-NEXT: ret
500 ;
501 ; RV64IZBA-LABEL: imm64_6:
502 ; RV64IZBA: # %bb.0:
503 ; RV64IZBA-NEXT: lui a0, 9321
504 ; RV64IZBA-NEXT: addi a0, a0, -1329
505 ; RV64IZBA-NEXT: slli a0, a0, 35
506 ; RV64IZBA-NEXT: ret
507 ;
508 ; RV64IZBB-LABEL: imm64_6:
509 ; RV64IZBB: # %bb.0:
510 ; RV64IZBB-NEXT: lui a0, 9321
511 ; RV64IZBB-NEXT: addi a0, a0, -1329
512 ; RV64IZBB-NEXT: slli a0, a0, 35
513 ; RV64IZBB-NEXT: ret
514 ;
515 ; RV64IZBS-LABEL: imm64_6:
516 ; RV64IZBS: # %bb.0:
517 ; RV64IZBS-NEXT: lui a0, 9321
518 ; RV64IZBS-NEXT: addi a0, a0, -1329
519 ; RV64IZBS-NEXT: slli a0, a0, 35
520 ; RV64IZBS-NEXT: ret
521 ;
522 ; RV64IXTHEADBB-LABEL: imm64_6:
523 ; RV64IXTHEADBB: # %bb.0:
524 ; RV64IXTHEADBB-NEXT: lui a0, 9321
525 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1329
526 ; RV64IXTHEADBB-NEXT: slli a0, a0, 35
527 ; RV64IXTHEADBB-NEXT: ret
528 ret i64 1311768464867721216 ; 0x1234_5678_0000_0000
529 }
531 define i64 @imm64_7() nounwind {
532 ; RV64I-LABEL: imm64_7:
533 ; RV64I: # %bb.0:
534 ; RV64I-NEXT: li a0, 7
535 ; RV64I-NEXT: slli a0, a0, 36
536 ; RV64I-NEXT: addi a0, a0, 11
537 ; RV64I-NEXT: slli a0, a0, 24
538 ; RV64I-NEXT: addi a0, a0, 15
539 ; RV64I-NEXT: ret
540 ;
541 ; RV64IZBA-LABEL: imm64_7:
542 ; RV64IZBA: # %bb.0:
543 ; RV64IZBA-NEXT: li a0, 7
544 ; RV64IZBA-NEXT: slli a0, a0, 36
545 ; RV64IZBA-NEXT: addi a0, a0, 11
546 ; RV64IZBA-NEXT: slli a0, a0, 24
547 ; RV64IZBA-NEXT: addi a0, a0, 15
548 ; RV64IZBA-NEXT: ret
549 ;
550 ; RV64IZBB-LABEL: imm64_7:
551 ; RV64IZBB: # %bb.0:
552 ; RV64IZBB-NEXT: li a0, 7
553 ; RV64IZBB-NEXT: slli a0, a0, 36
554 ; RV64IZBB-NEXT: addi a0, a0, 11
555 ; RV64IZBB-NEXT: slli a0, a0, 24
556 ; RV64IZBB-NEXT: addi a0, a0, 15
557 ; RV64IZBB-NEXT: ret
558 ;
559 ; RV64IZBS-LABEL: imm64_7:
560 ; RV64IZBS: # %bb.0:
561 ; RV64IZBS-NEXT: li a0, 7
562 ; RV64IZBS-NEXT: slli a0, a0, 36
563 ; RV64IZBS-NEXT: addi a0, a0, 11
564 ; RV64IZBS-NEXT: slli a0, a0, 24
565 ; RV64IZBS-NEXT: addi a0, a0, 15
566 ; RV64IZBS-NEXT: ret
567 ;
568 ; RV64IXTHEADBB-LABEL: imm64_7:
569 ; RV64IXTHEADBB: # %bb.0:
570 ; RV64IXTHEADBB-NEXT: li a0, 7
571 ; RV64IXTHEADBB-NEXT: slli a0, a0, 36
572 ; RV64IXTHEADBB-NEXT: addi a0, a0, 11
573 ; RV64IXTHEADBB-NEXT: slli a0, a0, 24
574 ; RV64IXTHEADBB-NEXT: addi a0, a0, 15
575 ; RV64IXTHEADBB-NEXT: ret
576 ret i64 8070450532432478223 ; 0x7000_0000_0B00_000F
577 }
579 ; TODO: it can be preferable to put constants that are expensive to materialise
580 ; into the constant pool, especially for -Os.
581 define i64 @imm64_8() nounwind {
582 ; RV64-NOPOOL-LABEL: imm64_8:
583 ; RV64-NOPOOL: # %bb.0:
584 ; RV64-NOPOOL-NEXT: lui a0, 583
585 ; RV64-NOPOOL-NEXT: addiw a0, a0, -1875
586 ; RV64-NOPOOL-NEXT: slli a0, a0, 14
587 ; RV64-NOPOOL-NEXT: addi a0, a0, -947
588 ; RV64-NOPOOL-NEXT: slli a0, a0, 12
589 ; RV64-NOPOOL-NEXT: addi a0, a0, 1511
590 ; RV64-NOPOOL-NEXT: slli a0, a0, 13
591 ; RV64-NOPOOL-NEXT: addi a0, a0, -272
592 ; RV64-NOPOOL-NEXT: ret
593 ;
594 ; RV64I-POOL-LABEL: imm64_8:
595 ; RV64I-POOL: # %bb.0:
596 ; RV64I-POOL-NEXT: lui a0, %hi(.LCPI17_0)
597 ; RV64I-POOL-NEXT: ld a0, %lo(.LCPI17_0)(a0)
598 ; RV64I-POOL-NEXT: ret
599 ;
600 ; RV64IZBA-LABEL: imm64_8:
601 ; RV64IZBA: # %bb.0:
602 ; RV64IZBA-NEXT: lui a0, 596523
603 ; RV64IZBA-NEXT: addi a0, a0, 965
604 ; RV64IZBA-NEXT: slli.uw a0, a0, 13
605 ; RV64IZBA-NEXT: addi a0, a0, -1347
606 ; RV64IZBA-NEXT: slli a0, a0, 12
607 ; RV64IZBA-NEXT: addi a0, a0, -529
608 ; RV64IZBA-NEXT: slli a0, a0, 4
609 ; RV64IZBA-NEXT: ret
610 ;
611 ; RV64IZBB-LABEL: imm64_8:
612 ; RV64IZBB: # %bb.0:
613 ; RV64IZBB-NEXT: lui a0, 583
614 ; RV64IZBB-NEXT: addiw a0, a0, -1875
615 ; RV64IZBB-NEXT: slli a0, a0, 14
616 ; RV64IZBB-NEXT: addi a0, a0, -947
617 ; RV64IZBB-NEXT: slli a0, a0, 12
618 ; RV64IZBB-NEXT: addi a0, a0, 1511
619 ; RV64IZBB-NEXT: slli a0, a0, 13
620 ; RV64IZBB-NEXT: addi a0, a0, -272
621 ; RV64IZBB-NEXT: ret
622 ;
623 ; RV64IZBS-LABEL: imm64_8:
624 ; RV64IZBS: # %bb.0:
625 ; RV64IZBS-NEXT: lui a0, 583
626 ; RV64IZBS-NEXT: addiw a0, a0, -1875
627 ; RV64IZBS-NEXT: slli a0, a0, 14
628 ; RV64IZBS-NEXT: addi a0, a0, -947
629 ; RV64IZBS-NEXT: slli a0, a0, 12
630 ; RV64IZBS-NEXT: addi a0, a0, 1511
631 ; RV64IZBS-NEXT: slli a0, a0, 13
632 ; RV64IZBS-NEXT: addi a0, a0, -272
633 ; RV64IZBS-NEXT: ret
634 ;
635 ; RV64IXTHEADBB-LABEL: imm64_8:
636 ; RV64IXTHEADBB: # %bb.0:
637 ; RV64IXTHEADBB-NEXT: lui a0, 583
638 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1875
639 ; RV64IXTHEADBB-NEXT: slli a0, a0, 14
640 ; RV64IXTHEADBB-NEXT: addi a0, a0, -947
641 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
642 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1511
643 ; RV64IXTHEADBB-NEXT: slli a0, a0, 13
644 ; RV64IXTHEADBB-NEXT: addi a0, a0, -272
645 ; RV64IXTHEADBB-NEXT: ret
646 ret i64 1311768467463790320 ; 0x1234_5678_9ABC_DEF0
647 }
649 define i64 @imm64_9() nounwind {
650 ; RV64I-LABEL: imm64_9:
651 ; RV64I: # %bb.0:
652 ; RV64I-NEXT: li a0, -1
653 ; RV64I-NEXT: ret
654 ;
655 ; RV64IZBA-LABEL: imm64_9:
656 ; RV64IZBA: # %bb.0:
657 ; RV64IZBA-NEXT: li a0, -1
658 ; RV64IZBA-NEXT: ret
659 ;
660 ; RV64IZBB-LABEL: imm64_9:
661 ; RV64IZBB: # %bb.0:
662 ; RV64IZBB-NEXT: li a0, -1
663 ; RV64IZBB-NEXT: ret
664 ;
665 ; RV64IZBS-LABEL: imm64_9:
666 ; RV64IZBS: # %bb.0:
667 ; RV64IZBS-NEXT: li a0, -1
668 ; RV64IZBS-NEXT: ret
669 ;
670 ; RV64IXTHEADBB-LABEL: imm64_9:
671 ; RV64IXTHEADBB: # %bb.0:
672 ; RV64IXTHEADBB-NEXT: li a0, -1
673 ; RV64IXTHEADBB-NEXT: ret
674 ret i64 -1
675 }
677 ; Various cases where extraneous ADDIs can be inserted where a (left shifted)
678 ; LUI suffices.
680 define i64 @imm_left_shifted_lui_1() nounwind {
681 ; RV64I-LABEL: imm_left_shifted_lui_1:
682 ; RV64I: # %bb.0:
683 ; RV64I-NEXT: lui a0, 262145
684 ; RV64I-NEXT: slli a0, a0, 1
685 ; RV64I-NEXT: ret
686 ;
687 ; RV64IZBA-LABEL: imm_left_shifted_lui_1:
688 ; RV64IZBA: # %bb.0:
689 ; RV64IZBA-NEXT: lui a0, 262145
690 ; RV64IZBA-NEXT: slli a0, a0, 1
691 ; RV64IZBA-NEXT: ret
692 ;
693 ; RV64IZBB-LABEL: imm_left_shifted_lui_1:
694 ; RV64IZBB: # %bb.0:
695 ; RV64IZBB-NEXT: lui a0, 262145
696 ; RV64IZBB-NEXT: slli a0, a0, 1
697 ; RV64IZBB-NEXT: ret
698 ;
699 ; RV64IZBS-LABEL: imm_left_shifted_lui_1:
700 ; RV64IZBS: # %bb.0:
701 ; RV64IZBS-NEXT: lui a0, 262145
702 ; RV64IZBS-NEXT: slli a0, a0, 1
703 ; RV64IZBS-NEXT: ret
704 ;
705 ; RV64IXTHEADBB-LABEL: imm_left_shifted_lui_1:
706 ; RV64IXTHEADBB: # %bb.0:
707 ; RV64IXTHEADBB-NEXT: lui a0, 262145
708 ; RV64IXTHEADBB-NEXT: slli a0, a0, 1
709 ; RV64IXTHEADBB-NEXT: ret
710 ret i64 2147491840 ; 0x8000_2000
711 }
713 define i64 @imm_left_shifted_lui_2() nounwind {
714 ; RV64I-LABEL: imm_left_shifted_lui_2:
715 ; RV64I: # %bb.0:
716 ; RV64I-NEXT: lui a0, 262145
717 ; RV64I-NEXT: slli a0, a0, 2
718 ; RV64I-NEXT: ret
719 ;
720 ; RV64IZBA-LABEL: imm_left_shifted_lui_2:
721 ; RV64IZBA: # %bb.0:
722 ; RV64IZBA-NEXT: lui a0, 262145
723 ; RV64IZBA-NEXT: slli a0, a0, 2
724 ; RV64IZBA-NEXT: ret
725 ;
726 ; RV64IZBB-LABEL: imm_left_shifted_lui_2:
727 ; RV64IZBB: # %bb.0:
728 ; RV64IZBB-NEXT: lui a0, 262145
729 ; RV64IZBB-NEXT: slli a0, a0, 2
730 ; RV64IZBB-NEXT: ret
731 ;
732 ; RV64IZBS-LABEL: imm_left_shifted_lui_2:
733 ; RV64IZBS: # %bb.0:
734 ; RV64IZBS-NEXT: lui a0, 262145
735 ; RV64IZBS-NEXT: slli a0, a0, 2
736 ; RV64IZBS-NEXT: ret
737 ;
738 ; RV64IXTHEADBB-LABEL: imm_left_shifted_lui_2:
739 ; RV64IXTHEADBB: # %bb.0:
740 ; RV64IXTHEADBB-NEXT: lui a0, 262145
741 ; RV64IXTHEADBB-NEXT: slli a0, a0, 2
742 ; RV64IXTHEADBB-NEXT: ret
743 ret i64 4294983680 ; 0x1_0000_4000
744 }
746 define i64 @imm_left_shifted_lui_3() nounwind {
747 ; RV64I-LABEL: imm_left_shifted_lui_3:
748 ; RV64I: # %bb.0:
749 ; RV64I-NEXT: lui a0, 4097
750 ; RV64I-NEXT: slli a0, a0, 20
751 ; RV64I-NEXT: ret
752 ;
753 ; RV64IZBA-LABEL: imm_left_shifted_lui_3:
754 ; RV64IZBA: # %bb.0:
755 ; RV64IZBA-NEXT: lui a0, 4097
756 ; RV64IZBA-NEXT: slli a0, a0, 20
757 ; RV64IZBA-NEXT: ret
758 ;
759 ; RV64IZBB-LABEL: imm_left_shifted_lui_3:
760 ; RV64IZBB: # %bb.0:
761 ; RV64IZBB-NEXT: lui a0, 4097
762 ; RV64IZBB-NEXT: slli a0, a0, 20
763 ; RV64IZBB-NEXT: ret
764 ;
765 ; RV64IZBS-LABEL: imm_left_shifted_lui_3:
766 ; RV64IZBS: # %bb.0:
767 ; RV64IZBS-NEXT: lui a0, 4097
768 ; RV64IZBS-NEXT: slli a0, a0, 20
769 ; RV64IZBS-NEXT: ret
770 ;
771 ; RV64IXTHEADBB-LABEL: imm_left_shifted_lui_3:
772 ; RV64IXTHEADBB: # %bb.0:
773 ; RV64IXTHEADBB-NEXT: lui a0, 4097
774 ; RV64IXTHEADBB-NEXT: slli a0, a0, 20
775 ; RV64IXTHEADBB-NEXT: ret
776 ret i64 17596481011712 ; 0x1001_0000_0000
777 }
779 ; Various cases where extraneous ADDIs can be inserted where a (right shifted)
780 ; LUI suffices, or where multiple ADDIs can be used instead of a single LUI.
782 define i64 @imm_right_shifted_lui_1() nounwind {
783 ; RV64I-LABEL: imm_right_shifted_lui_1:
784 ; RV64I: # %bb.0:
785 ; RV64I-NEXT: lui a0, 983056
786 ; RV64I-NEXT: srli a0, a0, 16
787 ; RV64I-NEXT: ret
788 ;
789 ; RV64IZBA-LABEL: imm_right_shifted_lui_1:
790 ; RV64IZBA: # %bb.0:
791 ; RV64IZBA-NEXT: lui a0, 983056
792 ; RV64IZBA-NEXT: srli a0, a0, 16
793 ; RV64IZBA-NEXT: ret
794 ;
795 ; RV64IZBB-LABEL: imm_right_shifted_lui_1:
796 ; RV64IZBB: # %bb.0:
797 ; RV64IZBB-NEXT: lui a0, 983056
798 ; RV64IZBB-NEXT: srli a0, a0, 16
799 ; RV64IZBB-NEXT: ret
800 ;
801 ; RV64IZBS-LABEL: imm_right_shifted_lui_1:
802 ; RV64IZBS: # %bb.0:
803 ; RV64IZBS-NEXT: lui a0, 983056
804 ; RV64IZBS-NEXT: srli a0, a0, 16
805 ; RV64IZBS-NEXT: ret
806 ;
807 ; RV64IXTHEADBB-LABEL: imm_right_shifted_lui_1:
808 ; RV64IXTHEADBB: # %bb.0:
809 ; RV64IXTHEADBB-NEXT: lui a0, 983056
810 ; RV64IXTHEADBB-NEXT: srli a0, a0, 16
811 ; RV64IXTHEADBB-NEXT: ret
812 ret i64 281474976706561 ; 0xFFFF_FFFF_F001
813 }
815 define i64 @imm_right_shifted_lui_2() nounwind {
816 ; RV64I-LABEL: imm_right_shifted_lui_2:
817 ; RV64I: # %bb.0:
818 ; RV64I-NEXT: lui a0, 1044481
819 ; RV64I-NEXT: slli a0, a0, 12
820 ; RV64I-NEXT: srli a0, a0, 24
821 ; RV64I-NEXT: ret
822 ;
823 ; RV64IZBA-LABEL: imm_right_shifted_lui_2:
824 ; RV64IZBA: # %bb.0:
825 ; RV64IZBA-NEXT: lui a0, 1044481
826 ; RV64IZBA-NEXT: slli a0, a0, 12
827 ; RV64IZBA-NEXT: srli a0, a0, 24
828 ; RV64IZBA-NEXT: ret
829 ;
830 ; RV64IZBB-LABEL: imm_right_shifted_lui_2:
831 ; RV64IZBB: # %bb.0:
832 ; RV64IZBB-NEXT: lui a0, 1044481
833 ; RV64IZBB-NEXT: slli a0, a0, 12
834 ; RV64IZBB-NEXT: srli a0, a0, 24
835 ; RV64IZBB-NEXT: ret
836 ;
837 ; RV64IZBS-LABEL: imm_right_shifted_lui_2:
838 ; RV64IZBS: # %bb.0:
839 ; RV64IZBS-NEXT: lui a0, 1044481
840 ; RV64IZBS-NEXT: slli a0, a0, 12
841 ; RV64IZBS-NEXT: srli a0, a0, 24
842 ; RV64IZBS-NEXT: ret
843 ;
844 ; RV64IXTHEADBB-LABEL: imm_right_shifted_lui_2:
845 ; RV64IXTHEADBB: # %bb.0:
846 ; RV64IXTHEADBB-NEXT: lui a0, 1044481
847 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
848 ; RV64IXTHEADBB-NEXT: srli a0, a0, 24
849 ; RV64IXTHEADBB-NEXT: ret
850 ret i64 1099511623681 ; 0xFF_FFFF_F001
851 }
853 ; We can materialize the upper bits with a single (shifted) LUI, but that option
854 ; can be missed due to the lower bits, which aren't just 1s or just 0s.
856 define i64 @imm_decoupled_lui_addi() nounwind {
857 ; RV64I-LABEL: imm_decoupled_lui_addi:
858 ; RV64I: # %bb.0:
859 ; RV64I-NEXT: lui a0, 4097
860 ; RV64I-NEXT: slli a0, a0, 20
861 ; RV64I-NEXT: addi a0, a0, -3
862 ; RV64I-NEXT: ret
863 ;
864 ; RV64IZBA-LABEL: imm_decoupled_lui_addi:
865 ; RV64IZBA: # %bb.0:
866 ; RV64IZBA-NEXT: lui a0, 4097
867 ; RV64IZBA-NEXT: slli a0, a0, 20
868 ; RV64IZBA-NEXT: addi a0, a0, -3
869 ; RV64IZBA-NEXT: ret
870 ;
871 ; RV64IZBB-LABEL: imm_decoupled_lui_addi:
872 ; RV64IZBB: # %bb.0:
873 ; RV64IZBB-NEXT: lui a0, 4097
874 ; RV64IZBB-NEXT: slli a0, a0, 20
875 ; RV64IZBB-NEXT: addi a0, a0, -3
876 ; RV64IZBB-NEXT: ret
877 ;
878 ; RV64IZBS-LABEL: imm_decoupled_lui_addi:
879 ; RV64IZBS: # %bb.0:
880 ; RV64IZBS-NEXT: lui a0, 4097
881 ; RV64IZBS-NEXT: slli a0, a0, 20
882 ; RV64IZBS-NEXT: addi a0, a0, -3
883 ; RV64IZBS-NEXT: ret
884 ;
885 ; RV64IXTHEADBB-LABEL: imm_decoupled_lui_addi:
886 ; RV64IXTHEADBB: # %bb.0:
887 ; RV64IXTHEADBB-NEXT: lui a0, 4097
888 ; RV64IXTHEADBB-NEXT: slli a0, a0, 20
889 ; RV64IXTHEADBB-NEXT: addi a0, a0, -3
890 ; RV64IXTHEADBB-NEXT: ret
891 ret i64 17596481011709 ; 0x1000_FFFF_FFFD
892 }
894 ; This constant can be materialized for RV64 with LUI+SRLI+XORI.
896 define i64 @imm_end_xori_1() nounwind {
897 ; RV64I-LABEL: imm_end_xori_1:
898 ; RV64I: # %bb.0:
899 ; RV64I-NEXT: lui a0, 983040
900 ; RV64I-NEXT: srli a0, a0, 3
901 ; RV64I-NEXT: not a0, a0
902 ; RV64I-NEXT: ret
903 ;
904 ; RV64IZBA-LABEL: imm_end_xori_1:
905 ; RV64IZBA: # %bb.0:
906 ; RV64IZBA-NEXT: lui a0, 983040
907 ; RV64IZBA-NEXT: srli a0, a0, 3
908 ; RV64IZBA-NEXT: not a0, a0
909 ; RV64IZBA-NEXT: ret
910 ;
911 ; RV64IZBB-LABEL: imm_end_xori_1:
912 ; RV64IZBB: # %bb.0:
913 ; RV64IZBB-NEXT: lui a0, 983040
914 ; RV64IZBB-NEXT: srli a0, a0, 3
915 ; RV64IZBB-NEXT: not a0, a0
916 ; RV64IZBB-NEXT: ret
917 ;
918 ; RV64IZBS-LABEL: imm_end_xori_1:
919 ; RV64IZBS: # %bb.0:
920 ; RV64IZBS-NEXT: lui a0, 983040
921 ; RV64IZBS-NEXT: srli a0, a0, 3
922 ; RV64IZBS-NEXT: not a0, a0
923 ; RV64IZBS-NEXT: ret
924 ;
925 ; RV64IXTHEADBB-LABEL: imm_end_xori_1:
926 ; RV64IXTHEADBB: # %bb.0:
927 ; RV64IXTHEADBB-NEXT: lui a0, 983040
928 ; RV64IXTHEADBB-NEXT: srli a0, a0, 3
929 ; RV64IXTHEADBB-NEXT: not a0, a0
930 ; RV64IXTHEADBB-NEXT: ret
931 ret i64 -2305843009180139521 ; 0xE000_0000_01FF_FFFF
932 }
934 ; This constant can be materialized for RV64 with ADDI+SLLI+ADDI+ADDI.
936 define i64 @imm_end_2addi_1() nounwind {
937 ; RV64I-LABEL: imm_end_2addi_1:
938 ; RV64I: # %bb.0:
939 ; RV64I-NEXT: li a0, -2047
940 ; RV64I-NEXT: slli a0, a0, 39
941 ; RV64I-NEXT: addi a0, a0, -2048
942 ; RV64I-NEXT: addi a0, a0, -1
943 ; RV64I-NEXT: ret
944 ;
945 ; RV64IZBA-LABEL: imm_end_2addi_1:
946 ; RV64IZBA: # %bb.0:
947 ; RV64IZBA-NEXT: li a0, -2047
948 ; RV64IZBA-NEXT: slli a0, a0, 39
949 ; RV64IZBA-NEXT: addi a0, a0, -2048
950 ; RV64IZBA-NEXT: addi a0, a0, -1
951 ; RV64IZBA-NEXT: ret
952 ;
953 ; RV64IZBB-LABEL: imm_end_2addi_1:
954 ; RV64IZBB: # %bb.0:
955 ; RV64IZBB-NEXT: li a0, -2047
956 ; RV64IZBB-NEXT: slli a0, a0, 39
957 ; RV64IZBB-NEXT: addi a0, a0, -2048
958 ; RV64IZBB-NEXT: addi a0, a0, -1
959 ; RV64IZBB-NEXT: ret
960 ;
961 ; RV64IZBS-LABEL: imm_end_2addi_1:
962 ; RV64IZBS: # %bb.0:
963 ; RV64IZBS-NEXT: li a0, -2047
964 ; RV64IZBS-NEXT: slli a0, a0, 39
965 ; RV64IZBS-NEXT: addi a0, a0, -2048
966 ; RV64IZBS-NEXT: addi a0, a0, -1
967 ; RV64IZBS-NEXT: ret
968 ;
969 ; RV64IXTHEADBB-LABEL: imm_end_2addi_1:
970 ; RV64IXTHEADBB: # %bb.0:
971 ; RV64IXTHEADBB-NEXT: li a0, -2047
972 ; RV64IXTHEADBB-NEXT: slli a0, a0, 39
973 ; RV64IXTHEADBB-NEXT: addi a0, a0, -2048
974 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1
975 ; RV64IXTHEADBB-NEXT: ret
976 ret i64 -1125350151030785 ; 0xFFFC_007F_FFFF_F7FF
977 }
979 ; This constant can be more efficiently materialized for RV64 if we use two
980 ; registers instead of one.
982 define i64 @imm_2reg_1() nounwind {
983 ; RV64I-LABEL: imm_2reg_1:
984 ; RV64I: # %bb.0:
985 ; RV64I-NEXT: lui a0, 74565
986 ; RV64I-NEXT: addiw a0, a0, 1656
987 ; RV64I-NEXT: slli a1, a0, 57
988 ; RV64I-NEXT: add a0, a0, a1
989 ; RV64I-NEXT: ret
990 ;
991 ; RV64IZBA-LABEL: imm_2reg_1:
992 ; RV64IZBA: # %bb.0:
993 ; RV64IZBA-NEXT: lui a0, 74565
994 ; RV64IZBA-NEXT: addiw a0, a0, 1656
995 ; RV64IZBA-NEXT: slli a1, a0, 57
996 ; RV64IZBA-NEXT: add a0, a0, a1
997 ; RV64IZBA-NEXT: ret
998 ;
999 ; RV64IZBB-LABEL: imm_2reg_1:
1000 ; RV64IZBB: # %bb.0:
1001 ; RV64IZBB-NEXT: lui a0, 74565
1002 ; RV64IZBB-NEXT: addiw a0, a0, 1656
1003 ; RV64IZBB-NEXT: slli a1, a0, 57
1004 ; RV64IZBB-NEXT: add a0, a0, a1
1005 ; RV64IZBB-NEXT: ret
1006 ;
1007 ; RV64IZBS-LABEL: imm_2reg_1:
1008 ; RV64IZBS: # %bb.0:
1009 ; RV64IZBS-NEXT: lui a0, 74565
1010 ; RV64IZBS-NEXT: addiw a0, a0, 1656
1011 ; RV64IZBS-NEXT: slli a1, a0, 57
1012 ; RV64IZBS-NEXT: add a0, a0, a1
1013 ; RV64IZBS-NEXT: ret
1014 ;
1015 ; RV64IXTHEADBB-LABEL: imm_2reg_1:
1016 ; RV64IXTHEADBB: # %bb.0:
1017 ; RV64IXTHEADBB-NEXT: lui a0, 74565
1018 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 1656
1019 ; RV64IXTHEADBB-NEXT: slli a1, a0, 57
1020 ; RV64IXTHEADBB-NEXT: add a0, a0, a1
1021 ; RV64IXTHEADBB-NEXT: ret
1022 ret i64 -1152921504301427080 ; 0xF000_0000_1234_5678
1023 }
1025 ; FIXME: This should use a single ADDI for the immediate.
1026 define void @imm_store_i16_neg1(ptr %p) nounwind {
1027 ; RV64I-LABEL: imm_store_i16_neg1:
1028 ; RV64I: # %bb.0:
1029 ; RV64I-NEXT: li a1, -1
1030 ; RV64I-NEXT: sh a1, 0(a0)
1031 ; RV64I-NEXT: ret
1032 ;
1033 ; RV64IZBA-LABEL: imm_store_i16_neg1:
1034 ; RV64IZBA: # %bb.0:
1035 ; RV64IZBA-NEXT: li a1, -1
1036 ; RV64IZBA-NEXT: sh a1, 0(a0)
1037 ; RV64IZBA-NEXT: ret
1038 ;
1039 ; RV64IZBB-LABEL: imm_store_i16_neg1:
1040 ; RV64IZBB: # %bb.0:
1041 ; RV64IZBB-NEXT: li a1, -1
1042 ; RV64IZBB-NEXT: sh a1, 0(a0)
1043 ; RV64IZBB-NEXT: ret
1044 ;
1045 ; RV64IZBS-LABEL: imm_store_i16_neg1:
1046 ; RV64IZBS: # %bb.0:
1047 ; RV64IZBS-NEXT: li a1, -1
1048 ; RV64IZBS-NEXT: sh a1, 0(a0)
1049 ; RV64IZBS-NEXT: ret
1050 ;
1051 ; RV64IXTHEADBB-LABEL: imm_store_i16_neg1:
1052 ; RV64IXTHEADBB: # %bb.0:
1053 ; RV64IXTHEADBB-NEXT: li a1, -1
1054 ; RV64IXTHEADBB-NEXT: sh a1, 0(a0)
1055 ; RV64IXTHEADBB-NEXT: ret
1056 store i16 -1, ptr %p
1057 ret void
1058 }
1060 ; FIXME: This should use a single ADDI for the immediate.
1061 define void @imm_store_i32_neg1(ptr %p) nounwind {
1062 ; RV64I-LABEL: imm_store_i32_neg1:
1063 ; RV64I: # %bb.0:
1064 ; RV64I-NEXT: li a1, -1
1065 ; RV64I-NEXT: sw a1, 0(a0)
1066 ; RV64I-NEXT: ret
1067 ;
1068 ; RV64IZBA-LABEL: imm_store_i32_neg1:
1069 ; RV64IZBA: # %bb.0:
1070 ; RV64IZBA-NEXT: li a1, -1
1071 ; RV64IZBA-NEXT: sw a1, 0(a0)
1072 ; RV64IZBA-NEXT: ret
1073 ;
1074 ; RV64IZBB-LABEL: imm_store_i32_neg1:
1075 ; RV64IZBB: # %bb.0:
1076 ; RV64IZBB-NEXT: li a1, -1
1077 ; RV64IZBB-NEXT: sw a1, 0(a0)
1078 ; RV64IZBB-NEXT: ret
1079 ;
1080 ; RV64IZBS-LABEL: imm_store_i32_neg1:
1081 ; RV64IZBS: # %bb.0:
1082 ; RV64IZBS-NEXT: li a1, -1
1083 ; RV64IZBS-NEXT: sw a1, 0(a0)
1084 ; RV64IZBS-NEXT: ret
1085 ;
1086 ; RV64IXTHEADBB-LABEL: imm_store_i32_neg1:
1087 ; RV64IXTHEADBB: # %bb.0:
1088 ; RV64IXTHEADBB-NEXT: li a1, -1
1089 ; RV64IXTHEADBB-NEXT: sw a1, 0(a0)
1090 ; RV64IXTHEADBB-NEXT: ret
1091 store i32 -1, ptr %p
1092 ret void
1093 }
1095 define i64 @imm_5372288229() {
1096 ; RV64I-LABEL: imm_5372288229:
1097 ; RV64I: # %bb.0:
1098 ; RV64I-NEXT: lui a0, 160
1099 ; RV64I-NEXT: addiw a0, a0, 437
1100 ; RV64I-NEXT: slli a0, a0, 13
1101 ; RV64I-NEXT: addi a0, a0, -795
1102 ; RV64I-NEXT: ret
1103 ;
1104 ; RV64IZBA-LABEL: imm_5372288229:
1105 ; RV64IZBA: # %bb.0:
1106 ; RV64IZBA-NEXT: lui a0, 655797
1107 ; RV64IZBA-NEXT: slli.uw a0, a0, 1
1108 ; RV64IZBA-NEXT: addi a0, a0, -795
1109 ; RV64IZBA-NEXT: ret
1110 ;
1111 ; RV64IZBB-LABEL: imm_5372288229:
1112 ; RV64IZBB: # %bb.0:
1113 ; RV64IZBB-NEXT: lui a0, 160
1114 ; RV64IZBB-NEXT: addiw a0, a0, 437
1115 ; RV64IZBB-NEXT: slli a0, a0, 13
1116 ; RV64IZBB-NEXT: addi a0, a0, -795
1117 ; RV64IZBB-NEXT: ret
1118 ;
1119 ; RV64IZBS-LABEL: imm_5372288229:
1120 ; RV64IZBS: # %bb.0:
1121 ; RV64IZBS-NEXT: lui a0, 263018
1122 ; RV64IZBS-NEXT: addiw a0, a0, -795
1123 ; RV64IZBS-NEXT: bseti a0, a0, 32
1124 ; RV64IZBS-NEXT: ret
1125 ;
1126 ; RV64IXTHEADBB-LABEL: imm_5372288229:
1127 ; RV64IXTHEADBB: # %bb.0:
1128 ; RV64IXTHEADBB-NEXT: lui a0, 160
1129 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 437
1130 ; RV64IXTHEADBB-NEXT: slli a0, a0, 13
1131 ; RV64IXTHEADBB-NEXT: addi a0, a0, -795
1132 ; RV64IXTHEADBB-NEXT: ret
1133 ret i64 5372288229
1134 }
1136 define i64 @imm_neg_5372288229() {
1137 ; RV64I-LABEL: imm_neg_5372288229:
1138 ; RV64I: # %bb.0:
1139 ; RV64I-NEXT: lui a0, 1048416
1140 ; RV64I-NEXT: addiw a0, a0, -437
1141 ; RV64I-NEXT: slli a0, a0, 13
1142 ; RV64I-NEXT: addi a0, a0, 795
1143 ; RV64I-NEXT: ret
1144 ;
1145 ; RV64IZBA-LABEL: imm_neg_5372288229:
1146 ; RV64IZBA: # %bb.0:
1147 ; RV64IZBA-NEXT: lui a0, 611378
1148 ; RV64IZBA-NEXT: addiw a0, a0, 265
1149 ; RV64IZBA-NEXT: sh1add a0, a0, a0
1150 ; RV64IZBA-NEXT: ret
1151 ;
1152 ; RV64IZBB-LABEL: imm_neg_5372288229:
1153 ; RV64IZBB: # %bb.0:
1154 ; RV64IZBB-NEXT: lui a0, 1048416
1155 ; RV64IZBB-NEXT: addiw a0, a0, -437
1156 ; RV64IZBB-NEXT: slli a0, a0, 13
1157 ; RV64IZBB-NEXT: addi a0, a0, 795
1158 ; RV64IZBB-NEXT: ret
1159 ;
1160 ; RV64IZBS-LABEL: imm_neg_5372288229:
1161 ; RV64IZBS: # %bb.0:
1162 ; RV64IZBS-NEXT: lui a0, 785558
1163 ; RV64IZBS-NEXT: addiw a0, a0, 795
1164 ; RV64IZBS-NEXT: bclri a0, a0, 32
1165 ; RV64IZBS-NEXT: ret
1166 ;
1167 ; RV64IXTHEADBB-LABEL: imm_neg_5372288229:
1168 ; RV64IXTHEADBB: # %bb.0:
1169 ; RV64IXTHEADBB-NEXT: lui a0, 1048416
1170 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -437
1171 ; RV64IXTHEADBB-NEXT: slli a0, a0, 13
1172 ; RV64IXTHEADBB-NEXT: addi a0, a0, 795
1173 ; RV64IXTHEADBB-NEXT: ret
1174 ret i64 -5372288229
1175 }
1177 define i64 @imm_8953813715() {
1178 ; RV64I-LABEL: imm_8953813715:
1179 ; RV64I: # %bb.0:
1180 ; RV64I-NEXT: lui a0, 267
1181 ; RV64I-NEXT: addiw a0, a0, -637
1182 ; RV64I-NEXT: slli a0, a0, 13
1183 ; RV64I-NEXT: addi a0, a0, -1325
1184 ; RV64I-NEXT: ret
1185 ;
1186 ; RV64IZBA-LABEL: imm_8953813715:
1187 ; RV64IZBA: # %bb.0:
1188 ; RV64IZBA-NEXT: lui a0, 437198
1189 ; RV64IZBA-NEXT: addiw a0, a0, -265
1190 ; RV64IZBA-NEXT: sh2add a0, a0, a0
1191 ; RV64IZBA-NEXT: ret
1192 ;
1193 ; RV64IZBB-LABEL: imm_8953813715:
1194 ; RV64IZBB: # %bb.0:
1195 ; RV64IZBB-NEXT: lui a0, 267
1196 ; RV64IZBB-NEXT: addiw a0, a0, -637
1197 ; RV64IZBB-NEXT: slli a0, a0, 13
1198 ; RV64IZBB-NEXT: addi a0, a0, -1325
1199 ; RV64IZBB-NEXT: ret
1200 ;
1201 ; RV64IZBS-LABEL: imm_8953813715:
1202 ; RV64IZBS: # %bb.0:
1203 ; RV64IZBS-NEXT: lui a0, 88838
1204 ; RV64IZBS-NEXT: addiw a0, a0, -1325
1205 ; RV64IZBS-NEXT: bseti a0, a0, 33
1206 ; RV64IZBS-NEXT: ret
1207 ;
1208 ; RV64IXTHEADBB-LABEL: imm_8953813715:
1209 ; RV64IXTHEADBB: # %bb.0:
1210 ; RV64IXTHEADBB-NEXT: lui a0, 267
1211 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -637
1212 ; RV64IXTHEADBB-NEXT: slli a0, a0, 13
1213 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1325
1214 ; RV64IXTHEADBB-NEXT: ret
1215 ret i64 8953813715
1216 }
1218 define i64 @imm_neg_8953813715() {
1219 ; RV64I-LABEL: imm_neg_8953813715:
1220 ; RV64I: # %bb.0:
1221 ; RV64I-NEXT: lui a0, 1048309
1222 ; RV64I-NEXT: addiw a0, a0, 637
1223 ; RV64I-NEXT: slli a0, a0, 13
1224 ; RV64I-NEXT: addi a0, a0, 1325
1225 ; RV64I-NEXT: ret
1226 ;
1227 ; RV64IZBA-LABEL: imm_neg_8953813715:
1228 ; RV64IZBA: # %bb.0:
1229 ; RV64IZBA-NEXT: lui a0, 611378
1230 ; RV64IZBA-NEXT: addiw a0, a0, 265
1231 ; RV64IZBA-NEXT: sh2add a0, a0, a0
1232 ; RV64IZBA-NEXT: ret
1233 ;
1234 ; RV64IZBB-LABEL: imm_neg_8953813715:
1235 ; RV64IZBB: # %bb.0:
1236 ; RV64IZBB-NEXT: lui a0, 1048309
1237 ; RV64IZBB-NEXT: addiw a0, a0, 637
1238 ; RV64IZBB-NEXT: slli a0, a0, 13
1239 ; RV64IZBB-NEXT: addi a0, a0, 1325
1240 ; RV64IZBB-NEXT: ret
1241 ;
1242 ; RV64IZBS-LABEL: imm_neg_8953813715:
1243 ; RV64IZBS: # %bb.0:
1244 ; RV64IZBS-NEXT: lui a0, 959738
1245 ; RV64IZBS-NEXT: addiw a0, a0, 1325
1246 ; RV64IZBS-NEXT: bclri a0, a0, 33
1247 ; RV64IZBS-NEXT: ret
1248 ;
1249 ; RV64IXTHEADBB-LABEL: imm_neg_8953813715:
1250 ; RV64IXTHEADBB: # %bb.0:
1251 ; RV64IXTHEADBB-NEXT: lui a0, 1048309
1252 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 637
1253 ; RV64IXTHEADBB-NEXT: slli a0, a0, 13
1254 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1325
1255 ; RV64IXTHEADBB-NEXT: ret
1256 ret i64 -8953813715
1257 }
1259 define i64 @imm_16116864687() {
1260 ; RV64I-LABEL: imm_16116864687:
1261 ; RV64I: # %bb.0:
1262 ; RV64I-NEXT: lui a0, 961
1263 ; RV64I-NEXT: addiw a0, a0, -1475
1264 ; RV64I-NEXT: slli a0, a0, 12
1265 ; RV64I-NEXT: addi a0, a0, 1711
1266 ; RV64I-NEXT: ret
1267 ;
1268 ; RV64IZBA-LABEL: imm_16116864687:
1269 ; RV64IZBA: # %bb.0:
1270 ; RV64IZBA-NEXT: lui a0, 437198
1271 ; RV64IZBA-NEXT: addiw a0, a0, -265
1272 ; RV64IZBA-NEXT: sh3add a0, a0, a0
1273 ; RV64IZBA-NEXT: ret
1274 ;
1275 ; RV64IZBB-LABEL: imm_16116864687:
1276 ; RV64IZBB: # %bb.0:
1277 ; RV64IZBB-NEXT: lui a0, 961
1278 ; RV64IZBB-NEXT: addiw a0, a0, -1475
1279 ; RV64IZBB-NEXT: slli a0, a0, 12
1280 ; RV64IZBB-NEXT: addi a0, a0, 1711
1281 ; RV64IZBB-NEXT: ret
1282 ;
1283 ; RV64IZBS-LABEL: imm_16116864687:
1284 ; RV64IZBS: # %bb.0:
1285 ; RV64IZBS-NEXT: lui a0, 961
1286 ; RV64IZBS-NEXT: addiw a0, a0, -1475
1287 ; RV64IZBS-NEXT: slli a0, a0, 12
1288 ; RV64IZBS-NEXT: addi a0, a0, 1711
1289 ; RV64IZBS-NEXT: ret
1290 ;
1291 ; RV64IXTHEADBB-LABEL: imm_16116864687:
1292 ; RV64IXTHEADBB: # %bb.0:
1293 ; RV64IXTHEADBB-NEXT: lui a0, 961
1294 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1475
1295 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
1296 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1711
1297 ; RV64IXTHEADBB-NEXT: ret
1298 ret i64 16116864687
1299 }
1301 define i64 @imm_neg_16116864687() {
1302 ; RV64I-LABEL: imm_neg_16116864687:
1303 ; RV64I: # %bb.0:
1304 ; RV64I-NEXT: lui a0, 1047615
1305 ; RV64I-NEXT: addiw a0, a0, 1475
1306 ; RV64I-NEXT: slli a0, a0, 12
1307 ; RV64I-NEXT: addi a0, a0, -1711
1308 ; RV64I-NEXT: ret
1309 ;
1310 ; RV64IZBA-LABEL: imm_neg_16116864687:
1311 ; RV64IZBA: # %bb.0:
1312 ; RV64IZBA-NEXT: lui a0, 611378
1313 ; RV64IZBA-NEXT: addiw a0, a0, 265
1314 ; RV64IZBA-NEXT: sh3add a0, a0, a0
1315 ; RV64IZBA-NEXT: ret
1316 ;
1317 ; RV64IZBB-LABEL: imm_neg_16116864687:
1318 ; RV64IZBB: # %bb.0:
1319 ; RV64IZBB-NEXT: lui a0, 1047615
1320 ; RV64IZBB-NEXT: addiw a0, a0, 1475
1321 ; RV64IZBB-NEXT: slli a0, a0, 12
1322 ; RV64IZBB-NEXT: addi a0, a0, -1711
1323 ; RV64IZBB-NEXT: ret
1324 ;
1325 ; RV64IZBS-LABEL: imm_neg_16116864687:
1326 ; RV64IZBS: # %bb.0:
1327 ; RV64IZBS-NEXT: lui a0, 1047615
1328 ; RV64IZBS-NEXT: addiw a0, a0, 1475
1329 ; RV64IZBS-NEXT: slli a0, a0, 12
1330 ; RV64IZBS-NEXT: addi a0, a0, -1711
1331 ; RV64IZBS-NEXT: ret
1332 ;
1333 ; RV64IXTHEADBB-LABEL: imm_neg_16116864687:
1334 ; RV64IXTHEADBB: # %bb.0:
1335 ; RV64IXTHEADBB-NEXT: lui a0, 1047615
1336 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 1475
1337 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
1338 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1711
1339 ; RV64IXTHEADBB-NEXT: ret
1340 ret i64 -16116864687
1341 }
1343 define i64 @imm_2344336315() {
1344 ; RV64I-LABEL: imm_2344336315:
1345 ; RV64I: # %bb.0:
1346 ; RV64I-NEXT: lui a0, 143087
1347 ; RV64I-NEXT: slli a0, a0, 2
1348 ; RV64I-NEXT: addi a0, a0, -1093
1349 ; RV64I-NEXT: ret
1350 ;
1351 ; RV64IZBA-LABEL: imm_2344336315:
1352 ; RV64IZBA: # %bb.0:
1353 ; RV64IZBA-NEXT: lui a0, 143087
1354 ; RV64IZBA-NEXT: slli a0, a0, 2
1355 ; RV64IZBA-NEXT: addi a0, a0, -1093
1356 ; RV64IZBA-NEXT: ret
1357 ;
1358 ; RV64IZBB-LABEL: imm_2344336315:
1359 ; RV64IZBB: # %bb.0:
1360 ; RV64IZBB-NEXT: lui a0, 143087
1361 ; RV64IZBB-NEXT: slli a0, a0, 2
1362 ; RV64IZBB-NEXT: addi a0, a0, -1093
1363 ; RV64IZBB-NEXT: ret
1364 ;
1365 ; RV64IZBS-LABEL: imm_2344336315:
1366 ; RV64IZBS: # %bb.0:
1367 ; RV64IZBS-NEXT: lui a0, 143087
1368 ; RV64IZBS-NEXT: slli a0, a0, 2
1369 ; RV64IZBS-NEXT: addi a0, a0, -1093
1370 ; RV64IZBS-NEXT: ret
1371 ;
1372 ; RV64IXTHEADBB-LABEL: imm_2344336315:
1373 ; RV64IXTHEADBB: # %bb.0:
1374 ; RV64IXTHEADBB-NEXT: lui a0, 143087
1375 ; RV64IXTHEADBB-NEXT: slli a0, a0, 2
1376 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1093
1377 ; RV64IXTHEADBB-NEXT: ret
1378 ret i64 2344336315 ; 0x8bbbbbbb
1379 }
1381 define i64 @imm_70370820078523() {
1382 ; RV64-NOPOOL-LABEL: imm_70370820078523:
1383 ; RV64-NOPOOL: # %bb.0:
1384 ; RV64-NOPOOL-NEXT: lui a0, 256
1385 ; RV64-NOPOOL-NEXT: addiw a0, a0, 31
1386 ; RV64-NOPOOL-NEXT: slli a0, a0, 12
1387 ; RV64-NOPOOL-NEXT: addi a0, a0, -273
1388 ; RV64-NOPOOL-NEXT: slli a0, a0, 14
1389 ; RV64-NOPOOL-NEXT: addi a0, a0, -1093
1390 ; RV64-NOPOOL-NEXT: ret
1391 ;
1392 ; RV64I-POOL-LABEL: imm_70370820078523:
1393 ; RV64I-POOL: # %bb.0:
1394 ; RV64I-POOL-NEXT: lui a0, %hi(.LCPI37_0)
1395 ; RV64I-POOL-NEXT: ld a0, %lo(.LCPI37_0)(a0)
1396 ; RV64I-POOL-NEXT: ret
1397 ;
1398 ; RV64IZBA-LABEL: imm_70370820078523:
1399 ; RV64IZBA: # %bb.0:
1400 ; RV64IZBA-NEXT: lui a0, 256
1401 ; RV64IZBA-NEXT: addiw a0, a0, 31
1402 ; RV64IZBA-NEXT: slli a0, a0, 12
1403 ; RV64IZBA-NEXT: addi a0, a0, -273
1404 ; RV64IZBA-NEXT: slli a0, a0, 14
1405 ; RV64IZBA-NEXT: addi a0, a0, -1093
1406 ; RV64IZBA-NEXT: ret
1407 ;
1408 ; RV64IZBB-LABEL: imm_70370820078523:
1409 ; RV64IZBB: # %bb.0:
1410 ; RV64IZBB-NEXT: lui a0, 256
1411 ; RV64IZBB-NEXT: addiw a0, a0, 31
1412 ; RV64IZBB-NEXT: slli a0, a0, 12
1413 ; RV64IZBB-NEXT: addi a0, a0, -273
1414 ; RV64IZBB-NEXT: slli a0, a0, 14
1415 ; RV64IZBB-NEXT: addi a0, a0, -1093
1416 ; RV64IZBB-NEXT: ret
1417 ;
1418 ; RV64IZBS-LABEL: imm_70370820078523:
1419 ; RV64IZBS: # %bb.0:
1420 ; RV64IZBS-NEXT: lui a0, 506812
1421 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1422 ; RV64IZBS-NEXT: bseti a0, a0, 46
1423 ; RV64IZBS-NEXT: ret
1424 ;
1425 ; RV64IXTHEADBB-LABEL: imm_70370820078523:
1426 ; RV64IXTHEADBB: # %bb.0:
1427 ; RV64IXTHEADBB-NEXT: lui a0, 256
1428 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 31
1429 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
1430 ; RV64IXTHEADBB-NEXT: addi a0, a0, -273
1431 ; RV64IXTHEADBB-NEXT: slli a0, a0, 14
1432 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1093
1433 ; RV64IXTHEADBB-NEXT: ret
1434 ret i64 70370820078523 ; 0x40007bbbbbbb
1435 }
1437 define i64 @imm_neg_9223372034778874949() {
1438 ; RV64I-LABEL: imm_neg_9223372034778874949:
1439 ; RV64I: # %bb.0:
1440 ; RV64I-NEXT: lui a0, 506812
1441 ; RV64I-NEXT: addiw a0, a0, -1093
1442 ; RV64I-NEXT: slli a1, a0, 63
1443 ; RV64I-NEXT: add a0, a0, a1
1444 ; RV64I-NEXT: ret
1445 ;
1446 ; RV64IZBA-LABEL: imm_neg_9223372034778874949:
1447 ; RV64IZBA: # %bb.0:
1448 ; RV64IZBA-NEXT: lui a0, 506812
1449 ; RV64IZBA-NEXT: addiw a0, a0, -1093
1450 ; RV64IZBA-NEXT: slli a1, a0, 63
1451 ; RV64IZBA-NEXT: add a0, a0, a1
1452 ; RV64IZBA-NEXT: ret
1453 ;
1454 ; RV64IZBB-LABEL: imm_neg_9223372034778874949:
1455 ; RV64IZBB: # %bb.0:
1456 ; RV64IZBB-NEXT: lui a0, 506812
1457 ; RV64IZBB-NEXT: addiw a0, a0, -1093
1458 ; RV64IZBB-NEXT: slli a1, a0, 63
1459 ; RV64IZBB-NEXT: add a0, a0, a1
1460 ; RV64IZBB-NEXT: ret
1461 ;
1462 ; RV64IZBS-LABEL: imm_neg_9223372034778874949:
1463 ; RV64IZBS: # %bb.0:
1464 ; RV64IZBS-NEXT: lui a0, 506812
1465 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1466 ; RV64IZBS-NEXT: bseti a0, a0, 63
1467 ; RV64IZBS-NEXT: ret
1468 ;
1469 ; RV64IXTHEADBB-LABEL: imm_neg_9223372034778874949:
1470 ; RV64IXTHEADBB: # %bb.0:
1471 ; RV64IXTHEADBB-NEXT: lui a0, 506812
1472 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093
1473 ; RV64IXTHEADBB-NEXT: slli a1, a0, 63
1474 ; RV64IXTHEADBB-NEXT: add a0, a0, a1
1475 ; RV64IXTHEADBB-NEXT: ret
1476 ret i64 -9223372034778874949 ; 0x800000007bbbbbbb
1477 }
1479 define i64 @imm_neg_9223301666034697285() {
1480 ; RV64-NOPOOL-LABEL: imm_neg_9223301666034697285:
1481 ; RV64-NOPOOL: # %bb.0:
1482 ; RV64-NOPOOL-NEXT: lui a0, 917505
1483 ; RV64-NOPOOL-NEXT: slli a0, a0, 8
1484 ; RV64-NOPOOL-NEXT: addi a0, a0, 31
1485 ; RV64-NOPOOL-NEXT: slli a0, a0, 12
1486 ; RV64-NOPOOL-NEXT: addi a0, a0, -273
1487 ; RV64-NOPOOL-NEXT: slli a0, a0, 14
1488 ; RV64-NOPOOL-NEXT: addi a0, a0, -1093
1489 ; RV64-NOPOOL-NEXT: ret
1490 ;
1491 ; RV64I-POOL-LABEL: imm_neg_9223301666034697285:
1492 ; RV64I-POOL: # %bb.0:
1493 ; RV64I-POOL-NEXT: lui a0, %hi(.LCPI39_0)
1494 ; RV64I-POOL-NEXT: ld a0, %lo(.LCPI39_0)(a0)
1495 ; RV64I-POOL-NEXT: ret
1496 ;
1497 ; RV64IZBA-LABEL: imm_neg_9223301666034697285:
1498 ; RV64IZBA: # %bb.0:
1499 ; RV64IZBA-NEXT: lui a0, 917505
1500 ; RV64IZBA-NEXT: slli a0, a0, 8
1501 ; RV64IZBA-NEXT: addi a0, a0, 31
1502 ; RV64IZBA-NEXT: slli a0, a0, 12
1503 ; RV64IZBA-NEXT: addi a0, a0, -273
1504 ; RV64IZBA-NEXT: slli a0, a0, 14
1505 ; RV64IZBA-NEXT: addi a0, a0, -1093
1506 ; RV64IZBA-NEXT: ret
1507 ;
1508 ; RV64IZBB-LABEL: imm_neg_9223301666034697285:
1509 ; RV64IZBB: # %bb.0:
1510 ; RV64IZBB-NEXT: lui a0, 917505
1511 ; RV64IZBB-NEXT: slli a0, a0, 8
1512 ; RV64IZBB-NEXT: addi a0, a0, 31
1513 ; RV64IZBB-NEXT: slli a0, a0, 12
1514 ; RV64IZBB-NEXT: addi a0, a0, -273
1515 ; RV64IZBB-NEXT: slli a0, a0, 14
1516 ; RV64IZBB-NEXT: addi a0, a0, -1093
1517 ; RV64IZBB-NEXT: ret
1518 ;
1519 ; RV64IZBS-LABEL: imm_neg_9223301666034697285:
1520 ; RV64IZBS: # %bb.0:
1521 ; RV64IZBS-NEXT: lui a0, 506812
1522 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1523 ; RV64IZBS-NEXT: bseti a0, a0, 46
1524 ; RV64IZBS-NEXT: bseti a0, a0, 63
1525 ; RV64IZBS-NEXT: ret
1526 ;
1527 ; RV64IXTHEADBB-LABEL: imm_neg_9223301666034697285:
1528 ; RV64IXTHEADBB: # %bb.0:
1529 ; RV64IXTHEADBB-NEXT: lui a0, 917505
1530 ; RV64IXTHEADBB-NEXT: slli a0, a0, 8
1531 ; RV64IXTHEADBB-NEXT: addi a0, a0, 31
1532 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
1533 ; RV64IXTHEADBB-NEXT: addi a0, a0, -273
1534 ; RV64IXTHEADBB-NEXT: slli a0, a0, 14
1535 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1093
1536 ; RV64IXTHEADBB-NEXT: ret
1537 ret i64 -9223301666034697285 ; 0x800040007bbbbbbb
1538 }
1540 define i64 @imm_neg_2219066437() {
1541 ; RV64I-LABEL: imm_neg_2219066437:
1542 ; RV64I: # %bb.0:
1543 ; RV64I-NEXT: lui a0, 913135
1544 ; RV64I-NEXT: slli a0, a0, 2
1545 ; RV64I-NEXT: addi a0, a0, -1093
1546 ; RV64I-NEXT: ret
1547 ;
1548 ; RV64IZBA-LABEL: imm_neg_2219066437:
1549 ; RV64IZBA: # %bb.0:
1550 ; RV64IZBA-NEXT: lui a0, 913135
1551 ; RV64IZBA-NEXT: slli a0, a0, 2
1552 ; RV64IZBA-NEXT: addi a0, a0, -1093
1553 ; RV64IZBA-NEXT: ret
1554 ;
1555 ; RV64IZBB-LABEL: imm_neg_2219066437:
1556 ; RV64IZBB: # %bb.0:
1557 ; RV64IZBB-NEXT: lui a0, 913135
1558 ; RV64IZBB-NEXT: slli a0, a0, 2
1559 ; RV64IZBB-NEXT: addi a0, a0, -1093
1560 ; RV64IZBB-NEXT: ret
1561 ;
1562 ; RV64IZBS-LABEL: imm_neg_2219066437:
1563 ; RV64IZBS: # %bb.0:
1564 ; RV64IZBS-NEXT: lui a0, 913135
1565 ; RV64IZBS-NEXT: slli a0, a0, 2
1566 ; RV64IZBS-NEXT: addi a0, a0, -1093
1567 ; RV64IZBS-NEXT: ret
1568 ;
1569 ; RV64IXTHEADBB-LABEL: imm_neg_2219066437:
1570 ; RV64IXTHEADBB: # %bb.0:
1571 ; RV64IXTHEADBB-NEXT: lui a0, 913135
1572 ; RV64IXTHEADBB-NEXT: slli a0, a0, 2
1573 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1093
1574 ; RV64IXTHEADBB-NEXT: ret
1575 ret i64 -2219066437 ; 0xffffffff7bbbbbbb
1576 }
1578 define i64 @imm_neg_8798043653189() {
1579 ; RV64I-LABEL: imm_neg_8798043653189:
1580 ; RV64I: # %bb.0:
1581 ; RV64I-NEXT: lui a0, 917475
1582 ; RV64I-NEXT: addiw a0, a0, -273
1583 ; RV64I-NEXT: slli a0, a0, 14
1584 ; RV64I-NEXT: addi a0, a0, -1093
1585 ; RV64I-NEXT: ret
1586 ;
1587 ; RV64IZBA-LABEL: imm_neg_8798043653189:
1588 ; RV64IZBA: # %bb.0:
1589 ; RV64IZBA-NEXT: lui a0, 917475
1590 ; RV64IZBA-NEXT: addiw a0, a0, -273
1591 ; RV64IZBA-NEXT: slli a0, a0, 14
1592 ; RV64IZBA-NEXT: addi a0, a0, -1093
1593 ; RV64IZBA-NEXT: ret
1594 ;
1595 ; RV64IZBB-LABEL: imm_neg_8798043653189:
1596 ; RV64IZBB: # %bb.0:
1597 ; RV64IZBB-NEXT: lui a0, 917475
1598 ; RV64IZBB-NEXT: addiw a0, a0, -273
1599 ; RV64IZBB-NEXT: slli a0, a0, 14
1600 ; RV64IZBB-NEXT: addi a0, a0, -1093
1601 ; RV64IZBB-NEXT: ret
1602 ;
1603 ; RV64IZBS-LABEL: imm_neg_8798043653189:
1604 ; RV64IZBS: # %bb.0:
1605 ; RV64IZBS-NEXT: lui a0, 572348
1606 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1607 ; RV64IZBS-NEXT: bclri a0, a0, 43
1608 ; RV64IZBS-NEXT: ret
1609 ;
1610 ; RV64IXTHEADBB-LABEL: imm_neg_8798043653189:
1611 ; RV64IXTHEADBB: # %bb.0:
1612 ; RV64IXTHEADBB-NEXT: lui a0, 917475
1613 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -273
1614 ; RV64IXTHEADBB-NEXT: slli a0, a0, 14
1615 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1093
1616 ; RV64IXTHEADBB-NEXT: ret
1617 ret i64 -8798043653189 ; 0xfffff7ff8bbbbbbb
1618 }
1620 define i64 @imm_9223372034904144827() {
1621 ; RV64I-LABEL: imm_9223372034904144827:
1622 ; RV64I: # %bb.0:
1623 ; RV64I-NEXT: lui a0, 572348
1624 ; RV64I-NEXT: addiw a0, a0, -1093
1625 ; RV64I-NEXT: slli a1, a0, 63
1626 ; RV64I-NEXT: add a0, a0, a1
1627 ; RV64I-NEXT: ret
1628 ;
1629 ; RV64IZBA-LABEL: imm_9223372034904144827:
1630 ; RV64IZBA: # %bb.0:
1631 ; RV64IZBA-NEXT: lui a0, 572348
1632 ; RV64IZBA-NEXT: addiw a0, a0, -1093
1633 ; RV64IZBA-NEXT: slli a1, a0, 63
1634 ; RV64IZBA-NEXT: add a0, a0, a1
1635 ; RV64IZBA-NEXT: ret
1636 ;
1637 ; RV64IZBB-LABEL: imm_9223372034904144827:
1638 ; RV64IZBB: # %bb.0:
1639 ; RV64IZBB-NEXT: lui a0, 572348
1640 ; RV64IZBB-NEXT: addiw a0, a0, -1093
1641 ; RV64IZBB-NEXT: slli a1, a0, 63
1642 ; RV64IZBB-NEXT: add a0, a0, a1
1643 ; RV64IZBB-NEXT: ret
1644 ;
1645 ; RV64IZBS-LABEL: imm_9223372034904144827:
1646 ; RV64IZBS: # %bb.0:
1647 ; RV64IZBS-NEXT: lui a0, 572348
1648 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1649 ; RV64IZBS-NEXT: bclri a0, a0, 63
1650 ; RV64IZBS-NEXT: ret
1651 ;
1652 ; RV64IXTHEADBB-LABEL: imm_9223372034904144827:
1653 ; RV64IXTHEADBB: # %bb.0:
1654 ; RV64IXTHEADBB-NEXT: lui a0, 572348
1655 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093
1656 ; RV64IXTHEADBB-NEXT: slli a1, a0, 63
1657 ; RV64IXTHEADBB-NEXT: add a0, a0, a1
1658 ; RV64IXTHEADBB-NEXT: ret
1659 ret i64 9223372034904144827 ; 0x7fffffff8bbbbbbb
1660 }
1662 define i64 @imm_neg_9223354442718100411() {
1663 ; RV64-NOPOOL-LABEL: imm_neg_9223354442718100411:
1664 ; RV64-NOPOOL: # %bb.0:
1665 ; RV64-NOPOOL-NEXT: lui a0, 524287
1666 ; RV64-NOPOOL-NEXT: slli a0, a0, 6
1667 ; RV64-NOPOOL-NEXT: addi a0, a0, -29
1668 ; RV64-NOPOOL-NEXT: slli a0, a0, 12
1669 ; RV64-NOPOOL-NEXT: addi a0, a0, -273
1670 ; RV64-NOPOOL-NEXT: slli a0, a0, 14
1671 ; RV64-NOPOOL-NEXT: addi a0, a0, -1093
1672 ; RV64-NOPOOL-NEXT: ret
1673 ;
1674 ; RV64I-POOL-LABEL: imm_neg_9223354442718100411:
1675 ; RV64I-POOL: # %bb.0:
1676 ; RV64I-POOL-NEXT: lui a0, %hi(.LCPI43_0)
1677 ; RV64I-POOL-NEXT: ld a0, %lo(.LCPI43_0)(a0)
1678 ; RV64I-POOL-NEXT: ret
1679 ;
1680 ; RV64IZBA-LABEL: imm_neg_9223354442718100411:
1681 ; RV64IZBA: # %bb.0:
1682 ; RV64IZBA-NEXT: lui a0, 524287
1683 ; RV64IZBA-NEXT: slli a0, a0, 6
1684 ; RV64IZBA-NEXT: addi a0, a0, -29
1685 ; RV64IZBA-NEXT: slli a0, a0, 12
1686 ; RV64IZBA-NEXT: addi a0, a0, -273
1687 ; RV64IZBA-NEXT: slli a0, a0, 14
1688 ; RV64IZBA-NEXT: addi a0, a0, -1093
1689 ; RV64IZBA-NEXT: ret
1690 ;
1691 ; RV64IZBB-LABEL: imm_neg_9223354442718100411:
1692 ; RV64IZBB: # %bb.0:
1693 ; RV64IZBB-NEXT: lui a0, 524287
1694 ; RV64IZBB-NEXT: slli a0, a0, 6
1695 ; RV64IZBB-NEXT: addi a0, a0, -29
1696 ; RV64IZBB-NEXT: slli a0, a0, 12
1697 ; RV64IZBB-NEXT: addi a0, a0, -273
1698 ; RV64IZBB-NEXT: slli a0, a0, 14
1699 ; RV64IZBB-NEXT: addi a0, a0, -1093
1700 ; RV64IZBB-NEXT: ret
1701 ;
1702 ; RV64IZBS-LABEL: imm_neg_9223354442718100411:
1703 ; RV64IZBS: # %bb.0:
1704 ; RV64IZBS-NEXT: lui a0, 572348
1705 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1706 ; RV64IZBS-NEXT: bclri a0, a0, 44
1707 ; RV64IZBS-NEXT: bclri a0, a0, 63
1708 ; RV64IZBS-NEXT: ret
1709 ;
1710 ; RV64IXTHEADBB-LABEL: imm_neg_9223354442718100411:
1711 ; RV64IXTHEADBB: # %bb.0:
1712 ; RV64IXTHEADBB-NEXT: lui a0, 524287
1713 ; RV64IXTHEADBB-NEXT: slli a0, a0, 6
1714 ; RV64IXTHEADBB-NEXT: addi a0, a0, -29
1715 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
1716 ; RV64IXTHEADBB-NEXT: addi a0, a0, -273
1717 ; RV64IXTHEADBB-NEXT: slli a0, a0, 14
1718 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1093
1719 ; RV64IXTHEADBB-NEXT: ret
1720 ret i64 9223354442718100411 ; 0x7fffefff8bbbbbbb
1721 }
1723 define i64 @imm_2863311530() {
1724 ; RV64I-LABEL: imm_2863311530:
1725 ; RV64I: # %bb.0:
1726 ; RV64I-NEXT: lui a0, 349525
1727 ; RV64I-NEXT: addiw a0, a0, 1365
1728 ; RV64I-NEXT: slli a0, a0, 1
1729 ; RV64I-NEXT: ret
1730 ;
1731 ; RV64IZBA-LABEL: imm_2863311530:
1732 ; RV64IZBA: # %bb.0:
1733 ; RV64IZBA-NEXT: lui a0, 349525
1734 ; RV64IZBA-NEXT: addiw a0, a0, 1365
1735 ; RV64IZBA-NEXT: slli a0, a0, 1
1736 ; RV64IZBA-NEXT: ret
1737 ;
1738 ; RV64IZBB-LABEL: imm_2863311530:
1739 ; RV64IZBB: # %bb.0:
1740 ; RV64IZBB-NEXT: lui a0, 349525
1741 ; RV64IZBB-NEXT: addiw a0, a0, 1365
1742 ; RV64IZBB-NEXT: slli a0, a0, 1
1743 ; RV64IZBB-NEXT: ret
1744 ;
1745 ; RV64IZBS-LABEL: imm_2863311530:
1746 ; RV64IZBS: # %bb.0:
1747 ; RV64IZBS-NEXT: lui a0, 349525
1748 ; RV64IZBS-NEXT: addiw a0, a0, 1365
1749 ; RV64IZBS-NEXT: slli a0, a0, 1
1750 ; RV64IZBS-NEXT: ret
1751 ;
1752 ; RV64IXTHEADBB-LABEL: imm_2863311530:
1753 ; RV64IXTHEADBB: # %bb.0:
1754 ; RV64IXTHEADBB-NEXT: lui a0, 349525
1755 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 1365
1756 ; RV64IXTHEADBB-NEXT: slli a0, a0, 1
1757 ; RV64IXTHEADBB-NEXT: ret
1758 ret i64 2863311530 ; #0xaaaaaaaa
1759 }
1761 define i64 @imm_neg_2863311530() {
1762 ; RV64I-LABEL: imm_neg_2863311530:
1763 ; RV64I: # %bb.0:
1764 ; RV64I-NEXT: lui a0, 699051
1765 ; RV64I-NEXT: addiw a0, a0, -1365
1766 ; RV64I-NEXT: slli a0, a0, 1
1767 ; RV64I-NEXT: ret
1768 ;
1769 ; RV64IZBA-LABEL: imm_neg_2863311530:
1770 ; RV64IZBA: # %bb.0:
1771 ; RV64IZBA-NEXT: lui a0, 699051
1772 ; RV64IZBA-NEXT: addiw a0, a0, -1365
1773 ; RV64IZBA-NEXT: slli a0, a0, 1
1774 ; RV64IZBA-NEXT: ret
1775 ;
1776 ; RV64IZBB-LABEL: imm_neg_2863311530:
1777 ; RV64IZBB: # %bb.0:
1778 ; RV64IZBB-NEXT: lui a0, 699051
1779 ; RV64IZBB-NEXT: addiw a0, a0, -1365
1780 ; RV64IZBB-NEXT: slli a0, a0, 1
1781 ; RV64IZBB-NEXT: ret
1782 ;
1783 ; RV64IZBS-LABEL: imm_neg_2863311530:
1784 ; RV64IZBS: # %bb.0:
1785 ; RV64IZBS-NEXT: lui a0, 699051
1786 ; RV64IZBS-NEXT: addiw a0, a0, -1365
1787 ; RV64IZBS-NEXT: slli a0, a0, 1
1788 ; RV64IZBS-NEXT: ret
1789 ;
1790 ; RV64IXTHEADBB-LABEL: imm_neg_2863311530:
1791 ; RV64IXTHEADBB: # %bb.0:
1792 ; RV64IXTHEADBB-NEXT: lui a0, 699051
1793 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1365
1794 ; RV64IXTHEADBB-NEXT: slli a0, a0, 1
1795 ; RV64IXTHEADBB-NEXT: ret
1796 ret i64 -2863311530 ; #0xffffffff55555556
1797 }
1799 define i64 @imm_2147486378() {
1800 ; RV64I-LABEL: imm_2147486378:
1801 ; RV64I: # %bb.0:
1802 ; RV64I-NEXT: li a0, 1
1803 ; RV64I-NEXT: slli a0, a0, 31
1804 ; RV64I-NEXT: addi a0, a0, 1365
1805 ; RV64I-NEXT: ret
1806 ;
1807 ; RV64IZBA-LABEL: imm_2147486378:
1808 ; RV64IZBA: # %bb.0:
1809 ; RV64IZBA-NEXT: li a0, 1
1810 ; RV64IZBA-NEXT: slli a0, a0, 31
1811 ; RV64IZBA-NEXT: addi a0, a0, 1365
1812 ; RV64IZBA-NEXT: ret
1813 ;
1814 ; RV64IZBB-LABEL: imm_2147486378:
1815 ; RV64IZBB: # %bb.0:
1816 ; RV64IZBB-NEXT: li a0, 1
1817 ; RV64IZBB-NEXT: slli a0, a0, 31
1818 ; RV64IZBB-NEXT: addi a0, a0, 1365
1819 ; RV64IZBB-NEXT: ret
1820 ;
1821 ; RV64IZBS-LABEL: imm_2147486378:
1822 ; RV64IZBS: # %bb.0:
1823 ; RV64IZBS-NEXT: li a0, 1365
1824 ; RV64IZBS-NEXT: bseti a0, a0, 31
1825 ; RV64IZBS-NEXT: ret
1826 ;
1827 ; RV64IXTHEADBB-LABEL: imm_2147486378:
1828 ; RV64IXTHEADBB: # %bb.0:
1829 ; RV64IXTHEADBB-NEXT: li a0, 1
1830 ; RV64IXTHEADBB-NEXT: slli a0, a0, 31
1831 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1365
1832 ; RV64IXTHEADBB-NEXT: ret
1833 ret i64 2147485013
1834 }
1836 define i64 @imm_neg_2147485013() {
1837 ; RV64I-LABEL: imm_neg_2147485013:
1838 ; RV64I: # %bb.0:
1839 ; RV64I-NEXT: lui a0, 524288
1840 ; RV64I-NEXT: addi a0, a0, -1365
1841 ; RV64I-NEXT: ret
1842 ;
1843 ; RV64IZBA-LABEL: imm_neg_2147485013:
1844 ; RV64IZBA: # %bb.0:
1845 ; RV64IZBA-NEXT: lui a0, 524288
1846 ; RV64IZBA-NEXT: addi a0, a0, -1365
1847 ; RV64IZBA-NEXT: ret
1848 ;
1849 ; RV64IZBB-LABEL: imm_neg_2147485013:
1850 ; RV64IZBB: # %bb.0:
1851 ; RV64IZBB-NEXT: lui a0, 524288
1852 ; RV64IZBB-NEXT: addi a0, a0, -1365
1853 ; RV64IZBB-NEXT: ret
1854 ;
1855 ; RV64IZBS-LABEL: imm_neg_2147485013:
1856 ; RV64IZBS: # %bb.0:
1857 ; RV64IZBS-NEXT: lui a0, 524288
1858 ; RV64IZBS-NEXT: addi a0, a0, -1365
1859 ; RV64IZBS-NEXT: ret
1860 ;
1861 ; RV64IXTHEADBB-LABEL: imm_neg_2147485013:
1862 ; RV64IXTHEADBB: # %bb.0:
1863 ; RV64IXTHEADBB-NEXT: lui a0, 524288
1864 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1365
1865 ; RV64IXTHEADBB-NEXT: ret
1866 ret i64 -2147485013
1867 }
1869 define i64 @imm_12900924131259() {
1870 ; RV64I-LABEL: imm_12900924131259:
1871 ; RV64I: # %bb.0:
1872 ; RV64I-NEXT: lui a0, 188
1873 ; RV64I-NEXT: addiw a0, a0, -1093
1874 ; RV64I-NEXT: slli a0, a0, 24
1875 ; RV64I-NEXT: addi a0, a0, 1979
1876 ; RV64I-NEXT: ret
1877 ;
1878 ; RV64IZBA-LABEL: imm_12900924131259:
1879 ; RV64IZBA: # %bb.0:
1880 ; RV64IZBA-NEXT: lui a0, 768955
1881 ; RV64IZBA-NEXT: slli.uw a0, a0, 12
1882 ; RV64IZBA-NEXT: addi a0, a0, 1979
1883 ; RV64IZBA-NEXT: ret
1884 ;
1885 ; RV64IZBB-LABEL: imm_12900924131259:
1886 ; RV64IZBB: # %bb.0:
1887 ; RV64IZBB-NEXT: lui a0, 188
1888 ; RV64IZBB-NEXT: addiw a0, a0, -1093
1889 ; RV64IZBB-NEXT: slli a0, a0, 24
1890 ; RV64IZBB-NEXT: addi a0, a0, 1979
1891 ; RV64IZBB-NEXT: ret
1892 ;
1893 ; RV64IZBS-LABEL: imm_12900924131259:
1894 ; RV64IZBS: # %bb.0:
1895 ; RV64IZBS-NEXT: lui a0, 188
1896 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1897 ; RV64IZBS-NEXT: slli a0, a0, 24
1898 ; RV64IZBS-NEXT: addi a0, a0, 1979
1899 ; RV64IZBS-NEXT: ret
1900 ;
1901 ; RV64IXTHEADBB-LABEL: imm_12900924131259:
1902 ; RV64IXTHEADBB: # %bb.0:
1903 ; RV64IXTHEADBB-NEXT: lui a0, 188
1904 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093
1905 ; RV64IXTHEADBB-NEXT: slli a0, a0, 24
1906 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1979
1907 ; RV64IXTHEADBB-NEXT: ret
1908 ret i64 12900924131259
1909 }
1911 define i64 @imm_50394234880() {
1912 ; RV64I-LABEL: imm_50394234880:
1913 ; RV64I: # %bb.0:
1914 ; RV64I-NEXT: lui a0, 188
1915 ; RV64I-NEXT: addiw a0, a0, -1093
1916 ; RV64I-NEXT: slli a0, a0, 16
1917 ; RV64I-NEXT: ret
1918 ;
1919 ; RV64IZBA-LABEL: imm_50394234880:
1920 ; RV64IZBA: # %bb.0:
1921 ; RV64IZBA-NEXT: lui a0, 768955
1922 ; RV64IZBA-NEXT: slli.uw a0, a0, 4
1923 ; RV64IZBA-NEXT: ret
1924 ;
1925 ; RV64IZBB-LABEL: imm_50394234880:
1926 ; RV64IZBB: # %bb.0:
1927 ; RV64IZBB-NEXT: lui a0, 188
1928 ; RV64IZBB-NEXT: addiw a0, a0, -1093
1929 ; RV64IZBB-NEXT: slli a0, a0, 16
1930 ; RV64IZBB-NEXT: ret
1931 ;
1932 ; RV64IZBS-LABEL: imm_50394234880:
1933 ; RV64IZBS: # %bb.0:
1934 ; RV64IZBS-NEXT: lui a0, 188
1935 ; RV64IZBS-NEXT: addiw a0, a0, -1093
1936 ; RV64IZBS-NEXT: slli a0, a0, 16
1937 ; RV64IZBS-NEXT: ret
1938 ;
1939 ; RV64IXTHEADBB-LABEL: imm_50394234880:
1940 ; RV64IXTHEADBB: # %bb.0:
1941 ; RV64IXTHEADBB-NEXT: lui a0, 188
1942 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1093
1943 ; RV64IXTHEADBB-NEXT: slli a0, a0, 16
1944 ; RV64IXTHEADBB-NEXT: ret
1945 ret i64 50394234880
1946 }
1948 define i64 @imm_12900936431479() {
1949 ; RV64I-LABEL: imm_12900936431479:
1950 ; RV64I: # %bb.0:
1951 ; RV64I-NEXT: lui a0, 192239
1952 ; RV64I-NEXT: slli a0, a0, 2
1953 ; RV64I-NEXT: addi a0, a0, -1093
1954 ; RV64I-NEXT: slli a0, a0, 12
1955 ; RV64I-NEXT: addi a0, a0, 1911
1956 ; RV64I-NEXT: ret
1957 ;
1958 ; RV64IZBA-LABEL: imm_12900936431479:
1959 ; RV64IZBA: # %bb.0:
1960 ; RV64IZBA-NEXT: lui a0, 768956
1961 ; RV64IZBA-NEXT: addi a0, a0, -1093
1962 ; RV64IZBA-NEXT: slli.uw a0, a0, 12
1963 ; RV64IZBA-NEXT: addi a0, a0, 1911
1964 ; RV64IZBA-NEXT: ret
1965 ;
1966 ; RV64IZBB-LABEL: imm_12900936431479:
1967 ; RV64IZBB: # %bb.0:
1968 ; RV64IZBB-NEXT: lui a0, 192239
1969 ; RV64IZBB-NEXT: slli a0, a0, 2
1970 ; RV64IZBB-NEXT: addi a0, a0, -1093
1971 ; RV64IZBB-NEXT: slli a0, a0, 12
1972 ; RV64IZBB-NEXT: addi a0, a0, 1911
1973 ; RV64IZBB-NEXT: ret
1974 ;
1975 ; RV64IZBS-LABEL: imm_12900936431479:
1976 ; RV64IZBS: # %bb.0:
1977 ; RV64IZBS-NEXT: lui a0, 192239
1978 ; RV64IZBS-NEXT: slli a0, a0, 2
1979 ; RV64IZBS-NEXT: addi a0, a0, -1093
1980 ; RV64IZBS-NEXT: slli a0, a0, 12
1981 ; RV64IZBS-NEXT: addi a0, a0, 1911
1982 ; RV64IZBS-NEXT: ret
1983 ;
1984 ; RV64IXTHEADBB-LABEL: imm_12900936431479:
1985 ; RV64IXTHEADBB: # %bb.0:
1986 ; RV64IXTHEADBB-NEXT: lui a0, 192239
1987 ; RV64IXTHEADBB-NEXT: slli a0, a0, 2
1988 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1093
1989 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
1990 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1911
1991 ; RV64IXTHEADBB-NEXT: ret
1992 ret i64 12900936431479
1993 }
1995 define i64 @imm_12900918536874() {
1996 ; RV64I-LABEL: imm_12900918536874:
1997 ; RV64I: # %bb.0:
1998 ; RV64I-NEXT: lui a0, 384477
1999 ; RV64I-NEXT: addiw a0, a0, 1365
2000 ; RV64I-NEXT: slli a0, a0, 12
2001 ; RV64I-NEXT: addi a0, a0, 1365
2002 ; RV64I-NEXT: slli a0, a0, 1
2003 ; RV64I-NEXT: ret
2004 ;
2005 ; RV64IZBA-LABEL: imm_12900918536874:
2006 ; RV64IZBA: # %bb.0:
2007 ; RV64IZBA-NEXT: lui a0, 768955
2008 ; RV64IZBA-NEXT: addi a0, a0, -1365
2009 ; RV64IZBA-NEXT: slli.uw a0, a0, 12
2010 ; RV64IZBA-NEXT: addi a0, a0, -1366
2011 ; RV64IZBA-NEXT: ret
2012 ;
2013 ; RV64IZBB-LABEL: imm_12900918536874:
2014 ; RV64IZBB: # %bb.0:
2015 ; RV64IZBB-NEXT: lui a0, 384477
2016 ; RV64IZBB-NEXT: addiw a0, a0, 1365
2017 ; RV64IZBB-NEXT: slli a0, a0, 12
2018 ; RV64IZBB-NEXT: addi a0, a0, 1365
2019 ; RV64IZBB-NEXT: slli a0, a0, 1
2020 ; RV64IZBB-NEXT: ret
2021 ;
2022 ; RV64IZBS-LABEL: imm_12900918536874:
2023 ; RV64IZBS: # %bb.0:
2024 ; RV64IZBS-NEXT: lui a0, 384477
2025 ; RV64IZBS-NEXT: addiw a0, a0, 1365
2026 ; RV64IZBS-NEXT: slli a0, a0, 12
2027 ; RV64IZBS-NEXT: addi a0, a0, 1365
2028 ; RV64IZBS-NEXT: slli a0, a0, 1
2029 ; RV64IZBS-NEXT: ret
2030 ;
2031 ; RV64IXTHEADBB-LABEL: imm_12900918536874:
2032 ; RV64IXTHEADBB: # %bb.0:
2033 ; RV64IXTHEADBB-NEXT: lui a0, 384477
2034 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 1365
2035 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
2036 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1365
2037 ; RV64IXTHEADBB-NEXT: slli a0, a0, 1
2038 ; RV64IXTHEADBB-NEXT: ret
2039 ret i64 12900918536874
2040 }
2042 define i64 @imm_12900925247761() {
2043 ; RV64I-LABEL: imm_12900925247761:
2044 ; RV64I: # %bb.0:
2045 ; RV64I-NEXT: lui a0, 384478
2046 ; RV64I-NEXT: addiw a0, a0, -1911
2047 ; RV64I-NEXT: slli a0, a0, 13
2048 ; RV64I-NEXT: addi a0, a0, -2048
2049 ; RV64I-NEXT: addi a0, a0, -1775
2050 ; RV64I-NEXT: ret
2051 ;
2052 ; RV64IZBA-LABEL: imm_12900925247761:
2053 ; RV64IZBA: # %bb.0:
2054 ; RV64IZBA-NEXT: lui a0, 768955
2055 ; RV64IZBA-NEXT: addi a0, a0, 273
2056 ; RV64IZBA-NEXT: slli.uw a0, a0, 12
2057 ; RV64IZBA-NEXT: addi a0, a0, 273
2058 ; RV64IZBA-NEXT: ret
2059 ;
2060 ; RV64IZBB-LABEL: imm_12900925247761:
2061 ; RV64IZBB: # %bb.0:
2062 ; RV64IZBB-NEXT: lui a0, 384478
2063 ; RV64IZBB-NEXT: addiw a0, a0, -1911
2064 ; RV64IZBB-NEXT: slli a0, a0, 13
2065 ; RV64IZBB-NEXT: addi a0, a0, -2048
2066 ; RV64IZBB-NEXT: addi a0, a0, -1775
2067 ; RV64IZBB-NEXT: ret
2068 ;
2069 ; RV64IZBS-LABEL: imm_12900925247761:
2070 ; RV64IZBS: # %bb.0:
2071 ; RV64IZBS-NEXT: lui a0, 384478
2072 ; RV64IZBS-NEXT: addiw a0, a0, -1911
2073 ; RV64IZBS-NEXT: slli a0, a0, 13
2074 ; RV64IZBS-NEXT: addi a0, a0, -2048
2075 ; RV64IZBS-NEXT: addi a0, a0, -1775
2076 ; RV64IZBS-NEXT: ret
2077 ;
2078 ; RV64IXTHEADBB-LABEL: imm_12900925247761:
2079 ; RV64IXTHEADBB: # %bb.0:
2080 ; RV64IXTHEADBB-NEXT: lui a0, 384478
2081 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1911
2082 ; RV64IXTHEADBB-NEXT: slli a0, a0, 13
2083 ; RV64IXTHEADBB-NEXT: addi a0, a0, -2048
2084 ; RV64IXTHEADBB-NEXT: addi a0, a0, -1775
2085 ; RV64IXTHEADBB-NEXT: ret
2086 ret i64 12900925247761
2087 }
2089 define i64 @imm_7158272001() {
2090 ; RV64I-LABEL: imm_7158272001:
2091 ; RV64I: # %bb.0:
2092 ; RV64I-NEXT: lui a0, 427
2093 ; RV64I-NEXT: addiw a0, a0, -1367
2094 ; RV64I-NEXT: slli a0, a0, 12
2095 ; RV64I-NEXT: addi a0, a0, 1
2096 ; RV64I-NEXT: ret
2097 ;
2098 ; RV64IZBA-LABEL: imm_7158272001:
2099 ; RV64IZBA: # %bb.0:
2100 ; RV64IZBA-NEXT: lui a0, 349525
2101 ; RV64IZBA-NEXT: sh2add a0, a0, a0
2102 ; RV64IZBA-NEXT: addi a0, a0, 1
2103 ; RV64IZBA-NEXT: ret
2104 ;
2105 ; RV64IZBB-LABEL: imm_7158272001:
2106 ; RV64IZBB: # %bb.0:
2107 ; RV64IZBB-NEXT: lui a0, 427
2108 ; RV64IZBB-NEXT: addiw a0, a0, -1367
2109 ; RV64IZBB-NEXT: slli a0, a0, 12
2110 ; RV64IZBB-NEXT: addi a0, a0, 1
2111 ; RV64IZBB-NEXT: ret
2112 ;
2113 ; RV64IZBS-LABEL: imm_7158272001:
2114 ; RV64IZBS: # %bb.0:
2115 ; RV64IZBS-NEXT: lui a0, 427
2116 ; RV64IZBS-NEXT: addiw a0, a0, -1367
2117 ; RV64IZBS-NEXT: slli a0, a0, 12
2118 ; RV64IZBS-NEXT: addi a0, a0, 1
2119 ; RV64IZBS-NEXT: ret
2120 ;
2121 ; RV64IXTHEADBB-LABEL: imm_7158272001:
2122 ; RV64IXTHEADBB: # %bb.0:
2123 ; RV64IXTHEADBB-NEXT: lui a0, 427
2124 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1367
2125 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
2126 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1
2127 ; RV64IXTHEADBB-NEXT: ret
2128 ret i64 7158272001 ; 0x0000_0001_aaaa_9001
2129 }
2131 define i64 @imm_12884889601() {
2132 ; RV64I-LABEL: imm_12884889601:
2133 ; RV64I: # %bb.0:
2134 ; RV64I-NEXT: lui a0, 768
2135 ; RV64I-NEXT: addiw a0, a0, -3
2136 ; RV64I-NEXT: slli a0, a0, 12
2137 ; RV64I-NEXT: addi a0, a0, 1
2138 ; RV64I-NEXT: ret
2139 ;
2140 ; RV64IZBA-LABEL: imm_12884889601:
2141 ; RV64IZBA: # %bb.0:
2142 ; RV64IZBA-NEXT: lui a0, 349525
2143 ; RV64IZBA-NEXT: sh3add a0, a0, a0
2144 ; RV64IZBA-NEXT: addi a0, a0, 1
2145 ; RV64IZBA-NEXT: ret
2146 ;
2147 ; RV64IZBB-LABEL: imm_12884889601:
2148 ; RV64IZBB: # %bb.0:
2149 ; RV64IZBB-NEXT: lui a0, 768
2150 ; RV64IZBB-NEXT: addiw a0, a0, -3
2151 ; RV64IZBB-NEXT: slli a0, a0, 12
2152 ; RV64IZBB-NEXT: addi a0, a0, 1
2153 ; RV64IZBB-NEXT: ret
2154 ;
2155 ; RV64IZBS-LABEL: imm_12884889601:
2156 ; RV64IZBS: # %bb.0:
2157 ; RV64IZBS-NEXT: lui a0, 768
2158 ; RV64IZBS-NEXT: addiw a0, a0, -3
2159 ; RV64IZBS-NEXT: slli a0, a0, 12
2160 ; RV64IZBS-NEXT: addi a0, a0, 1
2161 ; RV64IZBS-NEXT: ret
2162 ;
2163 ; RV64IXTHEADBB-LABEL: imm_12884889601:
2164 ; RV64IXTHEADBB: # %bb.0:
2165 ; RV64IXTHEADBB-NEXT: lui a0, 768
2166 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -3
2167 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
2168 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1
2169 ; RV64IXTHEADBB-NEXT: ret
2170 ret i64 12884889601 ; 0x0000_0002_ffff_d001
2171 }
2173 define i64 @imm_neg_3435982847() {
2174 ; RV64I-LABEL: imm_neg_3435982847:
2175 ; RV64I: # %bb.0:
2176 ; RV64I-NEXT: lui a0, 1048371
2177 ; RV64I-NEXT: addiw a0, a0, 817
2178 ; RV64I-NEXT: slli a0, a0, 12
2179 ; RV64I-NEXT: addi a0, a0, 1
2180 ; RV64I-NEXT: ret
2181 ;
2182 ; RV64IZBA-LABEL: imm_neg_3435982847:
2183 ; RV64IZBA: # %bb.0:
2184 ; RV64IZBA-NEXT: lui a0, 768955
2185 ; RV64IZBA-NEXT: sh1add a0, a0, a0
2186 ; RV64IZBA-NEXT: addi a0, a0, 1
2187 ; RV64IZBA-NEXT: ret
2188 ;
2189 ; RV64IZBB-LABEL: imm_neg_3435982847:
2190 ; RV64IZBB: # %bb.0:
2191 ; RV64IZBB-NEXT: lui a0, 1048371
2192 ; RV64IZBB-NEXT: addiw a0, a0, 817
2193 ; RV64IZBB-NEXT: slli a0, a0, 12
2194 ; RV64IZBB-NEXT: addi a0, a0, 1
2195 ; RV64IZBB-NEXT: ret
2196 ;
2197 ; RV64IZBS-LABEL: imm_neg_3435982847:
2198 ; RV64IZBS: # %bb.0:
2199 ; RV64IZBS-NEXT: lui a0, 734001
2200 ; RV64IZBS-NEXT: addiw a0, a0, 1
2201 ; RV64IZBS-NEXT: bclri a0, a0, 31
2202 ; RV64IZBS-NEXT: ret
2203 ;
2204 ; RV64IXTHEADBB-LABEL: imm_neg_3435982847:
2205 ; RV64IXTHEADBB: # %bb.0:
2206 ; RV64IXTHEADBB-NEXT: lui a0, 1048371
2207 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 817
2208 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
2209 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1
2210 ; RV64IXTHEADBB-NEXT: ret
2211 ret i64 -3435982847 ; 0xffff_ffff_3333_1001
2212 }
2214 define i64 @imm_neg_5726842879() {
2215 ; RV64I-LABEL: imm_neg_5726842879:
2216 ; RV64I: # %bb.0:
2217 ; RV64I-NEXT: lui a0, 1048235
2218 ; RV64I-NEXT: addiw a0, a0, -1419
2219 ; RV64I-NEXT: slli a0, a0, 12
2220 ; RV64I-NEXT: addi a0, a0, 1
2221 ; RV64I-NEXT: ret
2222 ;
2223 ; RV64IZBA-LABEL: imm_neg_5726842879:
2224 ; RV64IZBA: # %bb.0:
2225 ; RV64IZBA-NEXT: lui a0, 768945
2226 ; RV64IZBA-NEXT: sh2add a0, a0, a0
2227 ; RV64IZBA-NEXT: addi a0, a0, 1
2228 ; RV64IZBA-NEXT: ret
2229 ;
2230 ; RV64IZBB-LABEL: imm_neg_5726842879:
2231 ; RV64IZBB: # %bb.0:
2232 ; RV64IZBB-NEXT: lui a0, 1048235
2233 ; RV64IZBB-NEXT: addiw a0, a0, -1419
2234 ; RV64IZBB-NEXT: slli a0, a0, 12
2235 ; RV64IZBB-NEXT: addi a0, a0, 1
2236 ; RV64IZBB-NEXT: ret
2237 ;
2238 ; RV64IZBS-LABEL: imm_neg_5726842879:
2239 ; RV64IZBS: # %bb.0:
2240 ; RV64IZBS-NEXT: lui a0, 698997
2241 ; RV64IZBS-NEXT: addiw a0, a0, 1
2242 ; RV64IZBS-NEXT: bclri a0, a0, 32
2243 ; RV64IZBS-NEXT: ret
2244 ;
2245 ; RV64IXTHEADBB-LABEL: imm_neg_5726842879:
2246 ; RV64IXTHEADBB: # %bb.0:
2247 ; RV64IXTHEADBB-NEXT: lui a0, 1048235
2248 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1419
2249 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
2250 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1
2251 ; RV64IXTHEADBB-NEXT: ret
2252 ret i64 -5726842879 ; 0xffff_fffe_aaa7_5001
2253 }
2255 define i64 @imm_neg_10307948543() {
2256 ; RV64I-LABEL: imm_neg_10307948543:
2257 ; RV64I: # %bb.0:
2258 ; RV64I-NEXT: lui a0, 1047962
2259 ; RV64I-NEXT: addiw a0, a0, -1645
2260 ; RV64I-NEXT: slli a0, a0, 12
2261 ; RV64I-NEXT: addi a0, a0, 1
2262 ; RV64I-NEXT: ret
2263 ;
2264 ; RV64IZBA-LABEL: imm_neg_10307948543:
2265 ; RV64IZBA: # %bb.0:
2266 ; RV64IZBA-NEXT: lui a0, 768955
2267 ; RV64IZBA-NEXT: sh3add a0, a0, a0
2268 ; RV64IZBA-NEXT: addi a0, a0, 1
2269 ; RV64IZBA-NEXT: ret
2270 ;
2271 ; RV64IZBB-LABEL: imm_neg_10307948543:
2272 ; RV64IZBB: # %bb.0:
2273 ; RV64IZBB-NEXT: lui a0, 1047962
2274 ; RV64IZBB-NEXT: addiw a0, a0, -1645
2275 ; RV64IZBB-NEXT: slli a0, a0, 12
2276 ; RV64IZBB-NEXT: addi a0, a0, 1
2277 ; RV64IZBB-NEXT: ret
2278 ;
2279 ; RV64IZBS-LABEL: imm_neg_10307948543:
2280 ; RV64IZBS: # %bb.0:
2281 ; RV64IZBS-NEXT: lui a0, 629139
2282 ; RV64IZBS-NEXT: addiw a0, a0, 1
2283 ; RV64IZBS-NEXT: bclri a0, a0, 33
2284 ; RV64IZBS-NEXT: ret
2285 ;
2286 ; RV64IXTHEADBB-LABEL: imm_neg_10307948543:
2287 ; RV64IXTHEADBB: # %bb.0:
2288 ; RV64IXTHEADBB-NEXT: lui a0, 1047962
2289 ; RV64IXTHEADBB-NEXT: addiw a0, a0, -1645
2290 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
2291 ; RV64IXTHEADBB-NEXT: addi a0, a0, 1
2292 ; RV64IXTHEADBB-NEXT: ret
2293 ret i64 -10307948543 ; 0xffff_fffd_9999_3001
2294 }
2296 define i64 @li_rori_1() {
2297 ; RV64I-LABEL: li_rori_1:
2298 ; RV64I: # %bb.0:
2299 ; RV64I-NEXT: li a0, -17
2300 ; RV64I-NEXT: slli a0, a0, 43
2301 ; RV64I-NEXT: addi a0, a0, -1
2302 ; RV64I-NEXT: ret
2303 ;
2304 ; RV64IZBA-LABEL: li_rori_1:
2305 ; RV64IZBA: # %bb.0:
2306 ; RV64IZBA-NEXT: li a0, -17
2307 ; RV64IZBA-NEXT: slli a0, a0, 43
2308 ; RV64IZBA-NEXT: addi a0, a0, -1
2309 ; RV64IZBA-NEXT: ret
2310 ;
2311 ; RV64IZBB-LABEL: li_rori_1:
2312 ; RV64IZBB: # %bb.0:
2313 ; RV64IZBB-NEXT: li a0, -18
2314 ; RV64IZBB-NEXT: rori a0, a0, 21
2315 ; RV64IZBB-NEXT: ret
2316 ;
2317 ; RV64IZBS-LABEL: li_rori_1:
2318 ; RV64IZBS: # %bb.0:
2319 ; RV64IZBS-NEXT: li a0, -17
2320 ; RV64IZBS-NEXT: slli a0, a0, 43
2321 ; RV64IZBS-NEXT: addi a0, a0, -1
2322 ; RV64IZBS-NEXT: ret
2323 ;
2324 ; RV64IXTHEADBB-LABEL: li_rori_1:
2325 ; RV64IXTHEADBB: # %bb.0:
2326 ; RV64IXTHEADBB-NEXT: li a0, -18
2327 ; RV64IXTHEADBB-NEXT: th.srri a0, a0, 21
2328 ; RV64IXTHEADBB-NEXT: ret
2329 ret i64 -149533581377537
2330 }
2332 define i64 @li_rori_2() {
2333 ; RV64I-LABEL: li_rori_2:
2334 ; RV64I: # %bb.0:
2335 ; RV64I-NEXT: li a0, -5
2336 ; RV64I-NEXT: slli a0, a0, 60
2337 ; RV64I-NEXT: addi a0, a0, -6
2338 ; RV64I-NEXT: ret
2339 ;
2340 ; RV64IZBA-LABEL: li_rori_2:
2341 ; RV64IZBA: # %bb.0:
2342 ; RV64IZBA-NEXT: li a0, -5
2343 ; RV64IZBA-NEXT: slli a0, a0, 60
2344 ; RV64IZBA-NEXT: addi a0, a0, -6
2345 ; RV64IZBA-NEXT: ret
2346 ;
2347 ; RV64IZBB-LABEL: li_rori_2:
2348 ; RV64IZBB: # %bb.0:
2349 ; RV64IZBB-NEXT: li a0, -86
2350 ; RV64IZBB-NEXT: rori a0, a0, 4
2351 ; RV64IZBB-NEXT: ret
2352 ;
2353 ; RV64IZBS-LABEL: li_rori_2:
2354 ; RV64IZBS: # %bb.0:
2355 ; RV64IZBS-NEXT: li a0, -5
2356 ; RV64IZBS-NEXT: slli a0, a0, 60
2357 ; RV64IZBS-NEXT: addi a0, a0, -6
2358 ; RV64IZBS-NEXT: ret
2359 ;
2360 ; RV64IXTHEADBB-LABEL: li_rori_2:
2361 ; RV64IXTHEADBB: # %bb.0:
2362 ; RV64IXTHEADBB-NEXT: li a0, -86
2363 ; RV64IXTHEADBB-NEXT: th.srri a0, a0, 4
2364 ; RV64IXTHEADBB-NEXT: ret
2365 ret i64 -5764607523034234886
2366 }
2368 define i64 @li_rori_3() {
2369 ; RV64I-LABEL: li_rori_3:
2370 ; RV64I: # %bb.0:
2371 ; RV64I-NEXT: li a0, -17
2372 ; RV64I-NEXT: slli a0, a0, 27
2373 ; RV64I-NEXT: addi a0, a0, -1
2374 ; RV64I-NEXT: ret
2375 ;
2376 ; RV64IZBA-LABEL: li_rori_3:
2377 ; RV64IZBA: # %bb.0:
2378 ; RV64IZBA-NEXT: li a0, -17
2379 ; RV64IZBA-NEXT: slli a0, a0, 27
2380 ; RV64IZBA-NEXT: addi a0, a0, -1
2381 ; RV64IZBA-NEXT: ret
2382 ;
2383 ; RV64IZBB-LABEL: li_rori_3:
2384 ; RV64IZBB: # %bb.0:
2385 ; RV64IZBB-NEXT: li a0, -18
2386 ; RV64IZBB-NEXT: rori a0, a0, 37
2387 ; RV64IZBB-NEXT: ret
2388 ;
2389 ; RV64IZBS-LABEL: li_rori_3:
2390 ; RV64IZBS: # %bb.0:
2391 ; RV64IZBS-NEXT: li a0, -17
2392 ; RV64IZBS-NEXT: slli a0, a0, 27
2393 ; RV64IZBS-NEXT: addi a0, a0, -1
2394 ; RV64IZBS-NEXT: ret
2395 ;
2396 ; RV64IXTHEADBB-LABEL: li_rori_3:
2397 ; RV64IXTHEADBB: # %bb.0:
2398 ; RV64IXTHEADBB-NEXT: li a0, -18
2399 ; RV64IXTHEADBB-NEXT: th.srri a0, a0, 37
2400 ; RV64IXTHEADBB-NEXT: ret
2401 ret i64 -2281701377
2402 }
2404 ; This used to assert when compiled with Zba.
2405 define i64 @PR54812() {
2406 ; RV64I-LABEL: PR54812:
2407 ; RV64I: # %bb.0:
2408 ; RV64I-NEXT: lui a0, 1048447
2409 ; RV64I-NEXT: addiw a0, a0, 1407
2410 ; RV64I-NEXT: slli a0, a0, 12
2411 ; RV64I-NEXT: ret
2412 ;
2413 ; RV64IZBA-LABEL: PR54812:
2414 ; RV64IZBA: # %bb.0:
2415 ; RV64IZBA-NEXT: lui a0, 872917
2416 ; RV64IZBA-NEXT: sh1add a0, a0, a0
2417 ; RV64IZBA-NEXT: ret
2418 ;
2419 ; RV64IZBB-LABEL: PR54812:
2420 ; RV64IZBB: # %bb.0:
2421 ; RV64IZBB-NEXT: lui a0, 1048447
2422 ; RV64IZBB-NEXT: addiw a0, a0, 1407
2423 ; RV64IZBB-NEXT: slli a0, a0, 12
2424 ; RV64IZBB-NEXT: ret
2425 ;
2426 ; RV64IZBS-LABEL: PR54812:
2427 ; RV64IZBS: # %bb.0:
2428 ; RV64IZBS-NEXT: lui a0, 1045887
2429 ; RV64IZBS-NEXT: bclri a0, a0, 31
2430 ; RV64IZBS-NEXT: ret
2431 ;
2432 ; RV64IXTHEADBB-LABEL: PR54812:
2433 ; RV64IXTHEADBB: # %bb.0:
2434 ; RV64IXTHEADBB-NEXT: lui a0, 1048447
2435 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 1407
2436 ; RV64IXTHEADBB-NEXT: slli a0, a0, 12
2437 ; RV64IXTHEADBB-NEXT: ret
2438 ret i64 -2158497792;
2439 }
2441 define signext i32 @pos_2048() nounwind {
2442 ; RV64I-LABEL: pos_2048:
2443 ; RV64I: # %bb.0:
2444 ; RV64I-NEXT: li a0, 1
2445 ; RV64I-NEXT: slli a0, a0, 11
2446 ; RV64I-NEXT: ret
2447 ;
2448 ; RV64IZBA-LABEL: pos_2048:
2449 ; RV64IZBA: # %bb.0:
2450 ; RV64IZBA-NEXT: li a0, 1
2451 ; RV64IZBA-NEXT: slli a0, a0, 11
2452 ; RV64IZBA-NEXT: ret
2453 ;
2454 ; RV64IZBB-LABEL: pos_2048:
2455 ; RV64IZBB: # %bb.0:
2456 ; RV64IZBB-NEXT: li a0, 1
2457 ; RV64IZBB-NEXT: slli a0, a0, 11
2458 ; RV64IZBB-NEXT: ret
2459 ;
2460 ; RV64IZBS-LABEL: pos_2048:
2461 ; RV64IZBS: # %bb.0:
2462 ; RV64IZBS-NEXT: bseti a0, zero, 11
2463 ; RV64IZBS-NEXT: ret
2464 ;
2465 ; RV64IXTHEADBB-LABEL: pos_2048:
2466 ; RV64IXTHEADBB: # %bb.0:
2467 ; RV64IXTHEADBB-NEXT: li a0, 1
2468 ; RV64IXTHEADBB-NEXT: slli a0, a0, 11
2469 ; RV64IXTHEADBB-NEXT: ret
2470 ret i32 2048
2471 }
2473 define i64 @imm64_same_lo_hi() nounwind {
2474 ; RV64I-LABEL: imm64_same_lo_hi:
2475 ; RV64I: # %bb.0:
2476 ; RV64I-NEXT: lui a0, 65793
2477 ; RV64I-NEXT: addiw a0, a0, 16
2478 ; RV64I-NEXT: slli a1, a0, 32
2479 ; RV64I-NEXT: add a0, a0, a1
2480 ; RV64I-NEXT: ret
2481 ;
2482 ; RV64IZBA-LABEL: imm64_same_lo_hi:
2483 ; RV64IZBA: # %bb.0:
2484 ; RV64IZBA-NEXT: lui a0, 65793
2485 ; RV64IZBA-NEXT: addiw a0, a0, 16
2486 ; RV64IZBA-NEXT: slli a1, a0, 32
2487 ; RV64IZBA-NEXT: add a0, a0, a1
2488 ; RV64IZBA-NEXT: ret
2489 ;
2490 ; RV64IZBB-LABEL: imm64_same_lo_hi:
2491 ; RV64IZBB: # %bb.0:
2492 ; RV64IZBB-NEXT: lui a0, 65793
2493 ; RV64IZBB-NEXT: addiw a0, a0, 16
2494 ; RV64IZBB-NEXT: slli a1, a0, 32
2495 ; RV64IZBB-NEXT: add a0, a0, a1
2496 ; RV64IZBB-NEXT: ret
2497 ;
2498 ; RV64IZBS-LABEL: imm64_same_lo_hi:
2499 ; RV64IZBS: # %bb.0:
2500 ; RV64IZBS-NEXT: lui a0, 65793
2501 ; RV64IZBS-NEXT: addiw a0, a0, 16
2502 ; RV64IZBS-NEXT: slli a1, a0, 32
2503 ; RV64IZBS-NEXT: add a0, a0, a1
2504 ; RV64IZBS-NEXT: ret
2505 ;
2506 ; RV64IXTHEADBB-LABEL: imm64_same_lo_hi:
2507 ; RV64IXTHEADBB: # %bb.0:
2508 ; RV64IXTHEADBB-NEXT: lui a0, 65793
2509 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 16
2510 ; RV64IXTHEADBB-NEXT: slli a1, a0, 32
2511 ; RV64IXTHEADBB-NEXT: add a0, a0, a1
2512 ; RV64IXTHEADBB-NEXT: ret
2513 ret i64 1157442765409226768 ; 0x0101010101010101
2514 }
2516 ; Same as above with optsize. Make sure we use constant pool on RV64
2517 define i64 @imm64_same_lo_hi_optsize() nounwind optsize {
2518 ; RV64-NOPOOL-LABEL: imm64_same_lo_hi_optsize:
2519 ; RV64-NOPOOL: # %bb.0:
2520 ; RV64-NOPOOL-NEXT: lui a0, 65793
2521 ; RV64-NOPOOL-NEXT: addiw a0, a0, 16
2522 ; RV64-NOPOOL-NEXT: slli a1, a0, 32
2523 ; RV64-NOPOOL-NEXT: add a0, a0, a1
2524 ; RV64-NOPOOL-NEXT: ret
2525 ;
2526 ; RV64I-POOL-LABEL: imm64_same_lo_hi_optsize:
2527 ; RV64I-POOL: # %bb.0:
2528 ; RV64I-POOL-NEXT: lui a0, %hi(.LCPI64_0)
2529 ; RV64I-POOL-NEXT: ld a0, %lo(.LCPI64_0)(a0)
2530 ; RV64I-POOL-NEXT: ret
2531 ;
2532 ; RV64IZBA-LABEL: imm64_same_lo_hi_optsize:
2533 ; RV64IZBA: # %bb.0:
2534 ; RV64IZBA-NEXT: lui a0, 65793
2535 ; RV64IZBA-NEXT: addiw a0, a0, 16
2536 ; RV64IZBA-NEXT: slli a1, a0, 32
2537 ; RV64IZBA-NEXT: add a0, a0, a1
2538 ; RV64IZBA-NEXT: ret
2539 ;
2540 ; RV64IZBB-LABEL: imm64_same_lo_hi_optsize:
2541 ; RV64IZBB: # %bb.0:
2542 ; RV64IZBB-NEXT: lui a0, 65793
2543 ; RV64IZBB-NEXT: addiw a0, a0, 16
2544 ; RV64IZBB-NEXT: slli a1, a0, 32
2545 ; RV64IZBB-NEXT: add a0, a0, a1
2546 ; RV64IZBB-NEXT: ret
2547 ;
2548 ; RV64IZBS-LABEL: imm64_same_lo_hi_optsize:
2549 ; RV64IZBS: # %bb.0:
2550 ; RV64IZBS-NEXT: lui a0, 65793
2551 ; RV64IZBS-NEXT: addiw a0, a0, 16
2552 ; RV64IZBS-NEXT: slli a1, a0, 32
2553 ; RV64IZBS-NEXT: add a0, a0, a1
2554 ; RV64IZBS-NEXT: ret
2555 ;
2556 ; RV64IXTHEADBB-LABEL: imm64_same_lo_hi_optsize:
2557 ; RV64IXTHEADBB: # %bb.0:
2558 ; RV64IXTHEADBB-NEXT: lui a0, 65793
2559 ; RV64IXTHEADBB-NEXT: addiw a0, a0, 16
2560 ; RV64IXTHEADBB-NEXT: slli a1, a0, 32
2561 ; RV64IXTHEADBB-NEXT: add a0, a0, a1
2562 ; RV64IXTHEADBB-NEXT: ret
2563 ret i64 1157442765409226768 ; 0x0101010101010101
2564 }