1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v -target-abi=ilp32d \
3 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v -target-abi=lp64d \
5 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
6 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=ilp32d \
7 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
8 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=lp64d \
9 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
11 declare <2 x half> @llvm.vp.roundtozero.v2f16(<2 x half>, <2 x i1>, i32)
13 define <2 x half> @vp_roundtozero_v2f16(<2 x half> %va, <2 x i1> %m, i32 zeroext %evl) {
14 ; ZVFH-LABEL: vp_roundtozero_v2f16:
16 ; ZVFH-NEXT: lui a1, %hi(.LCPI0_0)
17 ; ZVFH-NEXT: flh fa5, %lo(.LCPI0_0)(a1)
18 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
19 ; ZVFH-NEXT: vfabs.v v9, v8, v0.t
20 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
21 ; ZVFH-NEXT: vmflt.vf v0, v9, fa5, v0.t
22 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
23 ; ZVFH-NEXT: fsrmi a0, 1
24 ; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t
26 ; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t
27 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
28 ; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t
31 ; ZVFHMIN-LABEL: vp_roundtozero_v2f16:
33 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
34 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
35 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
36 ; ZVFHMIN-NEXT: vfabs.v v8, v9, v0.t
37 ; ZVFHMIN-NEXT: lui a0, 307200
38 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
39 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
40 ; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5, v0.t
41 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
42 ; ZVFHMIN-NEXT: fsrmi a0, 1
43 ; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v9, v0.t
44 ; ZVFHMIN-NEXT: fsrm a0
45 ; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t
46 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
47 ; ZVFHMIN-NEXT: vfsgnj.vv v9, v8, v9, v0.t
48 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
49 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
51 %v = call <2 x half> @llvm.vp.roundtozero.v2f16(<2 x half> %va, <2 x i1> %m, i32 %evl)
55 define <2 x half> @vp_roundtozero_v2f16_unmasked(<2 x half> %va, i32 zeroext %evl) {
56 ; ZVFH-LABEL: vp_roundtozero_v2f16_unmasked:
58 ; ZVFH-NEXT: lui a1, %hi(.LCPI1_0)
59 ; ZVFH-NEXT: flh fa5, %lo(.LCPI1_0)(a1)
60 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
61 ; ZVFH-NEXT: vfabs.v v9, v8
62 ; ZVFH-NEXT: vmflt.vf v0, v9, fa5
63 ; ZVFH-NEXT: fsrmi a0, 1
64 ; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t
66 ; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t
67 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
68 ; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t
71 ; ZVFHMIN-LABEL: vp_roundtozero_v2f16_unmasked:
73 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
74 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
75 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
76 ; ZVFHMIN-NEXT: vfabs.v v8, v9
77 ; ZVFHMIN-NEXT: lui a0, 307200
78 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
79 ; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5
80 ; ZVFHMIN-NEXT: fsrmi a0, 1
81 ; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v9, v0.t
82 ; ZVFHMIN-NEXT: fsrm a0
83 ; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t
84 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
85 ; ZVFHMIN-NEXT: vfsgnj.vv v9, v8, v9, v0.t
86 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
87 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
89 %head = insertelement <2 x i1> poison, i1 true, i32 0
90 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
91 %v = call <2 x half> @llvm.vp.roundtozero.v2f16(<2 x half> %va, <2 x i1> %m, i32 %evl)
95 declare <4 x half> @llvm.vp.roundtozero.v4f16(<4 x half>, <4 x i1>, i32)
97 define <4 x half> @vp_roundtozero_v4f16(<4 x half> %va, <4 x i1> %m, i32 zeroext %evl) {
98 ; ZVFH-LABEL: vp_roundtozero_v4f16:
100 ; ZVFH-NEXT: lui a1, %hi(.LCPI2_0)
101 ; ZVFH-NEXT: flh fa5, %lo(.LCPI2_0)(a1)
102 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
103 ; ZVFH-NEXT: vfabs.v v9, v8, v0.t
104 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
105 ; ZVFH-NEXT: vmflt.vf v0, v9, fa5, v0.t
106 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
107 ; ZVFH-NEXT: fsrmi a0, 1
108 ; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t
110 ; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t
111 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
112 ; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t
115 ; ZVFHMIN-LABEL: vp_roundtozero_v4f16:
117 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
118 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
119 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma
120 ; ZVFHMIN-NEXT: vfabs.v v8, v9, v0.t
121 ; ZVFHMIN-NEXT: lui a0, 307200
122 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
123 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, mu
124 ; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5, v0.t
125 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
126 ; ZVFHMIN-NEXT: fsrmi a0, 1
127 ; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v9, v0.t
128 ; ZVFHMIN-NEXT: fsrm a0
129 ; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t
130 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, mu
131 ; ZVFHMIN-NEXT: vfsgnj.vv v9, v8, v9, v0.t
132 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
133 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
135 %v = call <4 x half> @llvm.vp.roundtozero.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)
139 define <4 x half> @vp_roundtozero_v4f16_unmasked(<4 x half> %va, i32 zeroext %evl) {
140 ; ZVFH-LABEL: vp_roundtozero_v4f16_unmasked:
142 ; ZVFH-NEXT: lui a1, %hi(.LCPI3_0)
143 ; ZVFH-NEXT: flh fa5, %lo(.LCPI3_0)(a1)
144 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
145 ; ZVFH-NEXT: vfabs.v v9, v8
146 ; ZVFH-NEXT: vmflt.vf v0, v9, fa5
147 ; ZVFH-NEXT: fsrmi a0, 1
148 ; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t
150 ; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t
151 ; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
152 ; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t
155 ; ZVFHMIN-LABEL: vp_roundtozero_v4f16_unmasked:
157 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
158 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
159 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma
160 ; ZVFHMIN-NEXT: vfabs.v v8, v9
161 ; ZVFHMIN-NEXT: lui a0, 307200
162 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
163 ; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5
164 ; ZVFHMIN-NEXT: fsrmi a0, 1
165 ; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v9, v0.t
166 ; ZVFHMIN-NEXT: fsrm a0
167 ; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t
168 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, mu
169 ; ZVFHMIN-NEXT: vfsgnj.vv v9, v8, v9, v0.t
170 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
171 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
173 %head = insertelement <4 x i1> poison, i1 true, i32 0
174 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
175 %v = call <4 x half> @llvm.vp.roundtozero.v4f16(<4 x half> %va, <4 x i1> %m, i32 %evl)
179 declare <8 x half> @llvm.vp.roundtozero.v8f16(<8 x half>, <8 x i1>, i32)
181 define <8 x half> @vp_roundtozero_v8f16(<8 x half> %va, <8 x i1> %m, i32 zeroext %evl) {
182 ; ZVFH-LABEL: vp_roundtozero_v8f16:
184 ; ZVFH-NEXT: lui a1, %hi(.LCPI4_0)
185 ; ZVFH-NEXT: flh fa5, %lo(.LCPI4_0)(a1)
186 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
187 ; ZVFH-NEXT: vfabs.v v9, v8, v0.t
188 ; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, mu
189 ; ZVFH-NEXT: vmflt.vf v0, v9, fa5, v0.t
190 ; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, ma
191 ; ZVFH-NEXT: fsrmi a0, 1
192 ; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t
194 ; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t
195 ; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, mu
196 ; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t
199 ; ZVFHMIN-LABEL: vp_roundtozero_v8f16:
201 ; ZVFHMIN-NEXT: vmv1r.v v9, v0
202 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
203 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8
204 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma
205 ; ZVFHMIN-NEXT: vfabs.v v12, v10, v0.t
206 ; ZVFHMIN-NEXT: lui a0, 307200
207 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
208 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, mu
209 ; ZVFHMIN-NEXT: vmflt.vf v9, v12, fa5, v0.t
210 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
211 ; ZVFHMIN-NEXT: fsrmi a0, 1
212 ; ZVFHMIN-NEXT: vmv1r.v v0, v9
213 ; ZVFHMIN-NEXT: vfcvt.x.f.v v12, v10, v0.t
214 ; ZVFHMIN-NEXT: fsrm a0
215 ; ZVFHMIN-NEXT: vfcvt.f.x.v v12, v12, v0.t
216 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, mu
217 ; ZVFHMIN-NEXT: vfsgnj.vv v10, v12, v10, v0.t
218 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
219 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10
221 %v = call <8 x half> @llvm.vp.roundtozero.v8f16(<8 x half> %va, <8 x i1> %m, i32 %evl)
225 define <8 x half> @vp_roundtozero_v8f16_unmasked(<8 x half> %va, i32 zeroext %evl) {
226 ; ZVFH-LABEL: vp_roundtozero_v8f16_unmasked:
228 ; ZVFH-NEXT: lui a1, %hi(.LCPI5_0)
229 ; ZVFH-NEXT: flh fa5, %lo(.LCPI5_0)(a1)
230 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
231 ; ZVFH-NEXT: vfabs.v v9, v8
232 ; ZVFH-NEXT: vmflt.vf v0, v9, fa5
233 ; ZVFH-NEXT: fsrmi a0, 1
234 ; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t
236 ; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t
237 ; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, mu
238 ; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t
241 ; ZVFHMIN-LABEL: vp_roundtozero_v8f16_unmasked:
243 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
244 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8
245 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma
246 ; ZVFHMIN-NEXT: vfabs.v v8, v10
247 ; ZVFHMIN-NEXT: lui a0, 307200
248 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
249 ; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5
250 ; ZVFHMIN-NEXT: fsrmi a0, 1
251 ; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v10, v0.t
252 ; ZVFHMIN-NEXT: fsrm a0
253 ; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t
254 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, mu
255 ; ZVFHMIN-NEXT: vfsgnj.vv v10, v8, v10, v0.t
256 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
257 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10
259 %head = insertelement <8 x i1> poison, i1 true, i32 0
260 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
261 %v = call <8 x half> @llvm.vp.roundtozero.v8f16(<8 x half> %va, <8 x i1> %m, i32 %evl)
265 declare <16 x half> @llvm.vp.roundtozero.v16f16(<16 x half>, <16 x i1>, i32)
267 define <16 x half> @vp_roundtozero_v16f16(<16 x half> %va, <16 x i1> %m, i32 zeroext %evl) {
268 ; ZVFH-LABEL: vp_roundtozero_v16f16:
270 ; ZVFH-NEXT: vmv1r.v v10, v0
271 ; ZVFH-NEXT: lui a1, %hi(.LCPI6_0)
272 ; ZVFH-NEXT: flh fa5, %lo(.LCPI6_0)(a1)
273 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
274 ; ZVFH-NEXT: vfabs.v v12, v8, v0.t
275 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, mu
276 ; ZVFH-NEXT: vmflt.vf v10, v12, fa5, v0.t
277 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma
278 ; ZVFH-NEXT: fsrmi a0, 1
279 ; ZVFH-NEXT: vmv1r.v v0, v10
280 ; ZVFH-NEXT: vfcvt.x.f.v v12, v8, v0.t
282 ; ZVFH-NEXT: vfcvt.f.x.v v12, v12, v0.t
283 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, mu
284 ; ZVFH-NEXT: vfsgnj.vv v8, v12, v8, v0.t
287 ; ZVFHMIN-LABEL: vp_roundtozero_v16f16:
289 ; ZVFHMIN-NEXT: vmv1r.v v10, v0
290 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
291 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8
292 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m4, ta, ma
293 ; ZVFHMIN-NEXT: vfabs.v v16, v12, v0.t
294 ; ZVFHMIN-NEXT: lui a0, 307200
295 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
296 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, mu
297 ; ZVFHMIN-NEXT: vmflt.vf v10, v16, fa5, v0.t
298 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
299 ; ZVFHMIN-NEXT: fsrmi a0, 1
300 ; ZVFHMIN-NEXT: vmv1r.v v0, v10
301 ; ZVFHMIN-NEXT: vfcvt.x.f.v v16, v12, v0.t
302 ; ZVFHMIN-NEXT: fsrm a0
303 ; ZVFHMIN-NEXT: vfcvt.f.x.v v16, v16, v0.t
304 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, mu
305 ; ZVFHMIN-NEXT: vfsgnj.vv v12, v16, v12, v0.t
306 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
307 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12
309 %v = call <16 x half> @llvm.vp.roundtozero.v16f16(<16 x half> %va, <16 x i1> %m, i32 %evl)
313 define <16 x half> @vp_roundtozero_v16f16_unmasked(<16 x half> %va, i32 zeroext %evl) {
314 ; ZVFH-LABEL: vp_roundtozero_v16f16_unmasked:
316 ; ZVFH-NEXT: lui a1, %hi(.LCPI7_0)
317 ; ZVFH-NEXT: flh fa5, %lo(.LCPI7_0)(a1)
318 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
319 ; ZVFH-NEXT: vfabs.v v10, v8
320 ; ZVFH-NEXT: vmflt.vf v0, v10, fa5
321 ; ZVFH-NEXT: fsrmi a0, 1
322 ; ZVFH-NEXT: vfcvt.x.f.v v10, v8, v0.t
324 ; ZVFH-NEXT: vfcvt.f.x.v v10, v10, v0.t
325 ; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, mu
326 ; ZVFH-NEXT: vfsgnj.vv v8, v10, v8, v0.t
329 ; ZVFHMIN-LABEL: vp_roundtozero_v16f16_unmasked:
331 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
332 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8
333 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m4, ta, ma
334 ; ZVFHMIN-NEXT: vfabs.v v8, v12
335 ; ZVFHMIN-NEXT: lui a0, 307200
336 ; ZVFHMIN-NEXT: fmv.w.x fa5, a0
337 ; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5
338 ; ZVFHMIN-NEXT: fsrmi a0, 1
339 ; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v12, v0.t
340 ; ZVFHMIN-NEXT: fsrm a0
341 ; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t
342 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, mu
343 ; ZVFHMIN-NEXT: vfsgnj.vv v12, v8, v12, v0.t
344 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
345 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12
347 %head = insertelement <16 x i1> poison, i1 true, i32 0
348 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
349 %v = call <16 x half> @llvm.vp.roundtozero.v16f16(<16 x half> %va, <16 x i1> %m, i32 %evl)
353 declare <2 x float> @llvm.vp.roundtozero.v2f32(<2 x float>, <2 x i1>, i32)
355 define <2 x float> @vp_roundtozero_v2f32(<2 x float> %va, <2 x i1> %m, i32 zeroext %evl) {
356 ; CHECK-LABEL: vp_roundtozero_v2f32:
358 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
359 ; CHECK-NEXT: vfabs.v v9, v8, v0.t
360 ; CHECK-NEXT: lui a0, 307200
361 ; CHECK-NEXT: fmv.w.x fa5, a0
362 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
363 ; CHECK-NEXT: vmflt.vf v0, v9, fa5, v0.t
364 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
365 ; CHECK-NEXT: fsrmi a0, 1
366 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
367 ; CHECK-NEXT: fsrm a0
368 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
369 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
370 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
372 %v = call <2 x float> @llvm.vp.roundtozero.v2f32(<2 x float> %va, <2 x i1> %m, i32 %evl)
376 define <2 x float> @vp_roundtozero_v2f32_unmasked(<2 x float> %va, i32 zeroext %evl) {
377 ; CHECK-LABEL: vp_roundtozero_v2f32_unmasked:
379 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
380 ; CHECK-NEXT: vfabs.v v9, v8
381 ; CHECK-NEXT: lui a0, 307200
382 ; CHECK-NEXT: fmv.w.x fa5, a0
383 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
384 ; CHECK-NEXT: fsrmi a0, 1
385 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
386 ; CHECK-NEXT: fsrm a0
387 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
388 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
389 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
391 %head = insertelement <2 x i1> poison, i1 true, i32 0
392 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
393 %v = call <2 x float> @llvm.vp.roundtozero.v2f32(<2 x float> %va, <2 x i1> %m, i32 %evl)
397 declare <4 x float> @llvm.vp.roundtozero.v4f32(<4 x float>, <4 x i1>, i32)
399 define <4 x float> @vp_roundtozero_v4f32(<4 x float> %va, <4 x i1> %m, i32 zeroext %evl) {
400 ; CHECK-LABEL: vp_roundtozero_v4f32:
402 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
403 ; CHECK-NEXT: vfabs.v v9, v8, v0.t
404 ; CHECK-NEXT: lui a0, 307200
405 ; CHECK-NEXT: fmv.w.x fa5, a0
406 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
407 ; CHECK-NEXT: vmflt.vf v0, v9, fa5, v0.t
408 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
409 ; CHECK-NEXT: fsrmi a0, 1
410 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
411 ; CHECK-NEXT: fsrm a0
412 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
413 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
414 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
416 %v = call <4 x float> @llvm.vp.roundtozero.v4f32(<4 x float> %va, <4 x i1> %m, i32 %evl)
420 define <4 x float> @vp_roundtozero_v4f32_unmasked(<4 x float> %va, i32 zeroext %evl) {
421 ; CHECK-LABEL: vp_roundtozero_v4f32_unmasked:
423 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
424 ; CHECK-NEXT: vfabs.v v9, v8
425 ; CHECK-NEXT: lui a0, 307200
426 ; CHECK-NEXT: fmv.w.x fa5, a0
427 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
428 ; CHECK-NEXT: fsrmi a0, 1
429 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
430 ; CHECK-NEXT: fsrm a0
431 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
432 ; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
433 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
435 %head = insertelement <4 x i1> poison, i1 true, i32 0
436 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
437 %v = call <4 x float> @llvm.vp.roundtozero.v4f32(<4 x float> %va, <4 x i1> %m, i32 %evl)
441 declare <8 x float> @llvm.vp.roundtozero.v8f32(<8 x float>, <8 x i1>, i32)
443 define <8 x float> @vp_roundtozero_v8f32(<8 x float> %va, <8 x i1> %m, i32 zeroext %evl) {
444 ; CHECK-LABEL: vp_roundtozero_v8f32:
446 ; CHECK-NEXT: vmv1r.v v10, v0
447 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
448 ; CHECK-NEXT: vfabs.v v12, v8, v0.t
449 ; CHECK-NEXT: lui a0, 307200
450 ; CHECK-NEXT: fmv.w.x fa5, a0
451 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
452 ; CHECK-NEXT: vmflt.vf v10, v12, fa5, v0.t
453 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
454 ; CHECK-NEXT: fsrmi a0, 1
455 ; CHECK-NEXT: vmv1r.v v0, v10
456 ; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
457 ; CHECK-NEXT: fsrm a0
458 ; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
459 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
460 ; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
462 %v = call <8 x float> @llvm.vp.roundtozero.v8f32(<8 x float> %va, <8 x i1> %m, i32 %evl)
466 define <8 x float> @vp_roundtozero_v8f32_unmasked(<8 x float> %va, i32 zeroext %evl) {
467 ; CHECK-LABEL: vp_roundtozero_v8f32_unmasked:
469 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
470 ; CHECK-NEXT: vfabs.v v10, v8
471 ; CHECK-NEXT: lui a0, 307200
472 ; CHECK-NEXT: fmv.w.x fa5, a0
473 ; CHECK-NEXT: vmflt.vf v0, v10, fa5
474 ; CHECK-NEXT: fsrmi a0, 1
475 ; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
476 ; CHECK-NEXT: fsrm a0
477 ; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
478 ; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
479 ; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
481 %head = insertelement <8 x i1> poison, i1 true, i32 0
482 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
483 %v = call <8 x float> @llvm.vp.roundtozero.v8f32(<8 x float> %va, <8 x i1> %m, i32 %evl)
487 declare <16 x float> @llvm.vp.roundtozero.v16f32(<16 x float>, <16 x i1>, i32)
489 define <16 x float> @vp_roundtozero_v16f32(<16 x float> %va, <16 x i1> %m, i32 zeroext %evl) {
490 ; CHECK-LABEL: vp_roundtozero_v16f32:
492 ; CHECK-NEXT: vmv1r.v v12, v0
493 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
494 ; CHECK-NEXT: vfabs.v v16, v8, v0.t
495 ; CHECK-NEXT: lui a0, 307200
496 ; CHECK-NEXT: fmv.w.x fa5, a0
497 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
498 ; CHECK-NEXT: vmflt.vf v12, v16, fa5, v0.t
499 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma
500 ; CHECK-NEXT: fsrmi a0, 1
501 ; CHECK-NEXT: vmv1r.v v0, v12
502 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
503 ; CHECK-NEXT: fsrm a0
504 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
505 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
506 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
508 %v = call <16 x float> @llvm.vp.roundtozero.v16f32(<16 x float> %va, <16 x i1> %m, i32 %evl)
512 define <16 x float> @vp_roundtozero_v16f32_unmasked(<16 x float> %va, i32 zeroext %evl) {
513 ; CHECK-LABEL: vp_roundtozero_v16f32_unmasked:
515 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
516 ; CHECK-NEXT: vfabs.v v12, v8
517 ; CHECK-NEXT: lui a0, 307200
518 ; CHECK-NEXT: fmv.w.x fa5, a0
519 ; CHECK-NEXT: vmflt.vf v0, v12, fa5
520 ; CHECK-NEXT: fsrmi a0, 1
521 ; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
522 ; CHECK-NEXT: fsrm a0
523 ; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
524 ; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
525 ; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
527 %head = insertelement <16 x i1> poison, i1 true, i32 0
528 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
529 %v = call <16 x float> @llvm.vp.roundtozero.v16f32(<16 x float> %va, <16 x i1> %m, i32 %evl)
533 declare <2 x double> @llvm.vp.roundtozero.v2f64(<2 x double>, <2 x i1>, i32)
535 define <2 x double> @vp_roundtozero_v2f64(<2 x double> %va, <2 x i1> %m, i32 zeroext %evl) {
536 ; CHECK-LABEL: vp_roundtozero_v2f64:
538 ; CHECK-NEXT: lui a1, %hi(.LCPI16_0)
539 ; CHECK-NEXT: fld fa5, %lo(.LCPI16_0)(a1)
540 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
541 ; CHECK-NEXT: vfabs.v v9, v8, v0.t
542 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
543 ; CHECK-NEXT: vmflt.vf v0, v9, fa5, v0.t
544 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, ma
545 ; CHECK-NEXT: fsrmi a0, 1
546 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
547 ; CHECK-NEXT: fsrm a0
548 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
549 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
550 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
552 %v = call <2 x double> @llvm.vp.roundtozero.v2f64(<2 x double> %va, <2 x i1> %m, i32 %evl)
556 define <2 x double> @vp_roundtozero_v2f64_unmasked(<2 x double> %va, i32 zeroext %evl) {
557 ; CHECK-LABEL: vp_roundtozero_v2f64_unmasked:
559 ; CHECK-NEXT: lui a1, %hi(.LCPI17_0)
560 ; CHECK-NEXT: fld fa5, %lo(.LCPI17_0)(a1)
561 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
562 ; CHECK-NEXT: vfabs.v v9, v8
563 ; CHECK-NEXT: vmflt.vf v0, v9, fa5
564 ; CHECK-NEXT: fsrmi a0, 1
565 ; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
566 ; CHECK-NEXT: fsrm a0
567 ; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
568 ; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
569 ; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
571 %head = insertelement <2 x i1> poison, i1 true, i32 0
572 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
573 %v = call <2 x double> @llvm.vp.roundtozero.v2f64(<2 x double> %va, <2 x i1> %m, i32 %evl)
577 declare <4 x double> @llvm.vp.roundtozero.v4f64(<4 x double>, <4 x i1>, i32)
579 define <4 x double> @vp_roundtozero_v4f64(<4 x double> %va, <4 x i1> %m, i32 zeroext %evl) {
580 ; CHECK-LABEL: vp_roundtozero_v4f64:
582 ; CHECK-NEXT: vmv1r.v v10, v0
583 ; CHECK-NEXT: lui a1, %hi(.LCPI18_0)
584 ; CHECK-NEXT: fld fa5, %lo(.LCPI18_0)(a1)
585 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
586 ; CHECK-NEXT: vfabs.v v12, v8, v0.t
587 ; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
588 ; CHECK-NEXT: vmflt.vf v10, v12, fa5, v0.t
589 ; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, ma
590 ; CHECK-NEXT: fsrmi a0, 1
591 ; CHECK-NEXT: vmv1r.v v0, v10
592 ; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
593 ; CHECK-NEXT: fsrm a0
594 ; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
595 ; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
596 ; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
598 %v = call <4 x double> @llvm.vp.roundtozero.v4f64(<4 x double> %va, <4 x i1> %m, i32 %evl)
602 define <4 x double> @vp_roundtozero_v4f64_unmasked(<4 x double> %va, i32 zeroext %evl) {
603 ; CHECK-LABEL: vp_roundtozero_v4f64_unmasked:
605 ; CHECK-NEXT: lui a1, %hi(.LCPI19_0)
606 ; CHECK-NEXT: fld fa5, %lo(.LCPI19_0)(a1)
607 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
608 ; CHECK-NEXT: vfabs.v v10, v8
609 ; CHECK-NEXT: vmflt.vf v0, v10, fa5
610 ; CHECK-NEXT: fsrmi a0, 1
611 ; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
612 ; CHECK-NEXT: fsrm a0
613 ; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
614 ; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
615 ; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
617 %head = insertelement <4 x i1> poison, i1 true, i32 0
618 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
619 %v = call <4 x double> @llvm.vp.roundtozero.v4f64(<4 x double> %va, <4 x i1> %m, i32 %evl)
623 declare <8 x double> @llvm.vp.roundtozero.v8f64(<8 x double>, <8 x i1>, i32)
625 define <8 x double> @vp_roundtozero_v8f64(<8 x double> %va, <8 x i1> %m, i32 zeroext %evl) {
626 ; CHECK-LABEL: vp_roundtozero_v8f64:
628 ; CHECK-NEXT: vmv1r.v v12, v0
629 ; CHECK-NEXT: lui a1, %hi(.LCPI20_0)
630 ; CHECK-NEXT: fld fa5, %lo(.LCPI20_0)(a1)
631 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
632 ; CHECK-NEXT: vfabs.v v16, v8, v0.t
633 ; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
634 ; CHECK-NEXT: vmflt.vf v12, v16, fa5, v0.t
635 ; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, ma
636 ; CHECK-NEXT: fsrmi a0, 1
637 ; CHECK-NEXT: vmv1r.v v0, v12
638 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
639 ; CHECK-NEXT: fsrm a0
640 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
641 ; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
642 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
644 %v = call <8 x double> @llvm.vp.roundtozero.v8f64(<8 x double> %va, <8 x i1> %m, i32 %evl)
648 define <8 x double> @vp_roundtozero_v8f64_unmasked(<8 x double> %va, i32 zeroext %evl) {
649 ; CHECK-LABEL: vp_roundtozero_v8f64_unmasked:
651 ; CHECK-NEXT: lui a1, %hi(.LCPI21_0)
652 ; CHECK-NEXT: fld fa5, %lo(.LCPI21_0)(a1)
653 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
654 ; CHECK-NEXT: vfabs.v v12, v8
655 ; CHECK-NEXT: vmflt.vf v0, v12, fa5
656 ; CHECK-NEXT: fsrmi a0, 1
657 ; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
658 ; CHECK-NEXT: fsrm a0
659 ; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
660 ; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
661 ; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
663 %head = insertelement <8 x i1> poison, i1 true, i32 0
664 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
665 %v = call <8 x double> @llvm.vp.roundtozero.v8f64(<8 x double> %va, <8 x i1> %m, i32 %evl)
669 declare <15 x double> @llvm.vp.roundtozero.v15f64(<15 x double>, <15 x i1>, i32)
671 define <15 x double> @vp_roundtozero_v15f64(<15 x double> %va, <15 x i1> %m, i32 zeroext %evl) {
672 ; CHECK-LABEL: vp_roundtozero_v15f64:
674 ; CHECK-NEXT: vmv1r.v v16, v0
675 ; CHECK-NEXT: lui a1, %hi(.LCPI22_0)
676 ; CHECK-NEXT: fld fa5, %lo(.LCPI22_0)(a1)
677 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
678 ; CHECK-NEXT: vfabs.v v24, v8, v0.t
679 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
680 ; CHECK-NEXT: vmflt.vf v16, v24, fa5, v0.t
681 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma
682 ; CHECK-NEXT: fsrmi a0, 1
683 ; CHECK-NEXT: vmv1r.v v0, v16
684 ; CHECK-NEXT: vfcvt.x.f.v v24, v8, v0.t
685 ; CHECK-NEXT: fsrm a0
686 ; CHECK-NEXT: vfcvt.f.x.v v24, v24, v0.t
687 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
688 ; CHECK-NEXT: vfsgnj.vv v8, v24, v8, v0.t
690 %v = call <15 x double> @llvm.vp.roundtozero.v15f64(<15 x double> %va, <15 x i1> %m, i32 %evl)
694 define <15 x double> @vp_roundtozero_v15f64_unmasked(<15 x double> %va, i32 zeroext %evl) {
695 ; CHECK-LABEL: vp_roundtozero_v15f64_unmasked:
697 ; CHECK-NEXT: lui a1, %hi(.LCPI23_0)
698 ; CHECK-NEXT: fld fa5, %lo(.LCPI23_0)(a1)
699 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
700 ; CHECK-NEXT: vfabs.v v16, v8
701 ; CHECK-NEXT: vmflt.vf v0, v16, fa5
702 ; CHECK-NEXT: fsrmi a0, 1
703 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
704 ; CHECK-NEXT: fsrm a0
705 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
706 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
707 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
709 %head = insertelement <15 x i1> poison, i1 true, i32 0
710 %m = shufflevector <15 x i1> %head, <15 x i1> poison, <15 x i32> zeroinitializer
711 %v = call <15 x double> @llvm.vp.roundtozero.v15f64(<15 x double> %va, <15 x i1> %m, i32 %evl)
715 declare <16 x double> @llvm.vp.roundtozero.v16f64(<16 x double>, <16 x i1>, i32)
717 define <16 x double> @vp_roundtozero_v16f64(<16 x double> %va, <16 x i1> %m, i32 zeroext %evl) {
718 ; CHECK-LABEL: vp_roundtozero_v16f64:
720 ; CHECK-NEXT: vmv1r.v v16, v0
721 ; CHECK-NEXT: lui a1, %hi(.LCPI24_0)
722 ; CHECK-NEXT: fld fa5, %lo(.LCPI24_0)(a1)
723 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
724 ; CHECK-NEXT: vfabs.v v24, v8, v0.t
725 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
726 ; CHECK-NEXT: vmflt.vf v16, v24, fa5, v0.t
727 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma
728 ; CHECK-NEXT: fsrmi a0, 1
729 ; CHECK-NEXT: vmv1r.v v0, v16
730 ; CHECK-NEXT: vfcvt.x.f.v v24, v8, v0.t
731 ; CHECK-NEXT: fsrm a0
732 ; CHECK-NEXT: vfcvt.f.x.v v24, v24, v0.t
733 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
734 ; CHECK-NEXT: vfsgnj.vv v8, v24, v8, v0.t
736 %v = call <16 x double> @llvm.vp.roundtozero.v16f64(<16 x double> %va, <16 x i1> %m, i32 %evl)
740 define <16 x double> @vp_roundtozero_v16f64_unmasked(<16 x double> %va, i32 zeroext %evl) {
741 ; CHECK-LABEL: vp_roundtozero_v16f64_unmasked:
743 ; CHECK-NEXT: lui a1, %hi(.LCPI25_0)
744 ; CHECK-NEXT: fld fa5, %lo(.LCPI25_0)(a1)
745 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
746 ; CHECK-NEXT: vfabs.v v16, v8
747 ; CHECK-NEXT: vmflt.vf v0, v16, fa5
748 ; CHECK-NEXT: fsrmi a0, 1
749 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
750 ; CHECK-NEXT: fsrm a0
751 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
752 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
753 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
755 %head = insertelement <16 x i1> poison, i1 true, i32 0
756 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
757 %v = call <16 x double> @llvm.vp.roundtozero.v16f64(<16 x double> %va, <16 x i1> %m, i32 %evl)
761 declare <32 x double> @llvm.vp.roundtozero.v32f64(<32 x double>, <32 x i1>, i32)
763 define <32 x double> @vp_roundtozero_v32f64(<32 x double> %va, <32 x i1> %m, i32 zeroext %evl) {
764 ; CHECK-LABEL: vp_roundtozero_v32f64:
766 ; CHECK-NEXT: addi sp, sp, -16
767 ; CHECK-NEXT: .cfi_def_cfa_offset 16
768 ; CHECK-NEXT: csrr a1, vlenb
769 ; CHECK-NEXT: slli a1, a1, 4
770 ; CHECK-NEXT: sub sp, sp, a1
771 ; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb
772 ; CHECK-NEXT: vmv1r.v v25, v0
773 ; CHECK-NEXT: csrr a1, vlenb
774 ; CHECK-NEXT: slli a1, a1, 3
775 ; CHECK-NEXT: add a1, sp, a1
776 ; CHECK-NEXT: addi a1, a1, 16
777 ; CHECK-NEXT: vs8r.v v16, (a1) # Unknown-size Folded Spill
778 ; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma
779 ; CHECK-NEXT: li a2, 16
780 ; CHECK-NEXT: vslidedown.vi v24, v0, 2
781 ; CHECK-NEXT: mv a1, a0
782 ; CHECK-NEXT: bltu a0, a2, .LBB26_2
783 ; CHECK-NEXT: # %bb.1:
784 ; CHECK-NEXT: li a1, 16
785 ; CHECK-NEXT: .LBB26_2:
786 ; CHECK-NEXT: lui a2, %hi(.LCPI26_0)
787 ; CHECK-NEXT: fld fa5, %lo(.LCPI26_0)(a2)
788 ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma
789 ; CHECK-NEXT: vmv1r.v v0, v25
790 ; CHECK-NEXT: vfabs.v v16, v8, v0.t
791 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
792 ; CHECK-NEXT: vmflt.vf v25, v16, fa5, v0.t
793 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma
794 ; CHECK-NEXT: fsrmi a1, 1
795 ; CHECK-NEXT: vmv1r.v v0, v25
796 ; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
797 ; CHECK-NEXT: fsrm a1
798 ; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
799 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
800 ; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
801 ; CHECK-NEXT: addi a1, sp, 16
802 ; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill
803 ; CHECK-NEXT: addi a1, a0, -16
804 ; CHECK-NEXT: sltu a0, a0, a1
805 ; CHECK-NEXT: addi a0, a0, -1
806 ; CHECK-NEXT: and a0, a0, a1
807 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
808 ; CHECK-NEXT: vmv1r.v v0, v24
809 ; CHECK-NEXT: csrr a0, vlenb
810 ; CHECK-NEXT: slli a0, a0, 3
811 ; CHECK-NEXT: add a0, sp, a0
812 ; CHECK-NEXT: addi a0, a0, 16
813 ; CHECK-NEXT: vl8r.v v16, (a0) # Unknown-size Folded Reload
814 ; CHECK-NEXT: vfabs.v v8, v16, v0.t
815 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
816 ; CHECK-NEXT: vmflt.vf v24, v8, fa5, v0.t
817 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma
818 ; CHECK-NEXT: fsrmi a0, 1
819 ; CHECK-NEXT: vmv1r.v v0, v24
820 ; CHECK-NEXT: vfcvt.x.f.v v8, v16, v0.t
821 ; CHECK-NEXT: fsrm a0
822 ; CHECK-NEXT: vfcvt.f.x.v v8, v8, v0.t
823 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
824 ; CHECK-NEXT: vfsgnj.vv v16, v8, v16, v0.t
825 ; CHECK-NEXT: addi a0, sp, 16
826 ; CHECK-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
827 ; CHECK-NEXT: csrr a0, vlenb
828 ; CHECK-NEXT: slli a0, a0, 4
829 ; CHECK-NEXT: add sp, sp, a0
830 ; CHECK-NEXT: addi sp, sp, 16
832 %v = call <32 x double> @llvm.vp.roundtozero.v32f64(<32 x double> %va, <32 x i1> %m, i32 %evl)
836 define <32 x double> @vp_roundtozero_v32f64_unmasked(<32 x double> %va, i32 zeroext %evl) {
837 ; CHECK-LABEL: vp_roundtozero_v32f64_unmasked:
839 ; CHECK-NEXT: li a2, 16
840 ; CHECK-NEXT: mv a1, a0
841 ; CHECK-NEXT: bltu a0, a2, .LBB27_2
842 ; CHECK-NEXT: # %bb.1:
843 ; CHECK-NEXT: li a1, 16
844 ; CHECK-NEXT: .LBB27_2:
845 ; CHECK-NEXT: lui a2, %hi(.LCPI27_0)
846 ; CHECK-NEXT: fld fa5, %lo(.LCPI27_0)(a2)
847 ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma
848 ; CHECK-NEXT: vfabs.v v24, v8
849 ; CHECK-NEXT: vmflt.vf v0, v24, fa5
850 ; CHECK-NEXT: fsrmi a1, 1
851 ; CHECK-NEXT: vfcvt.x.f.v v24, v8, v0.t
852 ; CHECK-NEXT: fsrm a1
853 ; CHECK-NEXT: vfcvt.f.x.v v24, v24, v0.t
854 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
855 ; CHECK-NEXT: vfsgnj.vv v8, v24, v8, v0.t
856 ; CHECK-NEXT: addi a1, a0, -16
857 ; CHECK-NEXT: sltu a0, a0, a1
858 ; CHECK-NEXT: addi a0, a0, -1
859 ; CHECK-NEXT: and a0, a0, a1
860 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
861 ; CHECK-NEXT: vfabs.v v24, v16
862 ; CHECK-NEXT: vmflt.vf v0, v24, fa5
863 ; CHECK-NEXT: fsrmi a0, 1
864 ; CHECK-NEXT: vfcvt.x.f.v v24, v16, v0.t
865 ; CHECK-NEXT: fsrm a0
866 ; CHECK-NEXT: vfcvt.f.x.v v24, v24, v0.t
867 ; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
868 ; CHECK-NEXT: vfsgnj.vv v16, v24, v16, v0.t
870 %head = insertelement <32 x i1> poison, i1 true, i32 0
871 %m = shufflevector <32 x i1> %head, <32 x i1> poison, <32 x i32> zeroinitializer
872 %v = call <32 x double> @llvm.vp.roundtozero.v32f64(<32 x double> %va, <32 x i1> %m, i32 %evl)