1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v -target-abi=ilp32d \
3 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v -target-abi=lp64d \
5 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
6 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=ilp32d \
7 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
8 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v -target-abi=lp64d \
9 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
11 declare <2 x half> @llvm.vp.fadd.v2f16(<2 x half>, <2 x half>, <2 x i1>, i32)
13 define <2 x half> @vfadd_vv_v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> %m, i32 zeroext %evl) {
14 ; ZVFH-LABEL: vfadd_vv_v2f16:
16 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
17 ; ZVFH-NEXT: vfadd.vv v8, v8, v9, v0.t
20 ; ZVFHMIN-LABEL: vfadd_vv_v2f16:
22 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
23 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9
24 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
25 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
26 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10, v0.t
27 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
28 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
30 %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> %m, i32 %evl)
34 define <2 x half> @vfadd_vv_v2f16_unmasked(<2 x half> %va, <2 x half> %b, i32 zeroext %evl) {
35 ; ZVFH-LABEL: vfadd_vv_v2f16_unmasked:
37 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
38 ; ZVFH-NEXT: vfadd.vv v8, v8, v9
41 ; ZVFHMIN-LABEL: vfadd_vv_v2f16_unmasked:
43 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
44 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9
45 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
46 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
47 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10
48 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
49 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
51 %head = insertelement <2 x i1> poison, i1 true, i32 0
52 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
53 %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %b, <2 x i1> %m, i32 %evl)
57 define <2 x half> @vfadd_vf_v2f16(<2 x half> %va, half %b, <2 x i1> %m, i32 zeroext %evl) {
58 ; ZVFH-LABEL: vfadd_vf_v2f16:
60 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
61 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t
64 ; ZVFHMIN-LABEL: vfadd_vf_v2f16:
66 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
67 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
68 ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5
69 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
70 ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9
71 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
72 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
73 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10
74 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
75 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v8, v0.t
76 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
77 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
79 %elt.head = insertelement <2 x half> poison, half %b, i32 0
80 %vb = shufflevector <2 x half> %elt.head, <2 x half> poison, <2 x i32> zeroinitializer
81 %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %vb, <2 x i1> %m, i32 %evl)
85 define <2 x half> @vfadd_vf_v2f16_unmasked(<2 x half> %va, half %b, i32 zeroext %evl) {
86 ; ZVFH-LABEL: vfadd_vf_v2f16_unmasked:
88 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
89 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0
92 ; ZVFHMIN-LABEL: vfadd_vf_v2f16_unmasked:
94 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
95 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
96 ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5
97 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
98 ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9
99 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
100 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
101 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10
102 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
103 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v8
104 ; ZVFHMIN-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
105 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
107 %elt.head = insertelement <2 x half> poison, half %b, i32 0
108 %vb = shufflevector <2 x half> %elt.head, <2 x half> poison, <2 x i32> zeroinitializer
109 %head = insertelement <2 x i1> poison, i1 true, i32 0
110 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
111 %v = call <2 x half> @llvm.vp.fadd.v2f16(<2 x half> %va, <2 x half> %vb, <2 x i1> %m, i32 %evl)
115 declare <3 x half> @llvm.vp.fadd.v3f16(<3 x half>, <3 x half>, <3 x i1>, i32)
117 define <3 x half> @vfadd_vv_v3f16(<3 x half> %va, <3 x half> %b, <3 x i1> %m, i32 zeroext %evl) {
118 ; ZVFH-LABEL: vfadd_vv_v3f16:
120 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
121 ; ZVFH-NEXT: vfadd.vv v8, v8, v9, v0.t
124 ; ZVFHMIN-LABEL: vfadd_vv_v3f16:
126 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
127 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9
128 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
129 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma
130 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10, v0.t
131 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
132 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
134 %v = call <3 x half> @llvm.vp.fadd.v3f16(<3 x half> %va, <3 x half> %b, <3 x i1> %m, i32 %evl)
138 declare <4 x half> @llvm.vp.fadd.v4f16(<4 x half>, <4 x half>, <4 x i1>, i32)
140 define <4 x half> @vfadd_vv_v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> %m, i32 zeroext %evl) {
141 ; ZVFH-LABEL: vfadd_vv_v4f16:
143 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
144 ; ZVFH-NEXT: vfadd.vv v8, v8, v9, v0.t
147 ; ZVFHMIN-LABEL: vfadd_vv_v4f16:
149 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
150 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9
151 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
152 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma
153 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10, v0.t
154 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
155 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
157 %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> %m, i32 %evl)
161 define <4 x half> @vfadd_vv_v4f16_unmasked(<4 x half> %va, <4 x half> %b, i32 zeroext %evl) {
162 ; ZVFH-LABEL: vfadd_vv_v4f16_unmasked:
164 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
165 ; ZVFH-NEXT: vfadd.vv v8, v8, v9
168 ; ZVFHMIN-LABEL: vfadd_vv_v4f16_unmasked:
170 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
171 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9
172 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
173 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma
174 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10
175 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
176 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
178 %head = insertelement <4 x i1> poison, i1 true, i32 0
179 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
180 %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %b, <4 x i1> %m, i32 %evl)
184 define <4 x half> @vfadd_vf_v4f16(<4 x half> %va, half %b, <4 x i1> %m, i32 zeroext %evl) {
185 ; ZVFH-LABEL: vfadd_vf_v4f16:
187 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
188 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t
191 ; ZVFHMIN-LABEL: vfadd_vf_v4f16:
193 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
194 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m1, ta, ma
195 ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5
196 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
197 ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9
198 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
199 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
200 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10
201 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma
202 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v8, v0.t
203 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
204 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
206 %elt.head = insertelement <4 x half> poison, half %b, i32 0
207 %vb = shufflevector <4 x half> %elt.head, <4 x half> poison, <4 x i32> zeroinitializer
208 %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %vb, <4 x i1> %m, i32 %evl)
212 define <4 x half> @vfadd_vf_v4f16_unmasked(<4 x half> %va, half %b, i32 zeroext %evl) {
213 ; ZVFH-LABEL: vfadd_vf_v4f16_unmasked:
215 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
216 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0
219 ; ZVFHMIN-LABEL: vfadd_vf_v4f16_unmasked:
221 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
222 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m1, ta, ma
223 ; ZVFHMIN-NEXT: vfmv.v.f v9, fa5
224 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
225 ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v9
226 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
227 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8
228 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10
229 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m1, ta, ma
230 ; ZVFHMIN-NEXT: vfadd.vv v9, v9, v8
231 ; ZVFHMIN-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
232 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9
234 %elt.head = insertelement <4 x half> poison, half %b, i32 0
235 %vb = shufflevector <4 x half> %elt.head, <4 x half> poison, <4 x i32> zeroinitializer
236 %head = insertelement <4 x i1> poison, i1 true, i32 0
237 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
238 %v = call <4 x half> @llvm.vp.fadd.v4f16(<4 x half> %va, <4 x half> %vb, <4 x i1> %m, i32 %evl)
242 declare <8 x half> @llvm.vp.fadd.v8f16(<8 x half>, <8 x half>, <8 x i1>, i32)
244 define <8 x half> @vfadd_vv_v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> %m, i32 zeroext %evl) {
245 ; ZVFH-LABEL: vfadd_vv_v8f16:
247 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
248 ; ZVFH-NEXT: vfadd.vv v8, v8, v9, v0.t
251 ; ZVFHMIN-LABEL: vfadd_vv_v8f16:
253 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
254 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9
255 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8
256 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma
257 ; ZVFHMIN-NEXT: vfadd.vv v10, v12, v10, v0.t
258 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
259 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10
261 %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> %m, i32 %evl)
265 define <8 x half> @vfadd_vv_v8f16_unmasked(<8 x half> %va, <8 x half> %b, i32 zeroext %evl) {
266 ; ZVFH-LABEL: vfadd_vv_v8f16_unmasked:
268 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
269 ; ZVFH-NEXT: vfadd.vv v8, v8, v9
272 ; ZVFHMIN-LABEL: vfadd_vv_v8f16_unmasked:
274 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
275 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9
276 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8
277 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma
278 ; ZVFHMIN-NEXT: vfadd.vv v10, v12, v10
279 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
280 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10
282 %head = insertelement <8 x i1> poison, i1 true, i32 0
283 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
284 %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %b, <8 x i1> %m, i32 %evl)
288 define <8 x half> @vfadd_vf_v8f16(<8 x half> %va, half %b, <8 x i1> %m, i32 zeroext %evl) {
289 ; ZVFH-LABEL: vfadd_vf_v8f16:
291 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
292 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t
295 ; ZVFHMIN-LABEL: vfadd_vf_v8f16:
297 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
298 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m2, ta, ma
299 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
300 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma
301 ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10
302 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
303 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8
304 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9
305 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma
306 ; ZVFHMIN-NEXT: vfadd.vv v10, v10, v12, v0.t
307 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
308 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10
310 %elt.head = insertelement <8 x half> poison, half %b, i32 0
311 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer
312 %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 %evl)
316 define <8 x half> @vfadd_vf_v8f16_unmasked(<8 x half> %va, half %b, i32 zeroext %evl) {
317 ; ZVFH-LABEL: vfadd_vf_v8f16_unmasked:
319 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
320 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0
323 ; ZVFHMIN-LABEL: vfadd_vf_v8f16_unmasked:
325 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
326 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m2, ta, ma
327 ; ZVFHMIN-NEXT: vfmv.v.f v10, fa5
328 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma
329 ; ZVFHMIN-NEXT: vfncvt.f.f.w v9, v10
330 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
331 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8
332 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9
333 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m2, ta, ma
334 ; ZVFHMIN-NEXT: vfadd.vv v10, v10, v12
335 ; ZVFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
336 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10
338 %elt.head = insertelement <8 x half> poison, half %b, i32 0
339 %vb = shufflevector <8 x half> %elt.head, <8 x half> poison, <8 x i32> zeroinitializer
340 %head = insertelement <8 x i1> poison, i1 true, i32 0
341 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
342 %v = call <8 x half> @llvm.vp.fadd.v8f16(<8 x half> %va, <8 x half> %vb, <8 x i1> %m, i32 %evl)
346 declare <16 x half> @llvm.vp.fadd.v16f16(<16 x half>, <16 x half>, <16 x i1>, i32)
348 define <16 x half> @vfadd_vv_v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> %m, i32 zeroext %evl) {
349 ; ZVFH-LABEL: vfadd_vv_v16f16:
351 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
352 ; ZVFH-NEXT: vfadd.vv v8, v8, v10, v0.t
355 ; ZVFHMIN-LABEL: vfadd_vv_v16f16:
357 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
358 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10
359 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8
360 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m4, ta, ma
361 ; ZVFHMIN-NEXT: vfadd.vv v12, v16, v12, v0.t
362 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
363 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12
365 %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> %m, i32 %evl)
369 define <16 x half> @vfadd_vv_v16f16_unmasked(<16 x half> %va, <16 x half> %b, i32 zeroext %evl) {
370 ; ZVFH-LABEL: vfadd_vv_v16f16_unmasked:
372 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
373 ; ZVFH-NEXT: vfadd.vv v8, v8, v10
376 ; ZVFHMIN-LABEL: vfadd_vv_v16f16_unmasked:
378 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
379 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10
380 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8
381 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m4, ta, ma
382 ; ZVFHMIN-NEXT: vfadd.vv v12, v16, v12
383 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
384 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12
386 %head = insertelement <16 x i1> poison, i1 true, i32 0
387 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
388 %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %b, <16 x i1> %m, i32 %evl)
392 define <16 x half> @vfadd_vf_v16f16(<16 x half> %va, half %b, <16 x i1> %m, i32 zeroext %evl) {
393 ; ZVFH-LABEL: vfadd_vf_v16f16:
395 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
396 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t
399 ; ZVFHMIN-LABEL: vfadd_vf_v16f16:
401 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
402 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m4, ta, ma
403 ; ZVFHMIN-NEXT: vfmv.v.f v12, fa5
404 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma
405 ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12
406 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
407 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8
408 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10
409 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m4, ta, ma
410 ; ZVFHMIN-NEXT: vfadd.vv v12, v12, v16, v0.t
411 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
412 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12
414 %elt.head = insertelement <16 x half> poison, half %b, i32 0
415 %vb = shufflevector <16 x half> %elt.head, <16 x half> poison, <16 x i32> zeroinitializer
416 %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %vb, <16 x i1> %m, i32 %evl)
420 define <16 x half> @vfadd_vf_v16f16_unmasked(<16 x half> %va, half %b, i32 zeroext %evl) {
421 ; ZVFH-LABEL: vfadd_vf_v16f16_unmasked:
423 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
424 ; ZVFH-NEXT: vfadd.vf v8, v8, fa0
427 ; ZVFHMIN-LABEL: vfadd_vf_v16f16_unmasked:
429 ; ZVFHMIN-NEXT: fcvt.s.h fa5, fa0
430 ; ZVFHMIN-NEXT: vsetvli a1, zero, e32, m4, ta, ma
431 ; ZVFHMIN-NEXT: vfmv.v.f v12, fa5
432 ; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma
433 ; ZVFHMIN-NEXT: vfncvt.f.f.w v10, v12
434 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
435 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8
436 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10
437 ; ZVFHMIN-NEXT: vsetvli zero, a0, e32, m4, ta, ma
438 ; ZVFHMIN-NEXT: vfadd.vv v12, v12, v16
439 ; ZVFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
440 ; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12
442 %elt.head = insertelement <16 x half> poison, half %b, i32 0
443 %vb = shufflevector <16 x half> %elt.head, <16 x half> poison, <16 x i32> zeroinitializer
444 %head = insertelement <16 x i1> poison, i1 true, i32 0
445 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
446 %v = call <16 x half> @llvm.vp.fadd.v16f16(<16 x half> %va, <16 x half> %vb, <16 x i1> %m, i32 %evl)
450 declare <2 x float> @llvm.vp.fadd.v2f32(<2 x float>, <2 x float>, <2 x i1>, i32)
452 define <2 x float> @vfadd_vv_v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> %m, i32 zeroext %evl) {
453 ; CHECK-LABEL: vfadd_vv_v2f32:
455 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
456 ; CHECK-NEXT: vfadd.vv v8, v8, v9, v0.t
458 %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> %m, i32 %evl)
462 define <2 x float> @vfadd_vv_v2f32_unmasked(<2 x float> %va, <2 x float> %b, i32 zeroext %evl) {
463 ; CHECK-LABEL: vfadd_vv_v2f32_unmasked:
465 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
466 ; CHECK-NEXT: vfadd.vv v8, v8, v9
468 %head = insertelement <2 x i1> poison, i1 true, i32 0
469 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
470 %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %b, <2 x i1> %m, i32 %evl)
474 define <2 x float> @vfadd_vf_v2f32(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
475 ; CHECK-LABEL: vfadd_vf_v2f32:
477 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
478 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
480 %elt.head = insertelement <2 x float> poison, float %b, i32 0
481 %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
482 %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %vb, <2 x i1> %m, i32 %evl)
486 define <2 x float> @vfadd_vf_v2f32_commute(<2 x float> %va, float %b, <2 x i1> %m, i32 zeroext %evl) {
487 ; CHECK-LABEL: vfadd_vf_v2f32_commute:
489 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
490 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
492 %elt.head = insertelement <2 x float> poison, float %b, i32 0
493 %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
494 %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %vb, <2 x float> %va, <2 x i1> %m, i32 %evl)
498 define <2 x float> @vfadd_vf_v2f32_unmasked(<2 x float> %va, float %b, i32 zeroext %evl) {
499 ; CHECK-LABEL: vfadd_vf_v2f32_unmasked:
501 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
502 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
504 %elt.head = insertelement <2 x float> poison, float %b, i32 0
505 %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
506 %head = insertelement <2 x i1> poison, i1 true, i32 0
507 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
508 %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %va, <2 x float> %vb, <2 x i1> %m, i32 %evl)
512 define <2 x float> @vfadd_vf_v2f32_unmasked_commute(<2 x float> %va, float %b, i32 zeroext %evl) {
513 ; CHECK-LABEL: vfadd_vf_v2f32_unmasked_commute:
515 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
516 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
518 %elt.head = insertelement <2 x float> poison, float %b, i32 0
519 %vb = shufflevector <2 x float> %elt.head, <2 x float> poison, <2 x i32> zeroinitializer
520 %head = insertelement <2 x i1> poison, i1 true, i32 0
521 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
522 %v = call <2 x float> @llvm.vp.fadd.v2f32(<2 x float> %vb, <2 x float> %va, <2 x i1> %m, i32 %evl)
526 declare <4 x float> @llvm.vp.fadd.v4f32(<4 x float>, <4 x float>, <4 x i1>, i32)
528 define <4 x float> @vfadd_vv_v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> %m, i32 zeroext %evl) {
529 ; CHECK-LABEL: vfadd_vv_v4f32:
531 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
532 ; CHECK-NEXT: vfadd.vv v8, v8, v9, v0.t
534 %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> %m, i32 %evl)
538 define <4 x float> @vfadd_vv_v4f32_unmasked(<4 x float> %va, <4 x float> %b, i32 zeroext %evl) {
539 ; CHECK-LABEL: vfadd_vv_v4f32_unmasked:
541 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
542 ; CHECK-NEXT: vfadd.vv v8, v8, v9
544 %head = insertelement <4 x i1> poison, i1 true, i32 0
545 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
546 %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %b, <4 x i1> %m, i32 %evl)
550 define <4 x float> @vfadd_vf_v4f32(<4 x float> %va, float %b, <4 x i1> %m, i32 zeroext %evl) {
551 ; CHECK-LABEL: vfadd_vf_v4f32:
553 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
554 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
556 %elt.head = insertelement <4 x float> poison, float %b, i32 0
557 %vb = shufflevector <4 x float> %elt.head, <4 x float> poison, <4 x i32> zeroinitializer
558 %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> %m, i32 %evl)
562 define <4 x float> @vfadd_vf_v4f32_unmasked(<4 x float> %va, float %b, i32 zeroext %evl) {
563 ; CHECK-LABEL: vfadd_vf_v4f32_unmasked:
565 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
566 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
568 %elt.head = insertelement <4 x float> poison, float %b, i32 0
569 %vb = shufflevector <4 x float> %elt.head, <4 x float> poison, <4 x i32> zeroinitializer
570 %head = insertelement <4 x i1> poison, i1 true, i32 0
571 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
572 %v = call <4 x float> @llvm.vp.fadd.v4f32(<4 x float> %va, <4 x float> %vb, <4 x i1> %m, i32 %evl)
576 declare <8 x float> @llvm.vp.fadd.v8f32(<8 x float>, <8 x float>, <8 x i1>, i32)
578 define <8 x float> @vfadd_vv_v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> %m, i32 zeroext %evl) {
579 ; CHECK-LABEL: vfadd_vv_v8f32:
581 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
582 ; CHECK-NEXT: vfadd.vv v8, v8, v10, v0.t
584 %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> %m, i32 %evl)
588 define <8 x float> @vfadd_vv_v8f32_unmasked(<8 x float> %va, <8 x float> %b, i32 zeroext %evl) {
589 ; CHECK-LABEL: vfadd_vv_v8f32_unmasked:
591 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
592 ; CHECK-NEXT: vfadd.vv v8, v8, v10
594 %head = insertelement <8 x i1> poison, i1 true, i32 0
595 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
596 %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %b, <8 x i1> %m, i32 %evl)
600 define <8 x float> @vfadd_vf_v8f32(<8 x float> %va, float %b, <8 x i1> %m, i32 zeroext %evl) {
601 ; CHECK-LABEL: vfadd_vf_v8f32:
603 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
604 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
606 %elt.head = insertelement <8 x float> poison, float %b, i32 0
607 %vb = shufflevector <8 x float> %elt.head, <8 x float> poison, <8 x i32> zeroinitializer
608 %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %vb, <8 x i1> %m, i32 %evl)
612 define <8 x float> @vfadd_vf_v8f32_unmasked(<8 x float> %va, float %b, i32 zeroext %evl) {
613 ; CHECK-LABEL: vfadd_vf_v8f32_unmasked:
615 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
616 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
618 %elt.head = insertelement <8 x float> poison, float %b, i32 0
619 %vb = shufflevector <8 x float> %elt.head, <8 x float> poison, <8 x i32> zeroinitializer
620 %head = insertelement <8 x i1> poison, i1 true, i32 0
621 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
622 %v = call <8 x float> @llvm.vp.fadd.v8f32(<8 x float> %va, <8 x float> %vb, <8 x i1> %m, i32 %evl)
626 declare <16 x float> @llvm.vp.fadd.v16f32(<16 x float>, <16 x float>, <16 x i1>, i32)
628 define <16 x float> @vfadd_vv_v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> %m, i32 zeroext %evl) {
629 ; CHECK-LABEL: vfadd_vv_v16f32:
631 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
632 ; CHECK-NEXT: vfadd.vv v8, v8, v12, v0.t
634 %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> %m, i32 %evl)
638 define <16 x float> @vfadd_vv_v16f32_unmasked(<16 x float> %va, <16 x float> %b, i32 zeroext %evl) {
639 ; CHECK-LABEL: vfadd_vv_v16f32_unmasked:
641 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
642 ; CHECK-NEXT: vfadd.vv v8, v8, v12
644 %head = insertelement <16 x i1> poison, i1 true, i32 0
645 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
646 %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %b, <16 x i1> %m, i32 %evl)
650 define <16 x float> @vfadd_vf_v16f32(<16 x float> %va, float %b, <16 x i1> %m, i32 zeroext %evl) {
651 ; CHECK-LABEL: vfadd_vf_v16f32:
653 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
654 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
656 %elt.head = insertelement <16 x float> poison, float %b, i32 0
657 %vb = shufflevector <16 x float> %elt.head, <16 x float> poison, <16 x i32> zeroinitializer
658 %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x i1> %m, i32 %evl)
662 define <16 x float> @vfadd_vf_v16f32_unmasked(<16 x float> %va, float %b, i32 zeroext %evl) {
663 ; CHECK-LABEL: vfadd_vf_v16f32_unmasked:
665 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
666 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
668 %elt.head = insertelement <16 x float> poison, float %b, i32 0
669 %vb = shufflevector <16 x float> %elt.head, <16 x float> poison, <16 x i32> zeroinitializer
670 %head = insertelement <16 x i1> poison, i1 true, i32 0
671 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
672 %v = call <16 x float> @llvm.vp.fadd.v16f32(<16 x float> %va, <16 x float> %vb, <16 x i1> %m, i32 %evl)
676 declare <2 x double> @llvm.vp.fadd.v2f64(<2 x double>, <2 x double>, <2 x i1>, i32)
678 define <2 x double> @vfadd_vv_v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> %m, i32 zeroext %evl) {
679 ; CHECK-LABEL: vfadd_vv_v2f64:
681 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
682 ; CHECK-NEXT: vfadd.vv v8, v8, v9, v0.t
684 %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> %m, i32 %evl)
688 define <2 x double> @vfadd_vv_v2f64_unmasked(<2 x double> %va, <2 x double> %b, i32 zeroext %evl) {
689 ; CHECK-LABEL: vfadd_vv_v2f64_unmasked:
691 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
692 ; CHECK-NEXT: vfadd.vv v8, v8, v9
694 %head = insertelement <2 x i1> poison, i1 true, i32 0
695 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
696 %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %b, <2 x i1> %m, i32 %evl)
700 define <2 x double> @vfadd_vf_v2f64(<2 x double> %va, double %b, <2 x i1> %m, i32 zeroext %evl) {
701 ; CHECK-LABEL: vfadd_vf_v2f64:
703 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
704 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
706 %elt.head = insertelement <2 x double> poison, double %b, i32 0
707 %vb = shufflevector <2 x double> %elt.head, <2 x double> poison, <2 x i32> zeroinitializer
708 %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %vb, <2 x i1> %m, i32 %evl)
712 define <2 x double> @vfadd_vf_v2f64_unmasked(<2 x double> %va, double %b, i32 zeroext %evl) {
713 ; CHECK-LABEL: vfadd_vf_v2f64_unmasked:
715 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
716 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
718 %elt.head = insertelement <2 x double> poison, double %b, i32 0
719 %vb = shufflevector <2 x double> %elt.head, <2 x double> poison, <2 x i32> zeroinitializer
720 %head = insertelement <2 x i1> poison, i1 true, i32 0
721 %m = shufflevector <2 x i1> %head, <2 x i1> poison, <2 x i32> zeroinitializer
722 %v = call <2 x double> @llvm.vp.fadd.v2f64(<2 x double> %va, <2 x double> %vb, <2 x i1> %m, i32 %evl)
726 declare <4 x double> @llvm.vp.fadd.v4f64(<4 x double>, <4 x double>, <4 x i1>, i32)
728 define <4 x double> @vfadd_vv_v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> %m, i32 zeroext %evl) {
729 ; CHECK-LABEL: vfadd_vv_v4f64:
731 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
732 ; CHECK-NEXT: vfadd.vv v8, v8, v10, v0.t
734 %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> %m, i32 %evl)
738 define <4 x double> @vfadd_vv_v4f64_unmasked(<4 x double> %va, <4 x double> %b, i32 zeroext %evl) {
739 ; CHECK-LABEL: vfadd_vv_v4f64_unmasked:
741 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
742 ; CHECK-NEXT: vfadd.vv v8, v8, v10
744 %head = insertelement <4 x i1> poison, i1 true, i32 0
745 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
746 %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %b, <4 x i1> %m, i32 %evl)
750 define <4 x double> @vfadd_vf_v4f64(<4 x double> %va, double %b, <4 x i1> %m, i32 zeroext %evl) {
751 ; CHECK-LABEL: vfadd_vf_v4f64:
753 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
754 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
756 %elt.head = insertelement <4 x double> poison, double %b, i32 0
757 %vb = shufflevector <4 x double> %elt.head, <4 x double> poison, <4 x i32> zeroinitializer
758 %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %vb, <4 x i1> %m, i32 %evl)
762 define <4 x double> @vfadd_vf_v4f64_unmasked(<4 x double> %va, double %b, i32 zeroext %evl) {
763 ; CHECK-LABEL: vfadd_vf_v4f64_unmasked:
765 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma
766 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
768 %elt.head = insertelement <4 x double> poison, double %b, i32 0
769 %vb = shufflevector <4 x double> %elt.head, <4 x double> poison, <4 x i32> zeroinitializer
770 %head = insertelement <4 x i1> poison, i1 true, i32 0
771 %m = shufflevector <4 x i1> %head, <4 x i1> poison, <4 x i32> zeroinitializer
772 %v = call <4 x double> @llvm.vp.fadd.v4f64(<4 x double> %va, <4 x double> %vb, <4 x i1> %m, i32 %evl)
776 declare <8 x double> @llvm.vp.fadd.v8f64(<8 x double>, <8 x double>, <8 x i1>, i32)
778 define <8 x double> @vfadd_vv_v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> %m, i32 zeroext %evl) {
779 ; CHECK-LABEL: vfadd_vv_v8f64:
781 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
782 ; CHECK-NEXT: vfadd.vv v8, v8, v12, v0.t
784 %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> %m, i32 %evl)
788 define <8 x double> @vfadd_vv_v8f64_unmasked(<8 x double> %va, <8 x double> %b, i32 zeroext %evl) {
789 ; CHECK-LABEL: vfadd_vv_v8f64_unmasked:
791 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
792 ; CHECK-NEXT: vfadd.vv v8, v8, v12
794 %head = insertelement <8 x i1> poison, i1 true, i32 0
795 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
796 %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %b, <8 x i1> %m, i32 %evl)
800 define <8 x double> @vfadd_vf_v8f64(<8 x double> %va, double %b, <8 x i1> %m, i32 zeroext %evl) {
801 ; CHECK-LABEL: vfadd_vf_v8f64:
803 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
804 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
806 %elt.head = insertelement <8 x double> poison, double %b, i32 0
807 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer
808 %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 %evl)
812 define <8 x double> @vfadd_vf_v8f64_unmasked(<8 x double> %va, double %b, i32 zeroext %evl) {
813 ; CHECK-LABEL: vfadd_vf_v8f64_unmasked:
815 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma
816 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
818 %elt.head = insertelement <8 x double> poison, double %b, i32 0
819 %vb = shufflevector <8 x double> %elt.head, <8 x double> poison, <8 x i32> zeroinitializer
820 %head = insertelement <8 x i1> poison, i1 true, i32 0
821 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer
822 %v = call <8 x double> @llvm.vp.fadd.v8f64(<8 x double> %va, <8 x double> %vb, <8 x i1> %m, i32 %evl)
826 declare <16 x double> @llvm.vp.fadd.v16f64(<16 x double>, <16 x double>, <16 x i1>, i32)
828 define <16 x double> @vfadd_vv_v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> %m, i32 zeroext %evl) {
829 ; CHECK-LABEL: vfadd_vv_v16f64:
831 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
832 ; CHECK-NEXT: vfadd.vv v8, v8, v16, v0.t
834 %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> %m, i32 %evl)
838 define <16 x double> @vfadd_vv_v16f64_unmasked(<16 x double> %va, <16 x double> %b, i32 zeroext %evl) {
839 ; CHECK-LABEL: vfadd_vv_v16f64_unmasked:
841 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
842 ; CHECK-NEXT: vfadd.vv v8, v8, v16
844 %head = insertelement <16 x i1> poison, i1 true, i32 0
845 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
846 %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %b, <16 x i1> %m, i32 %evl)
850 define <16 x double> @vfadd_vf_v16f64(<16 x double> %va, double %b, <16 x i1> %m, i32 zeroext %evl) {
851 ; CHECK-LABEL: vfadd_vf_v16f64:
853 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
854 ; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t
856 %elt.head = insertelement <16 x double> poison, double %b, i32 0
857 %vb = shufflevector <16 x double> %elt.head, <16 x double> poison, <16 x i32> zeroinitializer
858 %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %vb, <16 x i1> %m, i32 %evl)
862 define <16 x double> @vfadd_vf_v16f64_unmasked(<16 x double> %va, double %b, i32 zeroext %evl) {
863 ; CHECK-LABEL: vfadd_vf_v16f64_unmasked:
865 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
866 ; CHECK-NEXT: vfadd.vf v8, v8, fa0
868 %elt.head = insertelement <16 x double> poison, double %b, i32 0
869 %vb = shufflevector <16 x double> %elt.head, <16 x double> poison, <16 x i32> zeroinitializer
870 %head = insertelement <16 x i1> poison, i1 true, i32 0
871 %m = shufflevector <16 x i1> %head, <16 x i1> poison, <16 x i32> zeroinitializer
872 %v = call <16 x double> @llvm.vp.fadd.v16f64(<16 x double> %va, <16 x double> %vb, <16 x i1> %m, i32 %evl)