| blob | 129fbcfb88327b9962835148eadf10fc511e6002 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+v,+d -O0 < %s \
3 ; RUN: | FileCheck --check-prefix=SPILL-O0 %s
4 ; RUN: llc -mtriple=riscv32 -mattr=+v,+d -O2 < %s \
5 ; RUN: | FileCheck --check-prefix=SPILL-O2 %s
7 @.str = private unnamed_addr constant [6 x i8] c"hello\00", align 1
9 define <vscale x 1 x double> @foo(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 %gvl) nounwind
10 ; SPILL-O0-LABEL: foo:
11 ; SPILL-O0: # %bb.0:
12 ; SPILL-O0-NEXT: addi sp, sp, -32
13 ; SPILL-O0-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
14 ; SPILL-O0-NEXT: csrr a1, vlenb
15 ; SPILL-O0-NEXT: slli a1, a1, 1
16 ; SPILL-O0-NEXT: sub sp, sp, a1
17 ; SPILL-O0-NEXT: sw a0, 8(sp) # 4-byte Folded Spill
18 ; SPILL-O0-NEXT: vmv1r.v v10, v9
19 ; SPILL-O0-NEXT: vmv1r.v v9, v8
20 ; SPILL-O0-NEXT: csrr a1, vlenb
21 ; SPILL-O0-NEXT: add a1, sp, a1
22 ; SPILL-O0-NEXT: addi a1, a1, 16
23 ; SPILL-O0-NEXT: vs1r.v v9, (a1) # Unknown-size Folded Spill
24 ; SPILL-O0-NEXT: vsetvli zero, a0, e64, m1, ta, ma
25 ; SPILL-O0-NEXT: # implicit-def: $v8
26 ; SPILL-O0-NEXT: vfadd.vv v8, v9, v10
27 ; SPILL-O0-NEXT: addi a0, sp, 16
28 ; SPILL-O0-NEXT: vs1r.v v8, (a0) # Unknown-size Folded Spill
29 ; SPILL-O0-NEXT: lui a0, %hi(.L.str)
30 ; SPILL-O0-NEXT: addi a0, a0, %lo(.L.str)
31 ; SPILL-O0-NEXT: call puts
32 ; SPILL-O0-NEXT: addi a1, sp, 16
33 ; SPILL-O0-NEXT: vl1r.v v10, (a1) # Unknown-size Folded Reload
34 ; SPILL-O0-NEXT: csrr a1, vlenb
35 ; SPILL-O0-NEXT: add a1, sp, a1
36 ; SPILL-O0-NEXT: addi a1, a1, 16
37 ; SPILL-O0-NEXT: vl1r.v v9, (a1) # Unknown-size Folded Reload
38 ; SPILL-O0-NEXT: # kill: def $x11 killed $x10
39 ; SPILL-O0-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
40 ; SPILL-O0-NEXT: vsetvli zero, a0, e64, m1, ta, ma
41 ; SPILL-O0-NEXT: # implicit-def: $v8
42 ; SPILL-O0-NEXT: vfadd.vv v8, v9, v10
43 ; SPILL-O0-NEXT: csrr a0, vlenb
44 ; SPILL-O0-NEXT: slli a0, a0, 1
45 ; SPILL-O0-NEXT: add sp, sp, a0
46 ; SPILL-O0-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
47 ; SPILL-O0-NEXT: addi sp, sp, 32
48 ; SPILL-O0-NEXT: ret
49 ;
50 ; SPILL-O2-LABEL: foo:
51 ; SPILL-O2: # %bb.0:
52 ; SPILL-O2-NEXT: addi sp, sp, -32
53 ; SPILL-O2-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
54 ; SPILL-O2-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
55 ; SPILL-O2-NEXT: csrr a1, vlenb
56 ; SPILL-O2-NEXT: slli a1, a1, 1
57 ; SPILL-O2-NEXT: sub sp, sp, a1
58 ; SPILL-O2-NEXT: mv s0, a0
59 ; SPILL-O2-NEXT: addi a1, sp, 16
60 ; SPILL-O2-NEXT: vs1r.v v8, (a1) # Unknown-size Folded Spill
61 ; SPILL-O2-NEXT: vsetvli zero, a0, e64, m1, ta, ma
62 ; SPILL-O2-NEXT: vfadd.vv v9, v8, v9
63 ; SPILL-O2-NEXT: csrr a0, vlenb
64 ; SPILL-O2-NEXT: add a0, sp, a0
65 ; SPILL-O2-NEXT: addi a0, a0, 16
66 ; SPILL-O2-NEXT: vs1r.v v9, (a0) # Unknown-size Folded Spill
67 ; SPILL-O2-NEXT: lui a0, %hi(.L.str)
68 ; SPILL-O2-NEXT: addi a0, a0, %lo(.L.str)
69 ; SPILL-O2-NEXT: call puts
70 ; SPILL-O2-NEXT: vsetvli zero, s0, e64, m1, ta, ma
71 ; SPILL-O2-NEXT: csrr a0, vlenb
72 ; SPILL-O2-NEXT: add a0, sp, a0
73 ; SPILL-O2-NEXT: addi a0, a0, 16
74 ; SPILL-O2-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload
75 ; SPILL-O2-NEXT: addi a0, sp, 16
76 ; SPILL-O2-NEXT: vl1r.v v9, (a0) # Unknown-size Folded Reload
77 ; SPILL-O2-NEXT: vfadd.vv v8, v9, v8
78 ; SPILL-O2-NEXT: csrr a0, vlenb
79 ; SPILL-O2-NEXT: slli a0, a0, 1
80 ; SPILL-O2-NEXT: add sp, sp, a0
81 ; SPILL-O2-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
82 ; SPILL-O2-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
83 ; SPILL-O2-NEXT: addi sp, sp, 32
84 ; SPILL-O2-NEXT: ret
85 {
86 %x = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> undef, <vscale x 1 x double> %a, <vscale x 1 x double> %b, i32 7, i32 %gvl)
87 %call = call signext i32 @puts(ptr @.str)
88 %z = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> undef, <vscale x 1 x double> %a, <vscale x 1 x double> %x, i32 7, i32 %gvl)
89 ret <vscale x 1 x double> %z
90 }
92 declare <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %passthru, <vscale x 1 x double> %a, <vscale x 1 x double> %b, i32, i32 %gvl)
93 declare i32 @puts(ptr);