1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v \
3 ; RUN: -verify-machineinstrs < %s | FileCheck %s
4 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v \
5 ; RUN: -verify-machineinstrs < %s | FileCheck %s
7 declare void @llvm.vp.store.nxv1i8.p0(<vscale x 1 x i8>, <vscale x 1 x i8>*, <vscale x 1 x i1>, i32)
9 define void @vpstore_nxv1i8(<vscale x 1 x i8> %val, <vscale x 1 x i8>* %ptr, <vscale x 1 x i1> %m, i32 zeroext %evl) {
10 ; CHECK-LABEL: vpstore_nxv1i8:
12 ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
13 ; CHECK-NEXT: vse8.v v8, (a0), v0.t
15 call void @llvm.vp.store.nxv1i8.p0(<vscale x 1 x i8> %val, <vscale x 1 x i8>* %ptr, <vscale x 1 x i1> %m, i32 %evl)
19 declare void @llvm.vp.store.nxv2i8.p0(<vscale x 2 x i8>, <vscale x 2 x i8>*, <vscale x 2 x i1>, i32)
21 define void @vpstore_nxv2i8(<vscale x 2 x i8> %val, <vscale x 2 x i8>* %ptr, <vscale x 2 x i1> %m, i32 zeroext %evl) {
22 ; CHECK-LABEL: vpstore_nxv2i8:
24 ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma
25 ; CHECK-NEXT: vse8.v v8, (a0), v0.t
27 call void @llvm.vp.store.nxv2i8.p0(<vscale x 2 x i8> %val, <vscale x 2 x i8>* %ptr, <vscale x 2 x i1> %m, i32 %evl)
31 declare void @llvm.vp.store.nxv3i8.p0(<vscale x 3 x i8>, <vscale x 3 x i8>*, <vscale x 3 x i1>, i32)
33 define void @vpstore_nxv3i8(<vscale x 3 x i8> %val, <vscale x 3 x i8>* %ptr, <vscale x 3 x i1> %m, i32 zeroext %evl) {
34 ; CHECK-LABEL: vpstore_nxv3i8:
36 ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
37 ; CHECK-NEXT: vse8.v v8, (a0), v0.t
39 call void @llvm.vp.store.nxv3i8.p0(<vscale x 3 x i8> %val, <vscale x 3 x i8>* %ptr, <vscale x 3 x i1> %m, i32 %evl)
43 declare void @llvm.vp.store.nxv4i8.p0(<vscale x 4 x i8>, <vscale x 4 x i8>*, <vscale x 4 x i1>, i32)
45 define void @vpstore_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x i8>* %ptr, <vscale x 4 x i1> %m, i32 zeroext %evl) {
46 ; CHECK-LABEL: vpstore_nxv4i8:
48 ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma
49 ; CHECK-NEXT: vse8.v v8, (a0), v0.t
51 call void @llvm.vp.store.nxv4i8.p0(<vscale x 4 x i8> %val, <vscale x 4 x i8>* %ptr, <vscale x 4 x i1> %m, i32 %evl)
55 declare void @llvm.vp.store.nxv8i8.p0(<vscale x 8 x i8>, <vscale x 8 x i8>*, <vscale x 8 x i1>, i32)
57 define void @vpstore_nxv8i8(<vscale x 8 x i8> %val, <vscale x 8 x i8>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) {
58 ; CHECK-LABEL: vpstore_nxv8i8:
60 ; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma
61 ; CHECK-NEXT: vse8.v v8, (a0), v0.t
63 call void @llvm.vp.store.nxv8i8.p0(<vscale x 8 x i8> %val, <vscale x 8 x i8>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
67 declare void @llvm.vp.store.nxv1i16.p0(<vscale x 1 x i16>, <vscale x 1 x i16>*, <vscale x 1 x i1>, i32)
69 define void @vpstore_nxv1i16(<vscale x 1 x i16> %val, <vscale x 1 x i16>* %ptr, <vscale x 1 x i1> %m, i32 zeroext %evl) {
70 ; CHECK-LABEL: vpstore_nxv1i16:
72 ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
73 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
75 call void @llvm.vp.store.nxv1i16.p0(<vscale x 1 x i16> %val, <vscale x 1 x i16>* %ptr, <vscale x 1 x i1> %m, i32 %evl)
79 declare void @llvm.vp.store.nxv2i16.p0(<vscale x 2 x i16>, <vscale x 2 x i16>*, <vscale x 2 x i1>, i32)
81 define void @vpstore_nxv2i16(<vscale x 2 x i16> %val, <vscale x 2 x i16>* %ptr, <vscale x 2 x i1> %m, i32 zeroext %evl) {
82 ; CHECK-LABEL: vpstore_nxv2i16:
84 ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
85 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
87 call void @llvm.vp.store.nxv2i16.p0(<vscale x 2 x i16> %val, <vscale x 2 x i16>* %ptr, <vscale x 2 x i1> %m, i32 %evl)
91 declare void @llvm.vp.store.nxv4i16.p0(<vscale x 4 x i16>, <vscale x 4 x i16>*, <vscale x 4 x i1>, i32)
93 define void @vpstore_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x i16>* %ptr, <vscale x 4 x i1> %m, i32 zeroext %evl) {
94 ; CHECK-LABEL: vpstore_nxv4i16:
96 ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
97 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
99 call void @llvm.vp.store.nxv4i16.p0(<vscale x 4 x i16> %val, <vscale x 4 x i16>* %ptr, <vscale x 4 x i1> %m, i32 %evl)
103 declare void @llvm.vp.store.nxv8i16.p0(<vscale x 8 x i16>, <vscale x 8 x i16>*, <vscale x 8 x i1>, i32)
105 define void @vpstore_nxv8i16(<vscale x 8 x i16> %val, <vscale x 8 x i16>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) {
106 ; CHECK-LABEL: vpstore_nxv8i16:
108 ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
109 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
111 call void @llvm.vp.store.nxv8i16.p0(<vscale x 8 x i16> %val, <vscale x 8 x i16>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
115 declare void @llvm.vp.store.nxv1i32.p0(<vscale x 1 x i32>, <vscale x 1 x i32>*, <vscale x 1 x i1>, i32)
117 define void @vpstore_nxv1i32(<vscale x 1 x i32> %val, <vscale x 1 x i32>* %ptr, <vscale x 1 x i1> %m, i32 zeroext %evl) {
118 ; CHECK-LABEL: vpstore_nxv1i32:
120 ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
121 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
123 call void @llvm.vp.store.nxv1i32.p0(<vscale x 1 x i32> %val, <vscale x 1 x i32>* %ptr, <vscale x 1 x i1> %m, i32 %evl)
127 declare void @llvm.vp.store.nxv2i32.p0(<vscale x 2 x i32>, <vscale x 2 x i32>*, <vscale x 2 x i1>, i32)
129 define void @vpstore_nxv2i32(<vscale x 2 x i32> %val, <vscale x 2 x i32>* %ptr, <vscale x 2 x i1> %m, i32 zeroext %evl) {
130 ; CHECK-LABEL: vpstore_nxv2i32:
132 ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
133 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
135 call void @llvm.vp.store.nxv2i32.p0(<vscale x 2 x i32> %val, <vscale x 2 x i32>* %ptr, <vscale x 2 x i1> %m, i32 %evl)
139 declare void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32>, <vscale x 4 x i32>*, <vscale x 4 x i1>, i32)
141 define void @vpstore_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x i32>* %ptr, <vscale x 4 x i1> %m, i32 zeroext %evl) {
142 ; CHECK-LABEL: vpstore_nxv4i32:
144 ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
145 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
147 call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> %val, <vscale x 4 x i32>* %ptr, <vscale x 4 x i1> %m, i32 %evl)
151 declare void @llvm.vp.store.nxv8i32.p0(<vscale x 8 x i32>, <vscale x 8 x i32>*, <vscale x 8 x i1>, i32)
153 define void @vpstore_nxv8i32(<vscale x 8 x i32> %val, <vscale x 8 x i32>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) {
154 ; CHECK-LABEL: vpstore_nxv8i32:
156 ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma
157 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
159 call void @llvm.vp.store.nxv8i32.p0(<vscale x 8 x i32> %val, <vscale x 8 x i32>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
163 declare void @llvm.vp.store.nxv1i64.p0(<vscale x 1 x i64>, <vscale x 1 x i64>*, <vscale x 1 x i1>, i32)
165 define void @vpstore_nxv1i64(<vscale x 1 x i64> %val, <vscale x 1 x i64>* %ptr, <vscale x 1 x i1> %m, i32 zeroext %evl) {
166 ; CHECK-LABEL: vpstore_nxv1i64:
168 ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
169 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
171 call void @llvm.vp.store.nxv1i64.p0(<vscale x 1 x i64> %val, <vscale x 1 x i64>* %ptr, <vscale x 1 x i1> %m, i32 %evl)
175 declare void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64>, <vscale x 2 x i64>*, <vscale x 2 x i1>, i32)
177 define void @vpstore_nxv2i64(<vscale x 2 x i64> %val, <vscale x 2 x i64>* %ptr, <vscale x 2 x i1> %m, i32 zeroext %evl) {
178 ; CHECK-LABEL: vpstore_nxv2i64:
180 ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
181 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
183 call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> %val, <vscale x 2 x i64>* %ptr, <vscale x 2 x i1> %m, i32 %evl)
187 declare void @llvm.vp.store.nxv4i64.p0(<vscale x 4 x i64>, <vscale x 4 x i64>*, <vscale x 4 x i1>, i32)
189 define void @vpstore_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x i64>* %ptr, <vscale x 4 x i1> %m, i32 zeroext %evl) {
190 ; CHECK-LABEL: vpstore_nxv4i64:
192 ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma
193 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
195 call void @llvm.vp.store.nxv4i64.p0(<vscale x 4 x i64> %val, <vscale x 4 x i64>* %ptr, <vscale x 4 x i1> %m, i32 %evl)
199 declare void @llvm.vp.store.nxv8i64.p0(<vscale x 8 x i64>, <vscale x 8 x i64>*, <vscale x 8 x i1>, i32)
201 define void @vpstore_nxv8i64(<vscale x 8 x i64> %val, <vscale x 8 x i64>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) {
202 ; CHECK-LABEL: vpstore_nxv8i64:
204 ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma
205 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
207 call void @llvm.vp.store.nxv8i64.p0(<vscale x 8 x i64> %val, <vscale x 8 x i64>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
211 declare void @llvm.vp.store.nxv1f16.p0(<vscale x 1 x half>, <vscale x 1 x half>*, <vscale x 1 x i1>, i32)
213 define void @vpstore_nxv1f16(<vscale x 1 x half> %val, <vscale x 1 x half>* %ptr, <vscale x 1 x i1> %m, i32 zeroext %evl) {
214 ; CHECK-LABEL: vpstore_nxv1f16:
216 ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma
217 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
219 call void @llvm.vp.store.nxv1f16.p0(<vscale x 1 x half> %val, <vscale x 1 x half>* %ptr, <vscale x 1 x i1> %m, i32 %evl)
223 declare void @llvm.vp.store.nxv2f16.p0(<vscale x 2 x half>, <vscale x 2 x half>*, <vscale x 2 x i1>, i32)
225 define void @vpstore_nxv2f16(<vscale x 2 x half> %val, <vscale x 2 x half>* %ptr, <vscale x 2 x i1> %m, i32 zeroext %evl) {
226 ; CHECK-LABEL: vpstore_nxv2f16:
228 ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
229 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
231 call void @llvm.vp.store.nxv2f16.p0(<vscale x 2 x half> %val, <vscale x 2 x half>* %ptr, <vscale x 2 x i1> %m, i32 %evl)
235 declare void @llvm.vp.store.nxv4f16.p0(<vscale x 4 x half>, <vscale x 4 x half>*, <vscale x 4 x i1>, i32)
237 define void @vpstore_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x half>* %ptr, <vscale x 4 x i1> %m, i32 zeroext %evl) {
238 ; CHECK-LABEL: vpstore_nxv4f16:
240 ; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma
241 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
243 call void @llvm.vp.store.nxv4f16.p0(<vscale x 4 x half> %val, <vscale x 4 x half>* %ptr, <vscale x 4 x i1> %m, i32 %evl)
247 declare void @llvm.vp.store.nxv8f16.p0(<vscale x 8 x half>, <vscale x 8 x half>*, <vscale x 8 x i1>, i32)
249 define void @vpstore_nxv8f16(<vscale x 8 x half> %val, <vscale x 8 x half>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) {
250 ; CHECK-LABEL: vpstore_nxv8f16:
252 ; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma
253 ; CHECK-NEXT: vse16.v v8, (a0), v0.t
255 call void @llvm.vp.store.nxv8f16.p0(<vscale x 8 x half> %val, <vscale x 8 x half>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
259 declare void @llvm.vp.store.nxv1f32.p0(<vscale x 1 x float>, <vscale x 1 x float>*, <vscale x 1 x i1>, i32)
261 define void @vpstore_nxv1f32(<vscale x 1 x float> %val, <vscale x 1 x float>* %ptr, <vscale x 1 x i1> %m, i32 zeroext %evl) {
262 ; CHECK-LABEL: vpstore_nxv1f32:
264 ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma
265 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
267 call void @llvm.vp.store.nxv1f32.p0(<vscale x 1 x float> %val, <vscale x 1 x float>* %ptr, <vscale x 1 x i1> %m, i32 %evl)
271 declare void @llvm.vp.store.nxv2f32.p0(<vscale x 2 x float>, <vscale x 2 x float>*, <vscale x 2 x i1>, i32)
273 define void @vpstore_nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %m, i32 zeroext %evl) {
274 ; CHECK-LABEL: vpstore_nxv2f32:
276 ; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
277 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
279 call void @llvm.vp.store.nxv2f32.p0(<vscale x 2 x float> %val, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %m, i32 %evl)
283 declare void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float>, <vscale x 4 x float>*, <vscale x 4 x i1>, i32)
285 define void @vpstore_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x float>* %ptr, <vscale x 4 x i1> %m, i32 zeroext %evl) {
286 ; CHECK-LABEL: vpstore_nxv4f32:
288 ; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
289 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
291 call void @llvm.vp.store.nxv4f32.p0(<vscale x 4 x float> %val, <vscale x 4 x float>* %ptr, <vscale x 4 x i1> %m, i32 %evl)
295 declare void @llvm.vp.store.nxv8f32.p0(<vscale x 8 x float>, <vscale x 8 x float>*, <vscale x 8 x i1>, i32)
297 define void @vpstore_nxv8f32(<vscale x 8 x float> %val, <vscale x 8 x float>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) {
298 ; CHECK-LABEL: vpstore_nxv8f32:
300 ; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma
301 ; CHECK-NEXT: vse32.v v8, (a0), v0.t
303 call void @llvm.vp.store.nxv8f32.p0(<vscale x 8 x float> %val, <vscale x 8 x float>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
307 declare void @llvm.vp.store.nxv1f64.p0(<vscale x 1 x double>, <vscale x 1 x double>*, <vscale x 1 x i1>, i32)
309 define void @vpstore_nxv1f64(<vscale x 1 x double> %val, <vscale x 1 x double>* %ptr, <vscale x 1 x i1> %m, i32 zeroext %evl) {
310 ; CHECK-LABEL: vpstore_nxv1f64:
312 ; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma
313 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
315 call void @llvm.vp.store.nxv1f64.p0(<vscale x 1 x double> %val, <vscale x 1 x double>* %ptr, <vscale x 1 x i1> %m, i32 %evl)
319 declare void @llvm.vp.store.nxv2f64.p0(<vscale x 2 x double>, <vscale x 2 x double>*, <vscale x 2 x i1>, i32)
321 define void @vpstore_nxv2f64(<vscale x 2 x double> %val, <vscale x 2 x double>* %ptr, <vscale x 2 x i1> %m, i32 zeroext %evl) {
322 ; CHECK-LABEL: vpstore_nxv2f64:
324 ; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma
325 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
327 call void @llvm.vp.store.nxv2f64.p0(<vscale x 2 x double> %val, <vscale x 2 x double>* %ptr, <vscale x 2 x i1> %m, i32 %evl)
331 declare void @llvm.vp.store.nxv4f64.p0(<vscale x 4 x double>, <vscale x 4 x double>*, <vscale x 4 x i1>, i32)
333 define void @vpstore_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x double>* %ptr, <vscale x 4 x i1> %m, i32 zeroext %evl) {
334 ; CHECK-LABEL: vpstore_nxv4f64:
336 ; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma
337 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
339 call void @llvm.vp.store.nxv4f64.p0(<vscale x 4 x double> %val, <vscale x 4 x double>* %ptr, <vscale x 4 x i1> %m, i32 %evl)
343 declare void @llvm.vp.store.nxv8f64.p0(<vscale x 8 x double>, <vscale x 8 x double>*, <vscale x 8 x i1>, i32)
345 define void @vpstore_nxv8f64(<vscale x 8 x double> %val, <vscale x 8 x double>* %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) {
346 ; CHECK-LABEL: vpstore_nxv8f64:
348 ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma
349 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
351 call void @llvm.vp.store.nxv8f64.p0(<vscale x 8 x double> %val, <vscale x 8 x double>* %ptr, <vscale x 8 x i1> %m, i32 %evl)
355 define void @vpstore_nxv1i8_allones_mask(<vscale x 1 x i8> %val, <vscale x 1 x i8>* %ptr, i32 zeroext %evl) {
356 ; CHECK-LABEL: vpstore_nxv1i8_allones_mask:
358 ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma
359 ; CHECK-NEXT: vse8.v v8, (a0)
361 %a = insertelement <vscale x 1 x i1> poison, i1 true, i32 0
362 %b = shufflevector <vscale x 1 x i1> %a, <vscale x 1 x i1> poison, <vscale x 1 x i32> zeroinitializer
363 call void @llvm.vp.store.nxv1i8.p0(<vscale x 1 x i8> %val, <vscale x 1 x i8>* %ptr, <vscale x 1 x i1> %b, i32 %evl)
367 declare void @llvm.vp.store.nxv16f64.p0(<vscale x 16 x double>, <vscale x 16 x double>*, <vscale x 16 x i1>, i32)
369 define void @vpstore_nxv16f64(<vscale x 16 x double> %val, <vscale x 16 x double>* %ptr, <vscale x 16 x i1> %m, i32 zeroext %evl) {
370 ; CHECK-LABEL: vpstore_nxv16f64:
372 ; CHECK-NEXT: csrr a2, vlenb
373 ; CHECK-NEXT: mv a3, a1
374 ; CHECK-NEXT: bltu a1, a2, .LBB30_2
375 ; CHECK-NEXT: # %bb.1:
376 ; CHECK-NEXT: mv a3, a2
377 ; CHECK-NEXT: .LBB30_2:
378 ; CHECK-NEXT: vsetvli zero, a3, e64, m8, ta, ma
379 ; CHECK-NEXT: vse64.v v8, (a0), v0.t
380 ; CHECK-NEXT: sub a3, a1, a2
381 ; CHECK-NEXT: sltu a1, a1, a3
382 ; CHECK-NEXT: addi a1, a1, -1
383 ; CHECK-NEXT: and a1, a1, a3
384 ; CHECK-NEXT: slli a3, a2, 3
385 ; CHECK-NEXT: add a0, a0, a3
386 ; CHECK-NEXT: srli a2, a2, 3
387 ; CHECK-NEXT: vsetvli a3, zero, e8, mf4, ta, ma
388 ; CHECK-NEXT: vslidedown.vx v0, v0, a2
389 ; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma
390 ; CHECK-NEXT: vse64.v v16, (a0), v0.t
392 call void @llvm.vp.store.nxv16f64.p0(<vscale x 16 x double> %val, <vscale x 16 x double>* %ptr, <vscale x 16 x i1> %m, i32 %evl)
396 declare void @llvm.vp.store.nxv17f64.p0(<vscale x 17 x double>, <vscale x 17 x double>*, <vscale x 17 x i1>, i32)
398 ; Widen to nxv32f64 then split into 4 x nxv8f64, of which 1 is empty.
400 define void @vpstore_nxv17f64(<vscale x 17 x double> %val, <vscale x 17 x double>* %ptr, <vscale x 17 x i1> %m, i32 zeroext %evl) {
401 ; CHECK-LABEL: vpstore_nxv17f64:
403 ; CHECK-NEXT: csrr a3, vlenb
404 ; CHECK-NEXT: slli a4, a3, 1
405 ; CHECK-NEXT: vmv1r.v v24, v0
406 ; CHECK-NEXT: mv a5, a2
407 ; CHECK-NEXT: bltu a2, a4, .LBB31_2
408 ; CHECK-NEXT: # %bb.1:
409 ; CHECK-NEXT: mv a5, a4
410 ; CHECK-NEXT: .LBB31_2:
411 ; CHECK-NEXT: mv a6, a5
412 ; CHECK-NEXT: bltu a5, a3, .LBB31_4
413 ; CHECK-NEXT: # %bb.3:
414 ; CHECK-NEXT: mv a6, a3
415 ; CHECK-NEXT: .LBB31_4:
416 ; CHECK-NEXT: addi sp, sp, -16
417 ; CHECK-NEXT: .cfi_def_cfa_offset 16
418 ; CHECK-NEXT: csrr a7, vlenb
419 ; CHECK-NEXT: slli a7, a7, 3
420 ; CHECK-NEXT: sub sp, sp, a7
421 ; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
422 ; CHECK-NEXT: vl8re64.v v0, (a0)
423 ; CHECK-NEXT: addi a0, sp, 16
424 ; CHECK-NEXT: vs8r.v v0, (a0) # Unknown-size Folded Spill
425 ; CHECK-NEXT: vsetvli zero, a6, e64, m8, ta, ma
426 ; CHECK-NEXT: vmv1r.v v0, v24
427 ; CHECK-NEXT: vse64.v v8, (a1), v0.t
428 ; CHECK-NEXT: sub a0, a5, a3
429 ; CHECK-NEXT: sltu a5, a5, a0
430 ; CHECK-NEXT: addi a5, a5, -1
431 ; CHECK-NEXT: and a0, a5, a0
432 ; CHECK-NEXT: slli a5, a3, 3
433 ; CHECK-NEXT: add a5, a1, a5
434 ; CHECK-NEXT: srli a6, a3, 3
435 ; CHECK-NEXT: vsetvli a7, zero, e8, mf4, ta, ma
436 ; CHECK-NEXT: vslidedown.vx v0, v24, a6
437 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
438 ; CHECK-NEXT: sub a0, a2, a4
439 ; CHECK-NEXT: sltu a2, a2, a0
440 ; CHECK-NEXT: addi a2, a2, -1
441 ; CHECK-NEXT: and a0, a2, a0
442 ; CHECK-NEXT: vse64.v v16, (a5), v0.t
443 ; CHECK-NEXT: bltu a0, a3, .LBB31_6
444 ; CHECK-NEXT: # %bb.5:
445 ; CHECK-NEXT: mv a0, a3
446 ; CHECK-NEXT: .LBB31_6:
447 ; CHECK-NEXT: slli a2, a3, 4
448 ; CHECK-NEXT: add a1, a1, a2
449 ; CHECK-NEXT: srli a3, a3, 2
450 ; CHECK-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
451 ; CHECK-NEXT: vslidedown.vx v0, v24, a3
452 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma
453 ; CHECK-NEXT: addi a0, sp, 16
454 ; CHECK-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
455 ; CHECK-NEXT: vse64.v v8, (a1), v0.t
456 ; CHECK-NEXT: csrr a0, vlenb
457 ; CHECK-NEXT: slli a0, a0, 3
458 ; CHECK-NEXT: add sp, sp, a0
459 ; CHECK-NEXT: addi sp, sp, 16
461 call void @llvm.vp.store.nxv17f64.p0(<vscale x 17 x double> %val, <vscale x 17 x double>* %ptr, <vscale x 17 x i1> %m, i32 %evl)