1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s
3 ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s
5 define <vscale x 1 x i8> @vshl_vx_nxv1i8(<vscale x 1 x i8> %va, i8 signext %b) {
6 ; CHECK-LABEL: vshl_vx_nxv1i8:
8 ; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
9 ; CHECK-NEXT: vsll.vx v8, v8, a0
11 %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
12 %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
13 %vc = shl <vscale x 1 x i8> %va, %splat
14 ret <vscale x 1 x i8> %vc
17 define <vscale x 1 x i8> @vshl_vx_nxv1i8_0(<vscale x 1 x i8> %va) {
18 ; CHECK-LABEL: vshl_vx_nxv1i8_0:
20 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma
21 ; CHECK-NEXT: vsll.vi v8, v8, 6
23 %head = insertelement <vscale x 1 x i8> poison, i8 6, i32 0
24 %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
25 %vc = shl <vscale x 1 x i8> %va, %splat
26 ret <vscale x 1 x i8> %vc
29 define <vscale x 2 x i8> @vshl_vx_nxv2i8(<vscale x 2 x i8> %va, i8 signext %b) {
30 ; CHECK-LABEL: vshl_vx_nxv2i8:
32 ; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma
33 ; CHECK-NEXT: vsll.vx v8, v8, a0
35 %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0
36 %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
37 %vc = shl <vscale x 2 x i8> %va, %splat
38 ret <vscale x 2 x i8> %vc
41 define <vscale x 2 x i8> @vshl_vx_nxv2i8_0(<vscale x 2 x i8> %va) {
42 ; CHECK-LABEL: vshl_vx_nxv2i8_0:
44 ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma
45 ; CHECK-NEXT: vsll.vi v8, v8, 6
47 %head = insertelement <vscale x 2 x i8> poison, i8 6, i32 0
48 %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
49 %vc = shl <vscale x 2 x i8> %va, %splat
50 ret <vscale x 2 x i8> %vc
53 define <vscale x 4 x i8> @vshl_vx_nxv4i8(<vscale x 4 x i8> %va, i8 signext %b) {
54 ; CHECK-LABEL: vshl_vx_nxv4i8:
56 ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
57 ; CHECK-NEXT: vsll.vx v8, v8, a0
59 %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0
60 %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
61 %vc = shl <vscale x 4 x i8> %va, %splat
62 ret <vscale x 4 x i8> %vc
65 define <vscale x 4 x i8> @vshl_vx_nxv4i8_0(<vscale x 4 x i8> %va) {
66 ; CHECK-LABEL: vshl_vx_nxv4i8_0:
68 ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma
69 ; CHECK-NEXT: vsll.vi v8, v8, 6
71 %head = insertelement <vscale x 4 x i8> poison, i8 6, i32 0
72 %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
73 %vc = shl <vscale x 4 x i8> %va, %splat
74 ret <vscale x 4 x i8> %vc
77 define <vscale x 8 x i8> @vshl_vx_nxv8i8(<vscale x 8 x i8> %va, i8 signext %b) {
78 ; CHECK-LABEL: vshl_vx_nxv8i8:
80 ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, ma
81 ; CHECK-NEXT: vsll.vx v8, v8, a0
83 %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
84 %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
85 %vc = shl <vscale x 8 x i8> %va, %splat
86 ret <vscale x 8 x i8> %vc
89 define <vscale x 8 x i8> @vshl_vx_nxv8i8_0(<vscale x 8 x i8> %va) {
90 ; CHECK-LABEL: vshl_vx_nxv8i8_0:
92 ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma
93 ; CHECK-NEXT: vsll.vi v8, v8, 6
95 %head = insertelement <vscale x 8 x i8> poison, i8 6, i32 0
96 %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
97 %vc = shl <vscale x 8 x i8> %va, %splat
98 ret <vscale x 8 x i8> %vc
101 define <vscale x 16 x i8> @vshl_vx_nxv16i8(<vscale x 16 x i8> %va, i8 signext %b) {
102 ; CHECK-LABEL: vshl_vx_nxv16i8:
104 ; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, ma
105 ; CHECK-NEXT: vsll.vx v8, v8, a0
107 %head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0
108 %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
109 %vc = shl <vscale x 16 x i8> %va, %splat
110 ret <vscale x 16 x i8> %vc
113 define <vscale x 16 x i8> @vshl_vx_nxv16i8_0(<vscale x 16 x i8> %va) {
114 ; CHECK-LABEL: vshl_vx_nxv16i8_0:
116 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma
117 ; CHECK-NEXT: vsll.vi v8, v8, 6
119 %head = insertelement <vscale x 16 x i8> poison, i8 6, i32 0
120 %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
121 %vc = shl <vscale x 16 x i8> %va, %splat
122 ret <vscale x 16 x i8> %vc
125 define <vscale x 32 x i8> @vshl_vx_nxv32i8(<vscale x 32 x i8> %va, i8 signext %b) {
126 ; CHECK-LABEL: vshl_vx_nxv32i8:
128 ; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma
129 ; CHECK-NEXT: vsll.vx v8, v8, a0
131 %head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0
132 %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
133 %vc = shl <vscale x 32 x i8> %va, %splat
134 ret <vscale x 32 x i8> %vc
137 define <vscale x 32 x i8> @vshl_vx_nxv32i8_0(<vscale x 32 x i8> %va) {
138 ; CHECK-LABEL: vshl_vx_nxv32i8_0:
140 ; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma
141 ; CHECK-NEXT: vsll.vi v8, v8, 6
143 %head = insertelement <vscale x 32 x i8> poison, i8 6, i32 0
144 %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
145 %vc = shl <vscale x 32 x i8> %va, %splat
146 ret <vscale x 32 x i8> %vc
149 define <vscale x 64 x i8> @vshl_vx_nxv64i8(<vscale x 64 x i8> %va, i8 signext %b) {
150 ; CHECK-LABEL: vshl_vx_nxv64i8:
152 ; CHECK-NEXT: vsetvli a1, zero, e8, m8, ta, ma
153 ; CHECK-NEXT: vsll.vx v8, v8, a0
155 %head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0
156 %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
157 %vc = shl <vscale x 64 x i8> %va, %splat
158 ret <vscale x 64 x i8> %vc
161 define <vscale x 64 x i8> @vshl_vx_nxv64i8_0(<vscale x 64 x i8> %va) {
162 ; CHECK-LABEL: vshl_vx_nxv64i8_0:
164 ; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma
165 ; CHECK-NEXT: vsll.vi v8, v8, 6
167 %head = insertelement <vscale x 64 x i8> poison, i8 6, i32 0
168 %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
169 %vc = shl <vscale x 64 x i8> %va, %splat
170 ret <vscale x 64 x i8> %vc
173 define <vscale x 1 x i16> @vshl_vx_nxv1i16(<vscale x 1 x i16> %va, i16 signext %b) {
174 ; CHECK-LABEL: vshl_vx_nxv1i16:
176 ; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
177 ; CHECK-NEXT: vsll.vx v8, v8, a0
179 %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0
180 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
181 %vc = shl <vscale x 1 x i16> %va, %splat
182 ret <vscale x 1 x i16> %vc
185 define <vscale x 1 x i16> @vshl_vx_nxv1i16_0(<vscale x 1 x i16> %va) {
186 ; CHECK-LABEL: vshl_vx_nxv1i16_0:
188 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
189 ; CHECK-NEXT: vsll.vi v8, v8, 6
191 %head = insertelement <vscale x 1 x i16> poison, i16 6, i32 0
192 %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
193 %vc = shl <vscale x 1 x i16> %va, %splat
194 ret <vscale x 1 x i16> %vc
197 define <vscale x 2 x i16> @vshl_vx_nxv2i16(<vscale x 2 x i16> %va, i16 signext %b) {
198 ; CHECK-LABEL: vshl_vx_nxv2i16:
200 ; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
201 ; CHECK-NEXT: vsll.vx v8, v8, a0
203 %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0
204 %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
205 %vc = shl <vscale x 2 x i16> %va, %splat
206 ret <vscale x 2 x i16> %vc
209 define <vscale x 2 x i16> @vshl_vx_nxv2i16_0(<vscale x 2 x i16> %va) {
210 ; CHECK-LABEL: vshl_vx_nxv2i16_0:
212 ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
213 ; CHECK-NEXT: vsll.vi v8, v8, 6
215 %head = insertelement <vscale x 2 x i16> poison, i16 6, i32 0
216 %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
217 %vc = shl <vscale x 2 x i16> %va, %splat
218 ret <vscale x 2 x i16> %vc
221 define <vscale x 4 x i16> @vshl_vx_nxv4i16(<vscale x 4 x i16> %va, i16 signext %b) {
222 ; CHECK-LABEL: vshl_vx_nxv4i16:
224 ; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
225 ; CHECK-NEXT: vsll.vx v8, v8, a0
227 %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0
228 %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
229 %vc = shl <vscale x 4 x i16> %va, %splat
230 ret <vscale x 4 x i16> %vc
233 define <vscale x 4 x i16> @vshl_vx_nxv4i16_0(<vscale x 4 x i16> %va) {
234 ; CHECK-LABEL: vshl_vx_nxv4i16_0:
236 ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
237 ; CHECK-NEXT: vsll.vi v8, v8, 6
239 %head = insertelement <vscale x 4 x i16> poison, i16 6, i32 0
240 %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
241 %vc = shl <vscale x 4 x i16> %va, %splat
242 ret <vscale x 4 x i16> %vc
245 define <vscale x 8 x i16> @vshl_vx_nxv8i16(<vscale x 8 x i16> %va, i16 signext %b) {
246 ; CHECK-LABEL: vshl_vx_nxv8i16:
248 ; CHECK-NEXT: vsetvli a1, zero, e16, m2, ta, ma
249 ; CHECK-NEXT: vsll.vx v8, v8, a0
251 %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0
252 %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
253 %vc = shl <vscale x 8 x i16> %va, %splat
254 ret <vscale x 8 x i16> %vc
257 define <vscale x 8 x i16> @vshl_vx_nxv8i16_0(<vscale x 8 x i16> %va) {
258 ; CHECK-LABEL: vshl_vx_nxv8i16_0:
260 ; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
261 ; CHECK-NEXT: vsll.vi v8, v8, 6
263 %head = insertelement <vscale x 8 x i16> poison, i16 6, i32 0
264 %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
265 %vc = shl <vscale x 8 x i16> %va, %splat
266 ret <vscale x 8 x i16> %vc
269 define <vscale x 16 x i16> @vshl_vx_nxv16i16(<vscale x 16 x i16> %va, i16 signext %b) {
270 ; CHECK-LABEL: vshl_vx_nxv16i16:
272 ; CHECK-NEXT: vsetvli a1, zero, e16, m4, ta, ma
273 ; CHECK-NEXT: vsll.vx v8, v8, a0
275 %head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0
276 %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
277 %vc = shl <vscale x 16 x i16> %va, %splat
278 ret <vscale x 16 x i16> %vc
281 define <vscale x 16 x i16> @vshl_vx_nxv16i16_0(<vscale x 16 x i16> %va) {
282 ; CHECK-LABEL: vshl_vx_nxv16i16_0:
284 ; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
285 ; CHECK-NEXT: vsll.vi v8, v8, 6
287 %head = insertelement <vscale x 16 x i16> poison, i16 6, i32 0
288 %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
289 %vc = shl <vscale x 16 x i16> %va, %splat
290 ret <vscale x 16 x i16> %vc
293 define <vscale x 32 x i16> @vshl_vx_nxv32i16(<vscale x 32 x i16> %va, i16 signext %b) {
294 ; CHECK-LABEL: vshl_vx_nxv32i16:
296 ; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma
297 ; CHECK-NEXT: vsll.vx v8, v8, a0
299 %head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0
300 %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
301 %vc = shl <vscale x 32 x i16> %va, %splat
302 ret <vscale x 32 x i16> %vc
305 define <vscale x 32 x i16> @vshl_vx_nxv32i16_0(<vscale x 32 x i16> %va) {
306 ; CHECK-LABEL: vshl_vx_nxv32i16_0:
308 ; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
309 ; CHECK-NEXT: vsll.vi v8, v8, 6
311 %head = insertelement <vscale x 32 x i16> poison, i16 6, i32 0
312 %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
313 %vc = shl <vscale x 32 x i16> %va, %splat
314 ret <vscale x 32 x i16> %vc
317 define <vscale x 1 x i32> @vshl_vx_nxv1i32(<vscale x 1 x i32> %va, i32 signext %b) {
318 ; CHECK-LABEL: vshl_vx_nxv1i32:
320 ; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
321 ; CHECK-NEXT: vsll.vx v8, v8, a0
323 %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
324 %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
325 %vc = shl <vscale x 1 x i32> %va, %splat
326 ret <vscale x 1 x i32> %vc
329 define <vscale x 1 x i32> @vshl_vx_nxv1i32_0(<vscale x 1 x i32> %va) {
330 ; CHECK-LABEL: vshl_vx_nxv1i32_0:
332 ; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
333 ; CHECK-NEXT: vsll.vi v8, v8, 31
335 %head = insertelement <vscale x 1 x i32> poison, i32 31, i32 0
336 %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
337 %vc = shl <vscale x 1 x i32> %va, %splat
338 ret <vscale x 1 x i32> %vc
341 define <vscale x 2 x i32> @vshl_vx_nxv2i32(<vscale x 2 x i32> %va, i32 signext %b) {
342 ; CHECK-LABEL: vshl_vx_nxv2i32:
344 ; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
345 ; CHECK-NEXT: vsll.vx v8, v8, a0
347 %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0
348 %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
349 %vc = shl <vscale x 2 x i32> %va, %splat
350 ret <vscale x 2 x i32> %vc
353 define <vscale x 2 x i32> @vshl_vx_nxv2i32_0(<vscale x 2 x i32> %va) {
354 ; CHECK-LABEL: vshl_vx_nxv2i32_0:
356 ; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
357 ; CHECK-NEXT: vsll.vi v8, v8, 31
359 %head = insertelement <vscale x 2 x i32> poison, i32 31, i32 0
360 %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
361 %vc = shl <vscale x 2 x i32> %va, %splat
362 ret <vscale x 2 x i32> %vc
365 define <vscale x 4 x i32> @vshl_vx_nxv4i32(<vscale x 4 x i32> %va, i32 signext %b) {
366 ; CHECK-LABEL: vshl_vx_nxv4i32:
368 ; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma
369 ; CHECK-NEXT: vsll.vx v8, v8, a0
371 %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0
372 %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
373 %vc = shl <vscale x 4 x i32> %va, %splat
374 ret <vscale x 4 x i32> %vc
377 define <vscale x 4 x i32> @vshl_vx_nxv4i32_0(<vscale x 4 x i32> %va) {
378 ; CHECK-LABEL: vshl_vx_nxv4i32_0:
380 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
381 ; CHECK-NEXT: vsll.vi v8, v8, 31
383 %head = insertelement <vscale x 4 x i32> poison, i32 31, i32 0
384 %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
385 %vc = shl <vscale x 4 x i32> %va, %splat
386 ret <vscale x 4 x i32> %vc
389 define <vscale x 8 x i32> @vshl_vx_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b) {
390 ; CHECK-LABEL: vshl_vx_nxv8i32:
392 ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma
393 ; CHECK-NEXT: vsll.vx v8, v8, a0
395 %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
396 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
397 %vc = shl <vscale x 8 x i32> %va, %splat
398 ret <vscale x 8 x i32> %vc
401 define <vscale x 8 x i32> @vshl_vx_nxv8i32_0(<vscale x 8 x i32> %va) {
402 ; CHECK-LABEL: vshl_vx_nxv8i32_0:
404 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
405 ; CHECK-NEXT: vsll.vi v8, v8, 31
407 %head = insertelement <vscale x 8 x i32> poison, i32 31, i32 0
408 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
409 %vc = shl <vscale x 8 x i32> %va, %splat
410 ret <vscale x 8 x i32> %vc
413 define <vscale x 16 x i32> @vshl_vx_nxv16i32(<vscale x 16 x i32> %va, i32 signext %b) {
414 ; CHECK-LABEL: vshl_vx_nxv16i32:
416 ; CHECK-NEXT: vsetvli a1, zero, e32, m8, ta, ma
417 ; CHECK-NEXT: vsll.vx v8, v8, a0
419 %head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0
420 %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
421 %vc = shl <vscale x 16 x i32> %va, %splat
422 ret <vscale x 16 x i32> %vc
425 define <vscale x 16 x i32> @vshl_vx_nxv16i32_0(<vscale x 16 x i32> %va) {
426 ; CHECK-LABEL: vshl_vx_nxv16i32_0:
428 ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
429 ; CHECK-NEXT: vsll.vi v8, v8, 31
431 %head = insertelement <vscale x 16 x i32> poison, i32 31, i32 0
432 %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
433 %vc = shl <vscale x 16 x i32> %va, %splat
434 ret <vscale x 16 x i32> %vc
437 define <vscale x 1 x i64> @vshl_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b) {
438 ; CHECK-LABEL: vshl_vx_nxv1i64:
440 ; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, ma
441 ; CHECK-NEXT: vsll.vx v8, v8, a0
443 %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
444 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
445 %vc = shl <vscale x 1 x i64> %va, %splat
446 ret <vscale x 1 x i64> %vc
449 define <vscale x 1 x i64> @vshl_vx_nxv1i64_0(<vscale x 1 x i64> %va) {
450 ; CHECK-LABEL: vshl_vx_nxv1i64_0:
452 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
453 ; CHECK-NEXT: vsll.vi v8, v8, 31
455 %head = insertelement <vscale x 1 x i64> poison, i64 31, i32 0
456 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
457 %vc = shl <vscale x 1 x i64> %va, %splat
458 ret <vscale x 1 x i64> %vc
461 define <vscale x 1 x i64> @vshl_vx_nxv1i64_1(<vscale x 1 x i64> %va) {
462 ; CHECK-LABEL: vshl_vx_nxv1i64_1:
464 ; CHECK-NEXT: li a0, 32
465 ; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, ma
466 ; CHECK-NEXT: vsll.vx v8, v8, a0
468 %head = insertelement <vscale x 1 x i64> poison, i64 32, i32 0
469 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
470 %vc = shl <vscale x 1 x i64> %va, %splat
471 ret <vscale x 1 x i64> %vc
474 define <vscale x 1 x i64> @vshl_vx_nxv1i64_2(<vscale x 1 x i64> %va) {
475 ; CHECK-LABEL: vshl_vx_nxv1i64_2:
477 ; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
478 ; CHECK-NEXT: vadd.vv v8, v8, v8
480 %head = insertelement <vscale x 1 x i64> poison, i64 1, i32 0
481 %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
482 %vc = shl <vscale x 1 x i64> %va, %splat
483 ret <vscale x 1 x i64> %vc
486 define <vscale x 2 x i64> @vshl_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b) {
487 ; CHECK-LABEL: vshl_vx_nxv2i64:
489 ; CHECK-NEXT: vsetvli a1, zero, e64, m2, ta, ma
490 ; CHECK-NEXT: vsll.vx v8, v8, a0
492 %head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0
493 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
494 %vc = shl <vscale x 2 x i64> %va, %splat
495 ret <vscale x 2 x i64> %vc
498 define <vscale x 2 x i64> @vshl_vx_nxv2i64_0(<vscale x 2 x i64> %va) {
499 ; CHECK-LABEL: vshl_vx_nxv2i64_0:
501 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
502 ; CHECK-NEXT: vsll.vi v8, v8, 31
504 %head = insertelement <vscale x 2 x i64> poison, i64 31, i32 0
505 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
506 %vc = shl <vscale x 2 x i64> %va, %splat
507 ret <vscale x 2 x i64> %vc
510 define <vscale x 2 x i64> @vshl_vx_nxv2i64_1(<vscale x 2 x i64> %va) {
511 ; CHECK-LABEL: vshl_vx_nxv2i64_1:
513 ; CHECK-NEXT: li a0, 32
514 ; CHECK-NEXT: vsetvli a1, zero, e64, m2, ta, ma
515 ; CHECK-NEXT: vsll.vx v8, v8, a0
517 %head = insertelement <vscale x 2 x i64> poison, i64 32, i32 0
518 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
519 %vc = shl <vscale x 2 x i64> %va, %splat
520 ret <vscale x 2 x i64> %vc
523 define <vscale x 2 x i64> @vshl_vx_nxv2i64_2(<vscale x 2 x i64> %va) {
524 ; CHECK-LABEL: vshl_vx_nxv2i64_2:
526 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
527 ; CHECK-NEXT: vadd.vv v8, v8, v8
529 %head = insertelement <vscale x 2 x i64> poison, i64 1, i32 0
530 %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
531 %vc = shl <vscale x 2 x i64> %va, %splat
532 ret <vscale x 2 x i64> %vc
535 define <vscale x 4 x i64> @vshl_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b) {
536 ; CHECK-LABEL: vshl_vx_nxv4i64:
538 ; CHECK-NEXT: vsetvli a1, zero, e64, m4, ta, ma
539 ; CHECK-NEXT: vsll.vx v8, v8, a0
541 %head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0
542 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
543 %vc = shl <vscale x 4 x i64> %va, %splat
544 ret <vscale x 4 x i64> %vc
547 define <vscale x 4 x i64> @vshl_vx_nxv4i64_0(<vscale x 4 x i64> %va) {
548 ; CHECK-LABEL: vshl_vx_nxv4i64_0:
550 ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
551 ; CHECK-NEXT: vsll.vi v8, v8, 31
553 %head = insertelement <vscale x 4 x i64> poison, i64 31, i32 0
554 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
555 %vc = shl <vscale x 4 x i64> %va, %splat
556 ret <vscale x 4 x i64> %vc
559 define <vscale x 4 x i64> @vshl_vx_nxv4i64_1(<vscale x 4 x i64> %va) {
560 ; CHECK-LABEL: vshl_vx_nxv4i64_1:
562 ; CHECK-NEXT: li a0, 32
563 ; CHECK-NEXT: vsetvli a1, zero, e64, m4, ta, ma
564 ; CHECK-NEXT: vsll.vx v8, v8, a0
566 %head = insertelement <vscale x 4 x i64> poison, i64 32, i32 0
567 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
568 %vc = shl <vscale x 4 x i64> %va, %splat
569 ret <vscale x 4 x i64> %vc
572 define <vscale x 4 x i64> @vshl_vx_nxv4i64_2(<vscale x 4 x i64> %va) {
573 ; CHECK-LABEL: vshl_vx_nxv4i64_2:
575 ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
576 ; CHECK-NEXT: vadd.vv v8, v8, v8
578 %head = insertelement <vscale x 4 x i64> poison, i64 1, i32 0
579 %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
580 %vc = shl <vscale x 4 x i64> %va, %splat
581 ret <vscale x 4 x i64> %vc
584 define <vscale x 8 x i64> @vshl_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b) {
585 ; CHECK-LABEL: vshl_vx_nxv8i64:
587 ; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, ma
588 ; CHECK-NEXT: vsll.vx v8, v8, a0
590 %head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
591 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
592 %vc = shl <vscale x 8 x i64> %va, %splat
593 ret <vscale x 8 x i64> %vc
596 define <vscale x 8 x i64> @vshl_vx_nxv8i64_0(<vscale x 8 x i64> %va) {
597 ; CHECK-LABEL: vshl_vx_nxv8i64_0:
599 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
600 ; CHECK-NEXT: vsll.vi v8, v8, 31
602 %head = insertelement <vscale x 8 x i64> poison, i64 31, i32 0
603 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
604 %vc = shl <vscale x 8 x i64> %va, %splat
605 ret <vscale x 8 x i64> %vc
608 define <vscale x 8 x i64> @vshl_vx_nxv8i64_1(<vscale x 8 x i64> %va) {
609 ; CHECK-LABEL: vshl_vx_nxv8i64_1:
611 ; CHECK-NEXT: li a0, 32
612 ; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, ma
613 ; CHECK-NEXT: vsll.vx v8, v8, a0
615 %head = insertelement <vscale x 8 x i64> poison, i64 32, i32 0
616 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
617 %vc = shl <vscale x 8 x i64> %va, %splat
618 ret <vscale x 8 x i64> %vc
621 define <vscale x 8 x i64> @vshl_vx_nxv8i64_2(<vscale x 8 x i64> %va) {
622 ; CHECK-LABEL: vshl_vx_nxv8i64_2:
624 ; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
625 ; CHECK-NEXT: vadd.vv v8, v8, v8
627 %head = insertelement <vscale x 8 x i64> poison, i64 1, i32 0
628 %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
629 %vc = shl <vscale x 8 x i64> %va, %splat
630 ret <vscale x 8 x i64> %vc
633 define <vscale x 8 x i32> @vshl_vv_mask_nxv4i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %mask) {
634 ; CHECK-LABEL: vshl_vv_mask_nxv4i32:
636 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, mu
637 ; CHECK-NEXT: vsll.vv v8, v8, v12, v0.t
639 %vs = select <vscale x 8 x i1> %mask, <vscale x 8 x i32> %vb, <vscale x 8 x i32> zeroinitializer
640 %vc = shl <vscale x 8 x i32> %va, %vs
641 ret <vscale x 8 x i32> %vc
644 define <vscale x 8 x i32> @vshl_vx_mask_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b, <vscale x 8 x i1> %mask) {
645 ; CHECK-LABEL: vshl_vx_mask_nxv8i32:
647 ; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, mu
648 ; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t
650 %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
651 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
652 %vs = select <vscale x 8 x i1> %mask, <vscale x 8 x i32> %splat, <vscale x 8 x i32> zeroinitializer
653 %vc = shl <vscale x 8 x i32> %va, %vs
654 ret <vscale x 8 x i32> %vc
657 define <vscale x 8 x i32> @vshl_vi_mask_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %mask) {
658 ; CHECK-LABEL: vshl_vi_mask_nxv8i32:
660 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, mu
661 ; CHECK-NEXT: vsll.vi v8, v8, 31, v0.t
663 %head = insertelement <vscale x 8 x i32> poison, i32 31, i32 0
664 %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
665 %vs = select <vscale x 8 x i1> %mask, <vscale x 8 x i32> %splat, <vscale x 8 x i32> zeroinitializer
666 %vc = shl <vscale x 8 x i32> %va, %vs
667 ret <vscale x 8 x i32> %vc