1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
3 ;;; Test vector sequential number intrinsic instructions
6 ;;; We test VSEQ*l, VSEQ*l_v, PVSEQ*l, and PVSEQ*l_v instructions.
8 ; Function Attrs: nounwind readnone
9 define fastcc <256 x double> @vseq_vl() {
10 ; CHECK-LABEL: vseq_vl:
12 ; CHECK-NEXT: lea %s0, 256
14 ; CHECK-NEXT: vseq %v0
15 ; CHECK-NEXT: b.l.t (, %s10)
16 %1 = tail call fast <256 x double> @llvm.ve.vl.vseq.vl(i32 256)
20 ; Function Attrs: nounwind readnone
21 declare <256 x double> @llvm.ve.vl.vseq.vl(i32)
23 ; Function Attrs: nounwind readnone
24 define fastcc <256 x double> @vseq_vvl(<256 x double> %0) {
25 ; CHECK-LABEL: vseq_vvl:
27 ; CHECK-NEXT: lea %s0, 256
29 ; CHECK-NEXT: vseq %v0
30 ; CHECK-NEXT: b.l.t (, %s10)
31 %2 = tail call fast <256 x double> @llvm.ve.vl.vseq.vvl(<256 x double> %0, i32 256)
35 ; Function Attrs: nounwind readnone
36 declare <256 x double> @llvm.ve.vl.vseq.vvl(<256 x double>, i32)
38 ; Function Attrs: nounwind readnone
39 define fastcc <256 x double> @pvseqlo_vl() {
40 ; CHECK-LABEL: pvseqlo_vl:
42 ; CHECK-NEXT: lea %s0, 256
44 ; CHECK-NEXT: pvseq.lo %v0
45 ; CHECK-NEXT: b.l.t (, %s10)
46 %1 = tail call fast <256 x double> @llvm.ve.vl.pvseqlo.vl(i32 256)
50 ; Function Attrs: nounwind readnone
51 declare <256 x double> @llvm.ve.vl.pvseqlo.vl(i32)
53 ; Function Attrs: nounwind readnone
54 define fastcc <256 x double> @pvseqlo_vvl(<256 x double> %0) {
55 ; CHECK-LABEL: pvseqlo_vvl:
57 ; CHECK-NEXT: lea %s0, 256
59 ; CHECK-NEXT: pvseq.lo %v0
60 ; CHECK-NEXT: b.l.t (, %s10)
61 %2 = tail call fast <256 x double> @llvm.ve.vl.pvseqlo.vvl(<256 x double> %0, i32 256)
65 ; Function Attrs: nounwind readnone
66 declare <256 x double> @llvm.ve.vl.pvseqlo.vvl(<256 x double>, i32)
68 ; Function Attrs: nounwind readnone
69 define fastcc <256 x double> @pvsequp_vl() {
70 ; CHECK-LABEL: pvsequp_vl:
72 ; CHECK-NEXT: lea %s0, 256
74 ; CHECK-NEXT: pvseq.up %v0
75 ; CHECK-NEXT: b.l.t (, %s10)
76 %1 = tail call fast <256 x double> @llvm.ve.vl.pvsequp.vl(i32 256)
80 ; Function Attrs: nounwind readnone
81 declare <256 x double> @llvm.ve.vl.pvsequp.vl(i32)
83 ; Function Attrs: nounwind readnone
84 define fastcc <256 x double> @pvsequp_vvl(<256 x double> %0) {
85 ; CHECK-LABEL: pvsequp_vvl:
87 ; CHECK-NEXT: lea %s0, 256
89 ; CHECK-NEXT: pvseq.up %v0
90 ; CHECK-NEXT: b.l.t (, %s10)
91 %2 = tail call fast <256 x double> @llvm.ve.vl.pvsequp.vvl(<256 x double> %0, i32 256)
95 ; Function Attrs: nounwind readnone
96 declare <256 x double> @llvm.ve.vl.pvsequp.vvl(<256 x double>, i32)
98 ; Function Attrs: nounwind readnone
99 define fastcc <256 x double> @pvseq_vl() {
100 ; CHECK-LABEL: pvseq_vl:
102 ; CHECK-NEXT: lea %s0, 256
103 ; CHECK-NEXT: lvl %s0
104 ; CHECK-NEXT: pvseq %v0
105 ; CHECK-NEXT: b.l.t (, %s10)
106 %1 = tail call fast <256 x double> @llvm.ve.vl.pvseq.vl(i32 256)
107 ret <256 x double> %1
110 ; Function Attrs: nounwind readnone
111 declare <256 x double> @llvm.ve.vl.pvseq.vl(i32)
113 ; Function Attrs: nounwind readnone
114 define fastcc <256 x double> @pvseq_vvl(<256 x double> %0) {
115 ; CHECK-LABEL: pvseq_vvl:
117 ; CHECK-NEXT: lea %s0, 256
118 ; CHECK-NEXT: lvl %s0
119 ; CHECK-NEXT: pvseq %v0
120 ; CHECK-NEXT: b.l.t (, %s10)
121 %2 = tail call fast <256 x double> @llvm.ve.vl.pvseq.vvl(<256 x double> %0, i32 256)
122 ret <256 x double> %2
125 ; Function Attrs: nounwind readnone
126 declare <256 x double> @llvm.ve.vl.pvseq.vvl(<256 x double>, i32)