1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s -check-prefix=X640
3 ; RUN: llc -O0 -mtriple=i686-unknown -o - %s | FileCheck %s -check-prefix=6860
4 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s -check-prefix=X64
5 ; RUN: llc -mtriple=i686-unknown -o - %s | FileCheck %s -check-prefix=686
7 @var_22 = external dso_local global i16, align 2
8 @var_27 = external dso_local global i16, align 2
12 ; X640: # %bb.0: # %bb
13 ; X640-NEXT: movzwl var_22, %eax
14 ; X640-NEXT: movzwl var_27, %ecx
15 ; X640-NEXT: xorl %ecx, %eax
16 ; X640-NEXT: movzwl var_27, %ecx
17 ; X640-NEXT: xorl %ecx, %eax
19 ; X640-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
20 ; X640-NEXT: movzwl var_22, %eax
21 ; X640-NEXT: movzwl var_27, %ecx
22 ; X640-NEXT: xorl %ecx, %eax
23 ; X640-NEXT: movzwl var_27, %ecx
24 ; X640-NEXT: xorl %ecx, %eax
26 ; X640-NEXT: movzwl var_27, %ecx
27 ; X640-NEXT: subl $16610, %ecx # imm = 0x40E2
28 ; X640-NEXT: movl %ecx, %ecx
29 ; X640-NEXT: # kill: def $rcx killed $ecx
30 ; X640-NEXT: # kill: def $cl killed $rcx
31 ; X640-NEXT: sarq %cl, %rax
32 ; X640-NEXT: movb %al, %cl
33 ; X640-NEXT: # implicit-def: $rax
34 ; X640-NEXT: movb %cl, (%rax)
38 ; 6860: # %bb.0: # %bb
39 ; 6860-NEXT: pushl %ebp
40 ; 6860-NEXT: .cfi_def_cfa_offset 8
41 ; 6860-NEXT: .cfi_offset %ebp, -8
42 ; 6860-NEXT: movl %esp, %ebp
43 ; 6860-NEXT: .cfi_def_cfa_register %ebp
44 ; 6860-NEXT: andl $-8, %esp
45 ; 6860-NEXT: subl $24, %esp
46 ; 6860-NEXT: movzwl var_22, %eax
47 ; 6860-NEXT: movl %eax, {{[0-9]+}}(%esp)
48 ; 6860-NEXT: movl $0, {{[0-9]+}}(%esp)
49 ; 6860-NEXT: movzwl var_22, %edx
50 ; 6860-NEXT: movb var_27, %cl
51 ; 6860-NEXT: addb $30, %cl
52 ; 6860-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
53 ; 6860-NEXT: xorl %eax, %eax
54 ; 6860-NEXT: shrdl %cl, %eax, %edx
55 ; 6860-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload
56 ; 6860-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
57 ; 6860-NEXT: testb $32, %cl
58 ; 6860-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
59 ; 6860-NEXT: jne .LBB0_2
60 ; 6860-NEXT: # %bb.1: # %bb
61 ; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
62 ; 6860-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
63 ; 6860-NEXT: .LBB0_2: # %bb
64 ; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
65 ; 6860-NEXT: movb %al, %cl
66 ; 6860-NEXT: # implicit-def: $eax
67 ; 6860-NEXT: movb %cl, (%eax)
68 ; 6860-NEXT: movl %ebp, %esp
69 ; 6860-NEXT: popl %ebp
70 ; 6860-NEXT: .cfi_def_cfa %esp, 4
75 ; X64-NEXT: movzbl var_27(%rip), %ecx
76 ; X64-NEXT: movzwl var_22(%rip), %eax
77 ; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
78 ; X64-NEXT: addb $30, %cl
79 ; X64-NEXT: shrq %cl, %rax
80 ; X64-NEXT: movb %al, (%rax)
85 ; 686-NEXT: pushl %ebp
86 ; 686-NEXT: .cfi_def_cfa_offset 8
87 ; 686-NEXT: .cfi_offset %ebp, -8
88 ; 686-NEXT: movl %esp, %ebp
89 ; 686-NEXT: .cfi_def_cfa_register %ebp
90 ; 686-NEXT: andl $-8, %esp
91 ; 686-NEXT: subl $8, %esp
92 ; 686-NEXT: movzbl var_27, %ecx
93 ; 686-NEXT: movzwl var_22, %eax
94 ; 686-NEXT: movl %eax, (%esp)
95 ; 686-NEXT: movl $0, {{[0-9]+}}(%esp)
96 ; 686-NEXT: addb $30, %cl
97 ; 686-NEXT: xorl %edx, %edx
98 ; 686-NEXT: shrdl %cl, %edx, %eax
99 ; 686-NEXT: testb $32, %cl
100 ; 686-NEXT: jne .LBB0_2
101 ; 686-NEXT: # %bb.1: # %bb
102 ; 686-NEXT: movl %eax, %edx
103 ; 686-NEXT: .LBB0_2: # %bb
104 ; 686-NEXT: movb %dl, (%eax)
105 ; 686-NEXT: movl %ebp, %esp
106 ; 686-NEXT: popl %ebp
107 ; 686-NEXT: .cfi_def_cfa %esp, 4
110 %tmp = alloca i64, align 8
111 %tmp1 = load i16, ptr @var_22, align 2
112 %tmp2 = zext i16 %tmp1 to i32
113 %tmp3 = load i16, ptr @var_27, align 2
114 %tmp4 = zext i16 %tmp3 to i32
115 %tmp5 = xor i32 %tmp2, %tmp4
116 %tmp6 = load i16, ptr @var_27, align 2
117 %tmp7 = zext i16 %tmp6 to i32
118 %tmp8 = xor i32 %tmp5, %tmp7
119 %tmp9 = sext i32 %tmp8 to i64
120 store i64 %tmp9, ptr %tmp, align 8
121 %tmp10 = load i16, ptr @var_22, align 2
122 %tmp11 = zext i16 %tmp10 to i32
123 %tmp12 = load i16, ptr @var_27, align 2
124 %tmp13 = zext i16 %tmp12 to i32
125 %tmp14 = xor i32 %tmp11, %tmp13
126 %tmp15 = load i16, ptr @var_27, align 2
127 %tmp16 = zext i16 %tmp15 to i32
128 %tmp17 = xor i32 %tmp14, %tmp16
129 %tmp18 = sext i32 %tmp17 to i64
130 %tmp19 = load i16, ptr @var_27, align 2
131 %tmp20 = zext i16 %tmp19 to i32
132 %tmp21 = sub nsw i32 %tmp20, 16610
133 %tmp22 = zext i32 %tmp21 to i64
134 %tmp23 = ashr i64 %tmp18, %tmp22
135 %tmp24 = trunc i64 %tmp23 to i8
136 store i8 %tmp24, ptr undef, align 1