1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-slow-incdec | FileCheck %s --check-prefixes=X64,X64-FASTINC
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-incdec | FileCheck %s --check-prefixes=X64,X64-SLOWINC
6 define i32 @xori64i32(i64 %a) {
7 ; X86-LABEL: xori64i32:
9 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
10 ; X86-NEXT: sarl $31, %eax
11 ; X86-NEXT: xorl $2147483647, %eax # imm = 0x7FFFFFFF
14 ; X64-LABEL: xori64i32:
16 ; X64-NEXT: movq %rdi, %rax
17 ; X64-NEXT: sarq $63, %rax
18 ; X64-NEXT: xorl $2147483647, %eax # imm = 0x7FFFFFFF
19 ; X64-NEXT: # kill: def $eax killed $eax killed $rax
21 %shr4 = ashr i64 %a, 63
22 %conv5 = trunc i64 %shr4 to i32
23 %xor = xor i32 %conv5, 2147483647
27 define i64 @selecti64i64(i64 %a) {
28 ; X86-LABEL: selecti64i64:
30 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
31 ; X86-NEXT: sarl $31, %edx
32 ; X86-NEXT: movl %edx, %eax
33 ; X86-NEXT: xorl $2147483647, %eax # imm = 0x7FFFFFFF
36 ; X64-LABEL: selecti64i64:
38 ; X64-NEXT: movq %rdi, %rax
39 ; X64-NEXT: sarq $63, %rax
40 ; X64-NEXT: xorq $2147483647, %rax # imm = 0x7FFFFFFF
42 %c = icmp sgt i64 %a, -1
43 %s = select i1 %c, i64 2147483647, i64 -2147483648
47 define i32 @selecti64i32(i64 %a) {
48 ; X86-LABEL: selecti64i32:
50 ; X86-NEXT: xorl %eax, %eax
51 ; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
53 ; X86-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
56 ; X64-LABEL: selecti64i32:
58 ; X64-NEXT: xorl %eax, %eax
59 ; X64-NEXT: testq %rdi, %rdi
61 ; X64-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
63 %c = icmp sgt i64 %a, -1
64 %s = select i1 %c, i32 2147483647, i32 -2147483648
68 define i64 @selecti32i64(i32 %a) {
69 ; X86-LABEL: selecti32i64:
71 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
72 ; X86-NEXT: sarl $31, %edx
73 ; X86-NEXT: movl %edx, %eax
74 ; X86-NEXT: xorl $2147483647, %eax # imm = 0x7FFFFFFF
77 ; X64-LABEL: selecti32i64:
79 ; X64-NEXT: sarl $31, %edi
80 ; X64-NEXT: movslq %edi, %rax
81 ; X64-NEXT: xorq $2147483647, %rax # imm = 0x7FFFFFFF
83 %c = icmp sgt i32 %a, -1
84 %s = select i1 %c, i64 2147483647, i64 -2147483648
90 define i8 @xori32i8(i32 %a) {
91 ; X86-LABEL: xori32i8:
93 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
94 ; X86-NEXT: sarl $31, %eax
95 ; X86-NEXT: xorb $84, %al
96 ; X86-NEXT: # kill: def $al killed $al killed $eax
99 ; X64-LABEL: xori32i8:
101 ; X64-NEXT: movl %edi, %eax
102 ; X64-NEXT: sarl $31, %eax
103 ; X64-NEXT: xorb $84, %al
104 ; X64-NEXT: # kill: def $al killed $al killed $eax
106 %shr4 = ashr i32 %a, 31
107 %conv5 = trunc i32 %shr4 to i8
108 %xor = xor i8 %conv5, 84
112 define i32 @selecti32i32(i32 %a) {
113 ; X86-LABEL: selecti32i32:
115 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
116 ; X86-NEXT: sarl $31, %eax
117 ; X86-NEXT: xorl $84, %eax
120 ; X64-LABEL: selecti32i32:
122 ; X64-NEXT: movl %edi, %eax
123 ; X64-NEXT: sarl $31, %eax
124 ; X64-NEXT: xorl $84, %eax
126 %c = icmp sgt i32 %a, -1
127 %s = select i1 %c, i32 84, i32 -85
131 define i8 @selecti32i8(i32 %a) {
132 ; X86-LABEL: selecti32i8:
134 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
135 ; X86-NEXT: sarl $31, %eax
136 ; X86-NEXT: xorb $84, %al
137 ; X86-NEXT: # kill: def $al killed $al killed $eax
140 ; X64-LABEL: selecti32i8:
142 ; X64-NEXT: movl %edi, %eax
143 ; X64-NEXT: sarl $31, %eax
144 ; X64-NEXT: xorb $84, %al
145 ; X64-NEXT: # kill: def $al killed $al killed $eax
147 %c = icmp sgt i32 %a, -1
148 %s = select i1 %c, i8 84, i8 -85
152 define i32 @selecti8i32(i8 %a) {
153 ; X86-LABEL: selecti8i32:
155 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
156 ; X86-NEXT: sarb $7, %al
157 ; X86-NEXT: movsbl %al, %eax
158 ; X86-NEXT: xorl $84, %eax
161 ; X64-LABEL: selecti8i32:
163 ; X64-NEXT: sarb $7, %dil
164 ; X64-NEXT: movsbl %dil, %eax
165 ; X64-NEXT: xorl $84, %eax
167 %c = icmp sgt i8 %a, -1
168 %s = select i1 %c, i32 84, i32 -85
172 define i32 @icmpasreq(i32 %input, i32 %a, i32 %b) {
173 ; X86-LABEL: icmpasreq:
175 ; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
176 ; X86-NEXT: js .LBB8_1
178 ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
179 ; X86-NEXT: movl (%eax), %eax
182 ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
183 ; X86-NEXT: movl (%eax), %eax
186 ; X64-LABEL: icmpasreq:
188 ; X64-NEXT: movl %esi, %eax
189 ; X64-NEXT: testl %edi, %edi
190 ; X64-NEXT: cmovnsl %edx, %eax
192 %sh = ashr i32 %input, 31
193 %c = icmp eq i32 %sh, -1
194 %s = select i1 %c, i32 %a, i32 %b
198 define i32 @icmpasrne(i32 %input, i32 %a, i32 %b) {
199 ; X86-LABEL: icmpasrne:
201 ; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
202 ; X86-NEXT: jns .LBB9_1
204 ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
205 ; X86-NEXT: movl (%eax), %eax
208 ; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
209 ; X86-NEXT: movl (%eax), %eax
212 ; X64-LABEL: icmpasrne:
214 ; X64-NEXT: movl %esi, %eax
215 ; X64-NEXT: testl %edi, %edi
216 ; X64-NEXT: cmovsl %edx, %eax
218 %sh = ashr i32 %input, 31
219 %c = icmp ne i32 %sh, -1
220 %s = select i1 %c, i32 %a, i32 %b
224 define i32 @oneusecmp(i32 %a, i32 %b, i32 %d) {
225 ; X86-LABEL: oneusecmp:
227 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
228 ; X86-NEXT: movl %ecx, %eax
229 ; X86-NEXT: sarl $31, %eax
230 ; X86-NEXT: xorl $127, %eax
231 ; X86-NEXT: testl %ecx, %ecx
232 ; X86-NEXT: js .LBB10_1
234 ; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
235 ; X86-NEXT: addl (%ecx), %eax
237 ; X86-NEXT: .LBB10_1:
238 ; X86-NEXT: leal {{[0-9]+}}(%esp), %ecx
239 ; X86-NEXT: addl (%ecx), %eax
242 ; X64-LABEL: oneusecmp:
244 ; X64-NEXT: movl %edi, %eax
245 ; X64-NEXT: sarl $31, %eax
246 ; X64-NEXT: xorl $127, %eax
247 ; X64-NEXT: testl %edi, %edi
248 ; X64-NEXT: cmovsl %edx, %esi
249 ; X64-NEXT: addl %esi, %eax
251 %c = icmp sle i32 %a, -1
252 %s = select i1 %c, i32 -128, i32 127
253 %s2 = select i1 %c, i32 %d, i32 %b
257 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
258 ; X64-FASTINC: {{.*}}
259 ; X64-SLOWINC: {{.*}}