| blob | ca5558561a65b9e08a0e4f78793160c4d1245b06 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4 ; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon | FileCheck %s --check-prefix=ATHLON
5 ; RUN: llc < %s -mtriple=i386-intel-elfiamcu | FileCheck %s --check-prefix=MCU
7 ; PR5757
8 %0 = type { i64, i32 }
10 define i32 @test1(ptr %p, ptr %q, i1 %r) nounwind {
11 ; GENERIC-LABEL: test1:
12 ; GENERIC: ## %bb.0:
13 ; GENERIC-NEXT: testb $1, %dl
14 ; GENERIC-NEXT: cmoveq %rsi, %rdi
15 ; GENERIC-NEXT: movl 8(%rdi), %eax
16 ; GENERIC-NEXT: retq
17 ;
18 ; ATOM-LABEL: test1:
19 ; ATOM: ## %bb.0:
20 ; ATOM-NEXT: testb $1, %dl
21 ; ATOM-NEXT: cmoveq %rsi, %rdi
22 ; ATOM-NEXT: movl 8(%rdi), %eax
23 ; ATOM-NEXT: nop
24 ; ATOM-NEXT: nop
25 ; ATOM-NEXT: retq
26 ;
27 ; ATHLON-LABEL: test1:
28 ; ATHLON: ## %bb.0:
29 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
30 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
31 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
32 ; ATHLON-NEXT: cmovnel %eax, %ecx
33 ; ATHLON-NEXT: movl (%ecx), %eax
34 ; ATHLON-NEXT: movl 8(%eax), %eax
35 ; ATHLON-NEXT: retl
36 ;
37 ; MCU-LABEL: test1:
38 ; MCU: # %bb.0:
39 ; MCU-NEXT: testb $1, %cl
40 ; MCU-NEXT: jne .LBB0_2
41 ; MCU-NEXT: # %bb.1:
42 ; MCU-NEXT: movl %edx, %eax
43 ; MCU-NEXT: .LBB0_2:
44 ; MCU-NEXT: movl 8(%eax), %eax
45 ; MCU-NEXT: retl
46 %t0 = load %0, ptr %p
47 %t1 = load %0, ptr %q
48 %t4 = select i1 %r, %0 %t0, %0 %t1
49 %t5 = extractvalue %0 %t4, 1
50 ret i32 %t5
51 }
53 ; PR2139
54 define i32 @test2() nounwind {
55 ; GENERIC-LABEL: test2:
56 ; GENERIC: ## %bb.0: ## %entry
57 ; GENERIC-NEXT: pushq %rax
58 ; GENERIC-NEXT: callq _return_false
59 ; GENERIC-NEXT: xorl %ecx, %ecx
60 ; GENERIC-NEXT: testb $1, %al
61 ; GENERIC-NEXT: movl $-3840, %eax ## imm = 0xF100
62 ; GENERIC-NEXT: cmovnel %ecx, %eax
63 ; GENERIC-NEXT: cmpl $32768, %eax ## imm = 0x8000
64 ; GENERIC-NEXT: jge LBB1_1
65 ; GENERIC-NEXT: ## %bb.2: ## %bb91
66 ; GENERIC-NEXT: xorl %eax, %eax
67 ; GENERIC-NEXT: popq %rcx
68 ; GENERIC-NEXT: retq
69 ; GENERIC-NEXT: LBB1_1: ## %bb90
70 ; GENERIC-NEXT: ud2
71 ;
72 ; ATOM-LABEL: test2:
73 ; ATOM: ## %bb.0: ## %entry
74 ; ATOM-NEXT: pushq %rax
75 ; ATOM-NEXT: callq _return_false
76 ; ATOM-NEXT: xorl %ecx, %ecx
77 ; ATOM-NEXT: movl $-3840, %edx ## imm = 0xF100
78 ; ATOM-NEXT: testb $1, %al
79 ; ATOM-NEXT: cmovnel %ecx, %edx
80 ; ATOM-NEXT: cmpl $32768, %edx ## imm = 0x8000
81 ; ATOM-NEXT: jge LBB1_1
82 ; ATOM-NEXT: ## %bb.2: ## %bb91
83 ; ATOM-NEXT: xorl %eax, %eax
84 ; ATOM-NEXT: popq %rcx
85 ; ATOM-NEXT: retq
86 ; ATOM-NEXT: LBB1_1: ## %bb90
87 ; ATOM-NEXT: ud2
88 ;
89 ; ATHLON-LABEL: test2:
90 ; ATHLON: ## %bb.0: ## %entry
91 ; ATHLON-NEXT: subl $12, %esp
92 ; ATHLON-NEXT: calll _return_false
93 ; ATHLON-NEXT: xorl %ecx, %ecx
94 ; ATHLON-NEXT: testb $1, %al
95 ; ATHLON-NEXT: movl $-3840, %eax ## imm = 0xF100
96 ; ATHLON-NEXT: cmovnel %ecx, %eax
97 ; ATHLON-NEXT: cmpl $32768, %eax ## imm = 0x8000
98 ; ATHLON-NEXT: jge LBB1_1
99 ; ATHLON-NEXT: ## %bb.2: ## %bb91
100 ; ATHLON-NEXT: xorl %eax, %eax
101 ; ATHLON-NEXT: addl $12, %esp
102 ; ATHLON-NEXT: retl
103 ; ATHLON-NEXT: LBB1_1: ## %bb90
104 ; ATHLON-NEXT: ud2
105 ;
106 ; MCU-LABEL: test2:
107 ; MCU: # %bb.0: # %entry
108 ; MCU-NEXT: calll return_false@PLT
109 ; MCU-NEXT: xorl %ecx, %ecx
110 ; MCU-NEXT: testb $1, %al
111 ; MCU-NEXT: jne .LBB1_2
112 ; MCU-NEXT: # %bb.1: # %entry
113 ; MCU-NEXT: movl $-3840, %ecx # imm = 0xF100
114 ; MCU-NEXT: .LBB1_2: # %entry
115 ; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000
116 ; MCU-NEXT: jge .LBB1_3
117 ; MCU-NEXT: # %bb.4: # %bb91
118 ; MCU-NEXT: xorl %eax, %eax
119 ; MCU-NEXT: retl
120 ; MCU-NEXT: .LBB1_3: # %bb90
121 entry:
122 %tmp73 = tail call i1 @return_false()
123 %g.0 = select i1 %tmp73, i16 0, i16 -480
124 %tmp7778 = sext i16 %g.0 to i32
125 %tmp80 = shl i32 %tmp7778, 3
126 %tmp87 = icmp sgt i32 %tmp80, 32767
127 br i1 %tmp87, label %bb90, label %bb91
128 bb90:
129 unreachable
130 bb91:
131 ret i32 0
132 }
134 declare i1 @return_false()
136 ;; Select between two floating point constants.
137 define float @test3(i32 %x) nounwind readnone {
138 ; GENERIC-LABEL: test3:
139 ; GENERIC: ## %bb.0: ## %entry
140 ; GENERIC-NEXT: xorl %eax, %eax
141 ; GENERIC-NEXT: testl %edi, %edi
142 ; GENERIC-NEXT: sete %al
143 ; GENERIC-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
144 ; GENERIC-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
145 ; GENERIC-NEXT: retq
146 ;
147 ; ATOM-LABEL: test3:
148 ; ATOM: ## %bb.0: ## %entry
149 ; ATOM-NEXT: xorl %eax, %eax
150 ; ATOM-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx
151 ; ATOM-NEXT: testl %edi, %edi
152 ; ATOM-NEXT: sete %al
153 ; ATOM-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
154 ; ATOM-NEXT: retq
155 ;
156 ; ATHLON-LABEL: test3:
157 ; ATHLON: ## %bb.0: ## %entry
158 ; ATHLON-NEXT: xorl %eax, %eax
159 ; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp)
160 ; ATHLON-NEXT: sete %al
161 ; ATHLON-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}(,%eax,4)
162 ; ATHLON-NEXT: retl
163 ;
164 ; MCU-LABEL: test3:
165 ; MCU: # %bb.0: # %entry
166 ; MCU-NEXT: xorl %ecx, %ecx
167 ; MCU-NEXT: testl %eax, %eax
168 ; MCU-NEXT: sete %cl
169 ; MCU-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4)
170 ; MCU-NEXT: retl
171 entry:
172 %0 = icmp eq i32 %x, 0
173 %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
174 ret float %iftmp.0.0
175 }
177 define signext i8 @test4(ptr nocapture %P, double %F) nounwind readonly {
178 ; CHECK-LABEL: test4:
179 ; CHECK: ## %bb.0: ## %entry
180 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = [4.2E+1,0.0E+0]
181 ; CHECK-NEXT: xorl %eax, %eax
182 ; CHECK-NEXT: ucomisd %xmm0, %xmm1
183 ; CHECK-NEXT: seta %al
184 ; CHECK-NEXT: movsbl (%rdi,%rax,4), %eax
185 ; CHECK-NEXT: retq
186 ;
187 ; ATHLON-LABEL: test4:
188 ; ATHLON: ## %bb.0: ## %entry
189 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
190 ; ATHLON-NEXT: fldl {{[0-9]+}}(%esp)
191 ; ATHLON-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
192 ; ATHLON-NEXT: xorl %ecx, %ecx
193 ; ATHLON-NEXT: fucompi %st(1), %st
194 ; ATHLON-NEXT: fstp %st(0)
195 ; ATHLON-NEXT: seta %cl
196 ; ATHLON-NEXT: movsbl (%eax,%ecx,4), %eax
197 ; ATHLON-NEXT: retl
198 ;
199 ; MCU-LABEL: test4:
200 ; MCU: # %bb.0: # %entry
201 ; MCU-NEXT: movl %eax, %ecx
202 ; MCU-NEXT: fldl {{[0-9]+}}(%esp)
203 ; MCU-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
204 ; MCU-NEXT: fucompp
205 ; MCU-NEXT: fnstsw %ax
206 ; MCU-NEXT: xorl %edx, %edx
207 ; MCU-NEXT: # kill: def $ah killed $ah killed $ax
208 ; MCU-NEXT: sahf
209 ; MCU-NEXT: seta %dl
210 ; MCU-NEXT: movzbl (%ecx,%edx,4), %eax
211 ; MCU-NEXT: retl
212 entry:
213 %0 = fcmp olt double %F, 4.200000e+01
214 %iftmp.0.0 = select i1 %0, i32 4, i32 0
215 %1 = getelementptr i8, ptr %P, i32 %iftmp.0.0
216 %2 = load i8, ptr %1, align 1
217 ret i8 %2
218 }
220 define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, ptr %p) nounwind {
221 ; GENERIC-LABEL: test5:
222 ; GENERIC: ## %bb.0:
223 ; GENERIC-NEXT: testb $1, %dil
224 ; GENERIC-NEXT: jne LBB4_2
225 ; GENERIC-NEXT: ## %bb.1:
226 ; GENERIC-NEXT: movaps %xmm1, %xmm0
227 ; GENERIC-NEXT: LBB4_2:
228 ; GENERIC-NEXT: movss %xmm0, (%rsi)
229 ; GENERIC-NEXT: retq
230 ;
231 ; ATOM-LABEL: test5:
232 ; ATOM: ## %bb.0:
233 ; ATOM-NEXT: testb $1, %dil
234 ; ATOM-NEXT: jne LBB4_2
235 ; ATOM-NEXT: ## %bb.1:
236 ; ATOM-NEXT: movaps %xmm1, %xmm0
237 ; ATOM-NEXT: LBB4_2:
238 ; ATOM-NEXT: movss %xmm0, (%rsi)
239 ; ATOM-NEXT: nop
240 ; ATOM-NEXT: nop
241 ; ATOM-NEXT: retq
242 ;
243 ; ATHLON-LABEL: test5:
244 ; ATHLON: ## %bb.0:
245 ; ATHLON-NEXT: pushl %esi
246 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
247 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
248 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
249 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx
250 ; ATHLON-NEXT: cmovnel %ecx, %edx
251 ; ATHLON-NEXT: movzwl (%edx), %ecx
252 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx
253 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi
254 ; ATHLON-NEXT: cmovnel %edx, %esi
255 ; ATHLON-NEXT: movzwl (%esi), %edx
256 ; ATHLON-NEXT: movw %dx, 2(%eax)
257 ; ATHLON-NEXT: movw %cx, (%eax)
258 ; ATHLON-NEXT: popl %esi
259 ; ATHLON-NEXT: retl
260 ;
261 ; MCU-LABEL: test5:
262 ; MCU: # %bb.0:
263 ; MCU-NEXT: pushl %esi
264 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %esi
265 ; MCU-NEXT: testb $1, %al
266 ; MCU-NEXT: jne .LBB4_2
267 ; MCU-NEXT: # %bb.1:
268 ; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
269 ; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %edx
270 ; MCU-NEXT: .LBB4_2:
271 ; MCU-NEXT: movw %cx, 2(%esi)
272 ; MCU-NEXT: movw %dx, (%esi)
273 ; MCU-NEXT: popl %esi
274 ; MCU-NEXT: retl
275 %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
276 store <2 x i16> %x, ptr %p
277 ret void
278 }
280 ; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
281 define void @test6(i32 %C, ptr %A, ptr %B) nounwind {
282 ; CHECK-LABEL: test6:
283 ; CHECK: ## %bb.0:
284 ; CHECK-NEXT: testl %edi, %edi
285 ; CHECK-NEXT: je LBB5_1
286 ; CHECK-NEXT: ## %bb.2:
287 ; CHECK-NEXT: movaps (%rsi), %xmm0
288 ; CHECK-NEXT: movaps %xmm0, (%rsi)
289 ; CHECK-NEXT: retq
290 ; CHECK-NEXT: LBB5_1:
291 ; CHECK-NEXT: movaps (%rdx), %xmm0
292 ; CHECK-NEXT: mulps %xmm0, %xmm0
293 ; CHECK-NEXT: movaps %xmm0, (%rsi)
294 ; CHECK-NEXT: retq
295 ;
296 ; ATHLON-LABEL: test6:
297 ; ATHLON: ## %bb.0:
298 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
299 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
300 ; ATHLON-NEXT: flds 12(%eax)
301 ; ATHLON-NEXT: flds 8(%eax)
302 ; ATHLON-NEXT: flds 4(%eax)
303 ; ATHLON-NEXT: flds (%eax)
304 ; ATHLON-NEXT: flds (%ecx)
305 ; ATHLON-NEXT: fmul %st, %st(0)
306 ; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp)
307 ; ATHLON-NEXT: fxch %st(1)
308 ; ATHLON-NEXT: fcmove %st(1), %st
309 ; ATHLON-NEXT: fstp %st(1)
310 ; ATHLON-NEXT: flds 4(%ecx)
311 ; ATHLON-NEXT: fmul %st, %st(0)
312 ; ATHLON-NEXT: fxch %st(2)
313 ; ATHLON-NEXT: fcmove %st(2), %st
314 ; ATHLON-NEXT: fstp %st(2)
315 ; ATHLON-NEXT: flds 8(%ecx)
316 ; ATHLON-NEXT: fmul %st, %st(0)
317 ; ATHLON-NEXT: fxch %st(3)
318 ; ATHLON-NEXT: fcmove %st(3), %st
319 ; ATHLON-NEXT: fstp %st(3)
320 ; ATHLON-NEXT: flds 12(%ecx)
321 ; ATHLON-NEXT: fmul %st, %st(0)
322 ; ATHLON-NEXT: fxch %st(4)
323 ; ATHLON-NEXT: fcmove %st(4), %st
324 ; ATHLON-NEXT: fstp %st(4)
325 ; ATHLON-NEXT: fxch %st(3)
326 ; ATHLON-NEXT: fstps 12(%eax)
327 ; ATHLON-NEXT: fxch %st(1)
328 ; ATHLON-NEXT: fstps 8(%eax)
329 ; ATHLON-NEXT: fstps 4(%eax)
330 ; ATHLON-NEXT: fstps (%eax)
331 ; ATHLON-NEXT: retl
332 ;
333 ; MCU-LABEL: test6:
334 ; MCU: # %bb.0:
335 ; MCU-NEXT: pushl %eax
336 ; MCU-NEXT: flds 12(%edx)
337 ; MCU-NEXT: fstps (%esp) # 4-byte Folded Spill
338 ; MCU-NEXT: flds 8(%edx)
339 ; MCU-NEXT: flds 4(%edx)
340 ; MCU-NEXT: flds (%ecx)
341 ; MCU-NEXT: flds 4(%ecx)
342 ; MCU-NEXT: flds 8(%ecx)
343 ; MCU-NEXT: flds 12(%ecx)
344 ; MCU-NEXT: fmul %st, %st(0)
345 ; MCU-NEXT: fxch %st(1)
346 ; MCU-NEXT: fmul %st, %st(0)
347 ; MCU-NEXT: fxch %st(2)
348 ; MCU-NEXT: fmul %st, %st(0)
349 ; MCU-NEXT: fxch %st(3)
350 ; MCU-NEXT: fmul %st, %st(0)
351 ; MCU-NEXT: testl %eax, %eax
352 ; MCU-NEXT: flds (%edx)
353 ; MCU-NEXT: je .LBB5_2
354 ; MCU-NEXT: # %bb.1:
355 ; MCU-NEXT: fstp %st(1)
356 ; MCU-NEXT: fstp %st(3)
357 ; MCU-NEXT: fstp %st(1)
358 ; MCU-NEXT: fstp %st(0)
359 ; MCU-NEXT: flds (%esp) # 4-byte Folded Reload
360 ; MCU-NEXT: fldz
361 ; MCU-NEXT: fldz
362 ; MCU-NEXT: fldz
363 ; MCU-NEXT: fxch %st(1)
364 ; MCU-NEXT: fxch %st(6)
365 ; MCU-NEXT: fxch %st(1)
366 ; MCU-NEXT: fxch %st(5)
367 ; MCU-NEXT: fxch %st(4)
368 ; MCU-NEXT: fxch %st(1)
369 ; MCU-NEXT: fxch %st(3)
370 ; MCU-NEXT: fxch %st(2)
371 ; MCU-NEXT: .LBB5_2:
372 ; MCU-NEXT: fstp %st(0)
373 ; MCU-NEXT: fstp %st(5)
374 ; MCU-NEXT: fstp %st(3)
375 ; MCU-NEXT: fxch %st(2)
376 ; MCU-NEXT: fstps 12(%edx)
377 ; MCU-NEXT: fxch %st(1)
378 ; MCU-NEXT: fstps 8(%edx)
379 ; MCU-NEXT: fstps 4(%edx)
380 ; MCU-NEXT: fstps (%edx)
381 ; MCU-NEXT: popl %eax
382 ; MCU-NEXT: retl
383 %tmp = load <4 x float>, ptr %A
384 %tmp3 = load <4 x float>, ptr %B
385 %tmp9 = fmul <4 x float> %tmp3, %tmp3
386 %tmp.upgrd.1 = icmp eq i32 %C, 0
387 %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
388 store <4 x float> %iftmp.38.0, ptr %A
389 ret void
390 }
392 ; Select with fp80's
393 define x86_fp80 @test7(i32 %tmp8) nounwind {
394 ; GENERIC-LABEL: test7:
395 ; GENERIC: ## %bb.0:
396 ; GENERIC-NEXT: ## kill: def $edi killed $edi def $rdi
397 ; GENERIC-NEXT: notl %edi
398 ; GENERIC-NEXT: shrl $27, %edi
399 ; GENERIC-NEXT: andl $-16, %edi
400 ; GENERIC-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax
401 ; GENERIC-NEXT: fldt (%rdi,%rax)
402 ; GENERIC-NEXT: retq
403 ;
404 ; ATOM-LABEL: test7:
405 ; ATOM: ## %bb.0:
406 ; ATOM-NEXT: ## kill: def $edi killed $edi def $rdi
407 ; ATOM-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax
408 ; ATOM-NEXT: notl %edi
409 ; ATOM-NEXT: shrl $27, %edi
410 ; ATOM-NEXT: andl $-16, %edi
411 ; ATOM-NEXT: fldt (%rdi,%rax)
412 ; ATOM-NEXT: retq
413 ;
414 ; ATHLON-LABEL: test7:
415 ; ATHLON: ## %bb.0:
416 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
417 ; ATHLON-NEXT: notl %eax
418 ; ATHLON-NEXT: shrl $27, %eax
419 ; ATHLON-NEXT: andl $-16, %eax
420 ; ATHLON-NEXT: fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax)
421 ; ATHLON-NEXT: retl
422 ;
423 ; MCU-LABEL: test7:
424 ; MCU: # %bb.0:
425 ; MCU-NEXT: notl %eax
426 ; MCU-NEXT: shrl $27, %eax
427 ; MCU-NEXT: andl $-16, %eax
428 ; MCU-NEXT: fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax)
429 ; MCU-NEXT: retl
430 %tmp9 = icmp sgt i32 %tmp8, -1
431 %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
432 ret x86_fp80 %retval
433 }
435 ; widening select v6i32 and then a sub
436 define void @test8(i1 %c, ptr %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
437 ; GENERIC-LABEL: test8:
438 ; GENERIC: ## %bb.0:
439 ; GENERIC-NEXT: testb $1, %dil
440 ; GENERIC-NEXT: jne LBB7_1
441 ; GENERIC-NEXT: ## %bb.2:
442 ; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
443 ; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
444 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
445 ; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
446 ; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
447 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
448 ; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
449 ; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
450 ; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
451 ; GENERIC-NEXT: jmp LBB7_3
452 ; GENERIC-NEXT: LBB7_1:
453 ; GENERIC-NEXT: movd %r9d, %xmm0
454 ; GENERIC-NEXT: movd %r8d, %xmm1
455 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
456 ; GENERIC-NEXT: movd %ecx, %xmm2
457 ; GENERIC-NEXT: movd %edx, %xmm0
458 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
459 ; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
460 ; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
461 ; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
462 ; GENERIC-NEXT: LBB7_3:
463 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
464 ; GENERIC-NEXT: pcmpeqd %xmm2, %xmm2
465 ; GENERIC-NEXT: paddd %xmm2, %xmm0
466 ; GENERIC-NEXT: paddd %xmm2, %xmm1
467 ; GENERIC-NEXT: movq %xmm1, 16(%rsi)
468 ; GENERIC-NEXT: movdqa %xmm0, (%rsi)
469 ; GENERIC-NEXT: retq
470 ;
471 ; ATOM-LABEL: test8:
472 ; ATOM: ## %bb.0:
473 ; ATOM-NEXT: testb $1, %dil
474 ; ATOM-NEXT: jne LBB7_1
475 ; ATOM-NEXT: ## %bb.2:
476 ; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
477 ; ATOM-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
478 ; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
479 ; ATOM-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
480 ; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
481 ; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
482 ; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
483 ; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
484 ; ATOM-NEXT: jmp LBB7_3
485 ; ATOM-NEXT: LBB7_1:
486 ; ATOM-NEXT: movd %r9d, %xmm1
487 ; ATOM-NEXT: movd %r8d, %xmm2
488 ; ATOM-NEXT: movd %ecx, %xmm3
489 ; ATOM-NEXT: movd %edx, %xmm0
490 ; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
491 ; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
492 ; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
493 ; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
494 ; ATOM-NEXT: LBB7_3:
495 ; ATOM-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
496 ; ATOM-NEXT: pcmpeqd %xmm2, %xmm2
497 ; ATOM-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
498 ; ATOM-NEXT: paddd %xmm2, %xmm0
499 ; ATOM-NEXT: paddd %xmm2, %xmm1
500 ; ATOM-NEXT: movq %xmm1, 16(%rsi)
501 ; ATOM-NEXT: movdqa %xmm0, (%rsi)
502 ; ATOM-NEXT: retq
503 ;
504 ; ATHLON-LABEL: test8:
505 ; ATHLON: ## %bb.0:
506 ; ATHLON-NEXT: pushl %ebp
507 ; ATHLON-NEXT: pushl %ebx
508 ; ATHLON-NEXT: pushl %edi
509 ; ATHLON-NEXT: pushl %esi
510 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
511 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
512 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebx
513 ; ATHLON-NEXT: cmovnel %eax, %ebx
514 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
515 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edi
516 ; ATHLON-NEXT: cmovnel %eax, %edi
517 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
518 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi
519 ; ATHLON-NEXT: cmovnel %eax, %esi
520 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
521 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx
522 ; ATHLON-NEXT: cmovnel %eax, %edx
523 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
524 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
525 ; ATHLON-NEXT: cmovnel %eax, %ecx
526 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebp
527 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
528 ; ATHLON-NEXT: cmovnel %ebp, %eax
529 ; ATHLON-NEXT: movl (%ebx), %ebp
530 ; ATHLON-NEXT: movl (%edi), %ebx
531 ; ATHLON-NEXT: movl (%esi), %edi
532 ; ATHLON-NEXT: movl (%edx), %esi
533 ; ATHLON-NEXT: movl (%ecx), %edx
534 ; ATHLON-NEXT: movl (%eax), %ecx
535 ; ATHLON-NEXT: decl %ebp
536 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
537 ; ATHLON-NEXT: movl %ebp, 20(%eax)
538 ; ATHLON-NEXT: decl %ebx
539 ; ATHLON-NEXT: movl %ebx, 16(%eax)
540 ; ATHLON-NEXT: decl %edi
541 ; ATHLON-NEXT: movl %edi, 12(%eax)
542 ; ATHLON-NEXT: decl %esi
543 ; ATHLON-NEXT: movl %esi, 8(%eax)
544 ; ATHLON-NEXT: decl %edx
545 ; ATHLON-NEXT: movl %edx, 4(%eax)
546 ; ATHLON-NEXT: decl %ecx
547 ; ATHLON-NEXT: movl %ecx, (%eax)
548 ; ATHLON-NEXT: popl %esi
549 ; ATHLON-NEXT: popl %edi
550 ; ATHLON-NEXT: popl %ebx
551 ; ATHLON-NEXT: popl %ebp
552 ; ATHLON-NEXT: retl
553 ;
554 ; MCU-LABEL: test8:
555 ; MCU: # %bb.0:
556 ; MCU-NEXT: pushl %ebp
557 ; MCU-NEXT: pushl %ebx
558 ; MCU-NEXT: pushl %edi
559 ; MCU-NEXT: pushl %esi
560 ; MCU-NEXT: testb $1, %al
561 ; MCU-NEXT: jne .LBB7_1
562 ; MCU-NEXT: # %bb.2:
563 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi
564 ; MCU-NEXT: je .LBB7_5
565 ; MCU-NEXT: .LBB7_4:
566 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx
567 ; MCU-NEXT: je .LBB7_8
568 ; MCU-NEXT: .LBB7_7:
569 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi
570 ; MCU-NEXT: je .LBB7_11
571 ; MCU-NEXT: .LBB7_10:
572 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp
573 ; MCU-NEXT: je .LBB7_14
574 ; MCU-NEXT: .LBB7_13:
575 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax
576 ; MCU-NEXT: jmp .LBB7_15
577 ; MCU-NEXT: .LBB7_1:
578 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi
579 ; MCU-NEXT: jne .LBB7_4
580 ; MCU-NEXT: .LBB7_5:
581 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx
582 ; MCU-NEXT: jne .LBB7_7
583 ; MCU-NEXT: .LBB7_8:
584 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi
585 ; MCU-NEXT: jne .LBB7_10
586 ; MCU-NEXT: .LBB7_11:
587 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp
588 ; MCU-NEXT: jne .LBB7_13
589 ; MCU-NEXT: .LBB7_14:
590 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax
591 ; MCU-NEXT: .LBB7_15:
592 ; MCU-NEXT: movl (%edi), %ebx
593 ; MCU-NEXT: movl (%ecx), %edi
594 ; MCU-NEXT: movl (%esi), %esi
595 ; MCU-NEXT: movl (%ebp), %ecx
596 ; MCU-NEXT: movl (%eax), %eax
597 ; MCU-NEXT: jne .LBB7_16
598 ; MCU-NEXT: # %bb.17:
599 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp
600 ; MCU-NEXT: jmp .LBB7_18
601 ; MCU-NEXT: .LBB7_16:
602 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp
603 ; MCU-NEXT: .LBB7_18:
604 ; MCU-NEXT: movl (%ebp), %ebp
605 ; MCU-NEXT: decl %ebp
606 ; MCU-NEXT: decl %eax
607 ; MCU-NEXT: decl %ecx
608 ; MCU-NEXT: decl %esi
609 ; MCU-NEXT: decl %edi
610 ; MCU-NEXT: decl %ebx
611 ; MCU-NEXT: movl %ebx, 20(%edx)
612 ; MCU-NEXT: movl %edi, 16(%edx)
613 ; MCU-NEXT: movl %esi, 12(%edx)
614 ; MCU-NEXT: movl %ecx, 8(%edx)
615 ; MCU-NEXT: movl %eax, 4(%edx)
616 ; MCU-NEXT: movl %ebp, (%edx)
617 ; MCU-NEXT: popl %esi
618 ; MCU-NEXT: popl %edi
619 ; MCU-NEXT: popl %ebx
620 ; MCU-NEXT: popl %ebp
621 ; MCU-NEXT: retl
622 %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
623 %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
624 store <6 x i32> %val, ptr %dst.addr
625 ret void
626 }
629 ;; Test integer select between values and constants.
631 define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
632 ; CHECK-LABEL: test9:
633 ; CHECK: ## %bb.0:
634 ; CHECK-NEXT: xorl %eax, %eax
635 ; CHECK-NEXT: cmpq $1, %rdi
636 ; CHECK-NEXT: sbbq %rax, %rax
637 ; CHECK-NEXT: orq %rsi, %rax
638 ; CHECK-NEXT: retq
639 ;
640 ; ATHLON-LABEL: test9:
641 ; ATHLON: ## %bb.0:
642 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
643 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
644 ; ATHLON-NEXT: movl $-1, %eax
645 ; ATHLON-NEXT: movl $-1, %edx
646 ; ATHLON-NEXT: je LBB8_2
647 ; ATHLON-NEXT: ## %bb.1:
648 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
649 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
650 ; ATHLON-NEXT: LBB8_2:
651 ; ATHLON-NEXT: retl
652 ;
653 ; MCU-LABEL: test9:
654 ; MCU: # %bb.0:
655 ; MCU-NEXT: orl %edx, %eax
656 ; MCU-NEXT: jne .LBB8_1
657 ; MCU-NEXT: # %bb.2:
658 ; MCU-NEXT: movl $-1, %eax
659 ; MCU-NEXT: movl $-1, %edx
660 ; MCU-NEXT: retl
661 ; MCU-NEXT: .LBB8_1:
662 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
663 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
664 ; MCU-NEXT: retl
665 %cmp = icmp ne i64 %x, 0
666 %cond = select i1 %cmp, i64 %y, i64 -1
667 ret i64 %cond
668 }
670 ;; Same as test9
671 define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
672 ; CHECK-LABEL: test9a:
673 ; CHECK: ## %bb.0:
674 ; CHECK-NEXT: xorl %eax, %eax
675 ; CHECK-NEXT: cmpq $1, %rdi
676 ; CHECK-NEXT: sbbq %rax, %rax
677 ; CHECK-NEXT: orq %rsi, %rax
678 ; CHECK-NEXT: retq
679 ;
680 ; ATHLON-LABEL: test9a:
681 ; ATHLON: ## %bb.0:
682 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
683 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
684 ; ATHLON-NEXT: movl $-1, %eax
685 ; ATHLON-NEXT: movl $-1, %edx
686 ; ATHLON-NEXT: je LBB9_2
687 ; ATHLON-NEXT: ## %bb.1:
688 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
689 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
690 ; ATHLON-NEXT: LBB9_2:
691 ; ATHLON-NEXT: retl
692 ;
693 ; MCU-LABEL: test9a:
694 ; MCU: # %bb.0:
695 ; MCU-NEXT: orl %edx, %eax
696 ; MCU-NEXT: movl $-1, %eax
697 ; MCU-NEXT: movl $-1, %edx
698 ; MCU-NEXT: je .LBB9_2
699 ; MCU-NEXT: # %bb.1:
700 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
701 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
702 ; MCU-NEXT: .LBB9_2:
703 ; MCU-NEXT: retl
704 %cmp = icmp eq i64 %x, 0
705 %cond = select i1 %cmp, i64 -1, i64 %y
706 ret i64 %cond
707 }
709 define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
710 ; CHECK-LABEL: test9b:
711 ; CHECK: ## %bb.0:
712 ; CHECK-NEXT: xorl %eax, %eax
713 ; CHECK-NEXT: cmpq $1, %rdi
714 ; CHECK-NEXT: sbbq %rax, %rax
715 ; CHECK-NEXT: orq %rsi, %rax
716 ; CHECK-NEXT: retq
717 ;
718 ; ATHLON-LABEL: test9b:
719 ; ATHLON: ## %bb.0:
720 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
721 ; ATHLON-NEXT: xorl %edx, %edx
722 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
723 ; ATHLON-NEXT: sete %dl
724 ; ATHLON-NEXT: negl %edx
725 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
726 ; ATHLON-NEXT: orl %edx, %eax
727 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %edx
728 ; ATHLON-NEXT: retl
729 ;
730 ; MCU-LABEL: test9b:
731 ; MCU: # %bb.0:
732 ; MCU-NEXT: movl %edx, %ecx
733 ; MCU-NEXT: xorl %edx, %edx
734 ; MCU-NEXT: orl %ecx, %eax
735 ; MCU-NEXT: sete %dl
736 ; MCU-NEXT: negl %edx
737 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
738 ; MCU-NEXT: orl %edx, %eax
739 ; MCU-NEXT: orl {{[0-9]+}}(%esp), %edx
740 ; MCU-NEXT: retl
741 %cmp = icmp eq i64 %x, 0
742 %A = sext i1 %cmp to i64
743 %cond = or i64 %y, %A
744 ret i64 %cond
745 }
747 ;; Select between -1 and 1.
748 define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
749 ; CHECK-LABEL: test10:
750 ; CHECK: ## %bb.0:
751 ; CHECK-NEXT: xorl %eax, %eax
752 ; CHECK-NEXT: cmpq $1, %rdi
753 ; CHECK-NEXT: sbbq %rax, %rax
754 ; CHECK-NEXT: orq $1, %rax
755 ; CHECK-NEXT: retq
756 ;
757 ; ATHLON-LABEL: test10:
758 ; ATHLON: ## %bb.0:
759 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
760 ; ATHLON-NEXT: xorl %edx, %edx
761 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
762 ; ATHLON-NEXT: sete %dl
763 ; ATHLON-NEXT: negl %edx
764 ; ATHLON-NEXT: movl %edx, %eax
765 ; ATHLON-NEXT: orl $1, %eax
766 ; ATHLON-NEXT: retl
767 ;
768 ; MCU-LABEL: test10:
769 ; MCU: # %bb.0:
770 ; MCU-NEXT: movl %edx, %ecx
771 ; MCU-NEXT: xorl %edx, %edx
772 ; MCU-NEXT: orl %ecx, %eax
773 ; MCU-NEXT: sete %dl
774 ; MCU-NEXT: negl %edx
775 ; MCU-NEXT: movl %edx, %eax
776 ; MCU-NEXT: orl $1, %eax
777 ; MCU-NEXT: retl
778 %cmp = icmp eq i64 %x, 0
779 %cond = select i1 %cmp, i64 -1, i64 1
780 ret i64 %cond
781 }
783 define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
784 ; CHECK-LABEL: test11:
785 ; CHECK: ## %bb.0:
786 ; CHECK-NEXT: xorl %eax, %eax
787 ; CHECK-NEXT: negq %rdi
788 ; CHECK-NEXT: sbbq %rax, %rax
789 ; CHECK-NEXT: orq %rsi, %rax
790 ; CHECK-NEXT: retq
791 ;
792 ; ATHLON-LABEL: test11:
793 ; ATHLON: ## %bb.0:
794 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
795 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
796 ; ATHLON-NEXT: movl $-1, %eax
797 ; ATHLON-NEXT: movl $-1, %edx
798 ; ATHLON-NEXT: jne LBB12_2
799 ; ATHLON-NEXT: ## %bb.1:
800 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
801 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
802 ; ATHLON-NEXT: LBB12_2:
803 ; ATHLON-NEXT: retl
804 ;
805 ; MCU-LABEL: test11:
806 ; MCU: # %bb.0:
807 ; MCU-NEXT: orl %edx, %eax
808 ; MCU-NEXT: je .LBB12_1
809 ; MCU-NEXT: # %bb.2:
810 ; MCU-NEXT: movl $-1, %eax
811 ; MCU-NEXT: movl $-1, %edx
812 ; MCU-NEXT: retl
813 ; MCU-NEXT: .LBB12_1:
814 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
815 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
816 ; MCU-NEXT: retl
817 %cmp = icmp eq i64 %x, 0
818 %cond = select i1 %cmp, i64 %y, i64 -1
819 ret i64 %cond
820 }
822 define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
823 ; CHECK-LABEL: test11a:
824 ; CHECK: ## %bb.0:
825 ; CHECK-NEXT: xorl %eax, %eax
826 ; CHECK-NEXT: negq %rdi
827 ; CHECK-NEXT: sbbq %rax, %rax
828 ; CHECK-NEXT: orq %rsi, %rax
829 ; CHECK-NEXT: retq
830 ;
831 ; ATHLON-LABEL: test11a:
832 ; ATHLON: ## %bb.0:
833 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
834 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
835 ; ATHLON-NEXT: movl $-1, %eax
836 ; ATHLON-NEXT: movl $-1, %edx
837 ; ATHLON-NEXT: jne LBB13_2
838 ; ATHLON-NEXT: ## %bb.1:
839 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
840 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
841 ; ATHLON-NEXT: LBB13_2:
842 ; ATHLON-NEXT: retl
843 ;
844 ; MCU-LABEL: test11a:
845 ; MCU: # %bb.0:
846 ; MCU-NEXT: orl %edx, %eax
847 ; MCU-NEXT: movl $-1, %eax
848 ; MCU-NEXT: movl $-1, %edx
849 ; MCU-NEXT: jne .LBB13_2
850 ; MCU-NEXT: # %bb.1:
851 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
852 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
853 ; MCU-NEXT: .LBB13_2:
854 ; MCU-NEXT: retl
855 %cmp = icmp ne i64 %x, 0
856 %cond = select i1 %cmp, i64 -1, i64 %y
857 ret i64 %cond
858 }
860 define i32 @eqzero_const_or_all_ones(i32 %x) {
861 ; CHECK-LABEL: eqzero_const_or_all_ones:
862 ; CHECK: ## %bb.0:
863 ; CHECK-NEXT: xorl %eax, %eax
864 ; CHECK-NEXT: negl %edi
865 ; CHECK-NEXT: sbbl %eax, %eax
866 ; CHECK-NEXT: orl $42, %eax
867 ; CHECK-NEXT: retq
868 ;
869 ; ATHLON-LABEL: eqzero_const_or_all_ones:
870 ; ATHLON: ## %bb.0:
871 ; ATHLON-NEXT: xorl %eax, %eax
872 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax
873 ; ATHLON-NEXT: sbbl %eax, %eax
874 ; ATHLON-NEXT: orl $42, %eax
875 ; ATHLON-NEXT: retl
876 ;
877 ; MCU-LABEL: eqzero_const_or_all_ones:
878 ; MCU: # %bb.0:
879 ; MCU-NEXT: xorl %ecx, %ecx
880 ; MCU-NEXT: negl %eax
881 ; MCU-NEXT: sbbl %ecx, %ecx
882 ; MCU-NEXT: orl $42, %ecx
883 ; MCU-NEXT: movl %ecx, %eax
884 ; MCU-NEXT: retl
885 %z = icmp eq i32 %x, 0
886 %r = select i1 %z, i32 42, i32 -1
887 ret i32 %r
888 }
890 define i32 @nezero_const_or_all_ones(i32 %x) {
891 ; CHECK-LABEL: nezero_const_or_all_ones:
892 ; CHECK: ## %bb.0:
893 ; CHECK-NEXT: xorl %eax, %eax
894 ; CHECK-NEXT: cmpl $1, %edi
895 ; CHECK-NEXT: sbbl %eax, %eax
896 ; CHECK-NEXT: orl $42, %eax
897 ; CHECK-NEXT: retq
898 ;
899 ; ATHLON-LABEL: nezero_const_or_all_ones:
900 ; ATHLON: ## %bb.0:
901 ; ATHLON-NEXT: xorl %eax, %eax
902 ; ATHLON-NEXT: cmpl $1, {{[0-9]+}}(%esp)
903 ; ATHLON-NEXT: sbbl %eax, %eax
904 ; ATHLON-NEXT: orl $42, %eax
905 ; ATHLON-NEXT: retl
906 ;
907 ; MCU-LABEL: nezero_const_or_all_ones:
908 ; MCU: # %bb.0:
909 ; MCU-NEXT: xorl %ecx, %ecx
910 ; MCU-NEXT: cmpl $1, %eax
911 ; MCU-NEXT: sbbl %ecx, %ecx
912 ; MCU-NEXT: orl $42, %ecx
913 ; MCU-NEXT: movl %ecx, %eax
914 ; MCU-NEXT: retl
915 %z = icmp ne i32 %x, 0
916 %r = select i1 %z, i32 42, i32 -1
917 ret i32 %r
918 }
920 define i64 @eqzero_all_ones_or_const(i64 %x) {
921 ; CHECK-LABEL: eqzero_all_ones_or_const:
922 ; CHECK: ## %bb.0:
923 ; CHECK-NEXT: xorl %eax, %eax
924 ; CHECK-NEXT: cmpq $1, %rdi
925 ; CHECK-NEXT: sbbq %rax, %rax
926 ; CHECK-NEXT: orq $42, %rax
927 ; CHECK-NEXT: retq
928 ;
929 ; ATHLON-LABEL: eqzero_all_ones_or_const:
930 ; ATHLON: ## %bb.0:
931 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
932 ; ATHLON-NEXT: xorl %edx, %edx
933 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
934 ; ATHLON-NEXT: sete %dl
935 ; ATHLON-NEXT: negl %edx
936 ; ATHLON-NEXT: movl %edx, %eax
937 ; ATHLON-NEXT: orl $42, %eax
938 ; ATHLON-NEXT: retl
939 ;
940 ; MCU-LABEL: eqzero_all_ones_or_const:
941 ; MCU: # %bb.0:
942 ; MCU-NEXT: movl %edx, %ecx
943 ; MCU-NEXT: xorl %edx, %edx
944 ; MCU-NEXT: orl %ecx, %eax
945 ; MCU-NEXT: sete %dl
946 ; MCU-NEXT: negl %edx
947 ; MCU-NEXT: movl %edx, %eax
948 ; MCU-NEXT: orl $42, %eax
949 ; MCU-NEXT: retl
950 %z = icmp eq i64 %x, 0
951 %r = select i1 %z, i64 -1, i64 42
952 ret i64 %r
953 }
955 define i8 @nezero_all_ones_or_const(i8 %x) {
956 ; CHECK-LABEL: nezero_all_ones_or_const:
957 ; CHECK: ## %bb.0:
958 ; CHECK-NEXT: xorl %eax, %eax
959 ; CHECK-NEXT: negb %dil
960 ; CHECK-NEXT: sbbl %eax, %eax
961 ; CHECK-NEXT: orb $42, %al
962 ; CHECK-NEXT: ## kill: def $al killed $al killed $eax
963 ; CHECK-NEXT: retq
964 ;
965 ; ATHLON-LABEL: nezero_all_ones_or_const:
966 ; ATHLON: ## %bb.0:
967 ; ATHLON-NEXT: xorl %eax, %eax
968 ; ATHLON-NEXT: cmpb {{[0-9]+}}(%esp), %al
969 ; ATHLON-NEXT: sbbl %eax, %eax
970 ; ATHLON-NEXT: orb $42, %al
971 ; ATHLON-NEXT: ## kill: def $al killed $al killed $eax
972 ; ATHLON-NEXT: retl
973 ;
974 ; MCU-LABEL: nezero_all_ones_or_const:
975 ; MCU: # %bb.0:
976 ; MCU-NEXT: xorl %ecx, %ecx
977 ; MCU-NEXT: negb %al
978 ; MCU-NEXT: sbbl %ecx, %ecx
979 ; MCU-NEXT: orb $42, %cl
980 ; MCU-NEXT: movl %ecx, %eax
981 ; MCU-NEXT: retl
982 %z = icmp ne i8 %x, 0
983 %r = select i1 %z, i8 -1, i8 42
984 ret i8 %r
985 }
987 define i32 @PR53006(i32 %x) {
988 ; CHECK-LABEL: PR53006:
989 ; CHECK: ## %bb.0:
990 ; CHECK-NEXT: xorl %eax, %eax
991 ; CHECK-NEXT: negl %edi
992 ; CHECK-NEXT: sbbl %eax, %eax
993 ; CHECK-NEXT: orl $1, %eax
994 ; CHECK-NEXT: retq
995 ;
996 ; ATHLON-LABEL: PR53006:
997 ; ATHLON: ## %bb.0:
998 ; ATHLON-NEXT: xorl %eax, %eax
999 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax
1000 ; ATHLON-NEXT: sbbl %eax, %eax
1001 ; ATHLON-NEXT: orl $1, %eax
1002 ; ATHLON-NEXT: retl
1003 ;
1004 ; MCU-LABEL: PR53006:
1005 ; MCU: # %bb.0:
1006 ; MCU-NEXT: xorl %ecx, %ecx
1007 ; MCU-NEXT: negl %eax
1008 ; MCU-NEXT: sbbl %ecx, %ecx
1009 ; MCU-NEXT: orl $1, %ecx
1010 ; MCU-NEXT: movl %ecx, %eax
1011 ; MCU-NEXT: retl
1012 %z = icmp eq i32 %x, 0
1013 %r = select i1 %z, i32 1, i32 -1
1014 ret i32 %r
1015 }
1017 define i32 @test13(i32 %a, i32 %b) nounwind {
1018 ; GENERIC-LABEL: test13:
1019 ; GENERIC: ## %bb.0:
1020 ; GENERIC-NEXT: xorl %eax, %eax
1021 ; GENERIC-NEXT: cmpl %esi, %edi
1022 ; GENERIC-NEXT: sbbl %eax, %eax
1023 ; GENERIC-NEXT: retq
1024 ;
1025 ; ATOM-LABEL: test13:
1026 ; ATOM: ## %bb.0:
1027 ; ATOM-NEXT: xorl %eax, %eax
1028 ; ATOM-NEXT: cmpl %esi, %edi
1029 ; ATOM-NEXT: sbbl %eax, %eax
1030 ; ATOM-NEXT: nop
1031 ; ATOM-NEXT: nop
1032 ; ATOM-NEXT: retq
1033 ;
1034 ; ATHLON-LABEL: test13:
1035 ; ATHLON: ## %bb.0:
1036 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1037 ; ATHLON-NEXT: xorl %eax, %eax
1038 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
1039 ; ATHLON-NEXT: sbbl %eax, %eax
1040 ; ATHLON-NEXT: retl
1041 ;
1042 ; MCU-LABEL: test13:
1043 ; MCU: # %bb.0:
1044 ; MCU-NEXT: xorl %ecx, %ecx
1045 ; MCU-NEXT: cmpl %edx, %eax
1046 ; MCU-NEXT: sbbl %ecx, %ecx
1047 ; MCU-NEXT: movl %ecx, %eax
1048 ; MCU-NEXT: retl
1049 %c = icmp ult i32 %a, %b
1050 %d = sext i1 %c to i32
1051 ret i32 %d
1052 }
1054 define i32 @test14(i32 %a, i32 %b) nounwind {
1055 ; GENERIC-LABEL: test14:
1056 ; GENERIC: ## %bb.0:
1057 ; GENERIC-NEXT: xorl %eax, %eax
1058 ; GENERIC-NEXT: cmpl %esi, %edi
1059 ; GENERIC-NEXT: adcl $-1, %eax
1060 ; GENERIC-NEXT: retq
1061 ;
1062 ; ATOM-LABEL: test14:
1063 ; ATOM: ## %bb.0:
1064 ; ATOM-NEXT: xorl %eax, %eax
1065 ; ATOM-NEXT: cmpl %esi, %edi
1066 ; ATOM-NEXT: adcl $-1, %eax
1067 ; ATOM-NEXT: nop
1068 ; ATOM-NEXT: nop
1069 ; ATOM-NEXT: retq
1070 ;
1071 ; ATHLON-LABEL: test14:
1072 ; ATHLON: ## %bb.0:
1073 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1074 ; ATHLON-NEXT: xorl %eax, %eax
1075 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
1076 ; ATHLON-NEXT: adcl $-1, %eax
1077 ; ATHLON-NEXT: retl
1078 ;
1079 ; MCU-LABEL: test14:
1080 ; MCU: # %bb.0:
1081 ; MCU-NEXT: xorl %ecx, %ecx
1082 ; MCU-NEXT: cmpl %edx, %eax
1083 ; MCU-NEXT: adcl $-1, %ecx
1084 ; MCU-NEXT: movl %ecx, %eax
1085 ; MCU-NEXT: retl
1086 %c = icmp uge i32 %a, %b
1087 %d = sext i1 %c to i32
1088 ret i32 %d
1089 }
1091 ; rdar://10961709
1092 define i32 @test15(i32 %x) nounwind {
1093 ; GENERIC-LABEL: test15:
1094 ; GENERIC: ## %bb.0: ## %entry
1095 ; GENERIC-NEXT: xorl %eax, %eax
1096 ; GENERIC-NEXT: negl %edi
1097 ; GENERIC-NEXT: sbbl %eax, %eax
1098 ; GENERIC-NEXT: retq
1099 ;
1100 ; ATOM-LABEL: test15:
1101 ; ATOM: ## %bb.0: ## %entry
1102 ; ATOM-NEXT: xorl %eax, %eax
1103 ; ATOM-NEXT: negl %edi
1104 ; ATOM-NEXT: sbbl %eax, %eax
1105 ; ATOM-NEXT: nop
1106 ; ATOM-NEXT: nop
1107 ; ATOM-NEXT: retq
1108 ;
1109 ; ATHLON-LABEL: test15:
1110 ; ATHLON: ## %bb.0: ## %entry
1111 ; ATHLON-NEXT: xorl %eax, %eax
1112 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax
1113 ; ATHLON-NEXT: sbbl %eax, %eax
1114 ; ATHLON-NEXT: retl
1115 ;
1116 ; MCU-LABEL: test15:
1117 ; MCU: # %bb.0: # %entry
1118 ; MCU-NEXT: xorl %ecx, %ecx
1119 ; MCU-NEXT: negl %eax
1120 ; MCU-NEXT: sbbl %ecx, %ecx
1121 ; MCU-NEXT: movl %ecx, %eax
1122 ; MCU-NEXT: retl
1123 entry:
1124 %cmp = icmp ne i32 %x, 0
1125 %sub = sext i1 %cmp to i32
1126 ret i32 %sub
1127 }
1129 define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
1130 ; GENERIC-LABEL: test16:
1131 ; GENERIC: ## %bb.0: ## %entry
1132 ; GENERIC-NEXT: xorl %eax, %eax
1133 ; GENERIC-NEXT: negq %rdi
1134 ; GENERIC-NEXT: sbbq %rax, %rax
1135 ; GENERIC-NEXT: retq
1136 ;
1137 ; ATOM-LABEL: test16:
1138 ; ATOM: ## %bb.0: ## %entry
1139 ; ATOM-NEXT: xorl %eax, %eax
1140 ; ATOM-NEXT: negq %rdi
1141 ; ATOM-NEXT: sbbq %rax, %rax
1142 ; ATOM-NEXT: nop
1143 ; ATOM-NEXT: nop
1144 ; ATOM-NEXT: retq
1145 ;
1146 ; ATHLON-LABEL: test16:
1147 ; ATHLON: ## %bb.0: ## %entry
1148 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1149 ; ATHLON-NEXT: xorl %eax, %eax
1150 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %ecx
1151 ; ATHLON-NEXT: setne %al
1152 ; ATHLON-NEXT: negl %eax
1153 ; ATHLON-NEXT: movl %eax, %edx
1154 ; ATHLON-NEXT: retl
1155 ;
1156 ; MCU-LABEL: test16:
1157 ; MCU: # %bb.0: # %entry
1158 ; MCU-NEXT: movl %eax, %ecx
1159 ; MCU-NEXT: xorl %eax, %eax
1160 ; MCU-NEXT: orl %edx, %ecx
1161 ; MCU-NEXT: setne %al
1162 ; MCU-NEXT: negl %eax
1163 ; MCU-NEXT: movl %eax, %edx
1164 ; MCU-NEXT: retl
1165 entry:
1166 %cmp = icmp ne i64 %x, 0
1167 %conv1 = sext i1 %cmp to i64
1168 ret i64 %conv1
1169 }
1171 define i16 @test17(i16 %x) nounwind {
1172 ; GENERIC-LABEL: test17:
1173 ; GENERIC: ## %bb.0: ## %entry
1174 ; GENERIC-NEXT: xorl %eax, %eax
1175 ; GENERIC-NEXT: negw %di
1176 ; GENERIC-NEXT: sbbl %eax, %eax
1177 ; GENERIC-NEXT: ## kill: def $ax killed $ax killed $eax
1178 ; GENERIC-NEXT: retq
1179 ;
1180 ; ATOM-LABEL: test17:
1181 ; ATOM: ## %bb.0: ## %entry
1182 ; ATOM-NEXT: xorl %eax, %eax
1183 ; ATOM-NEXT: negw %di
1184 ; ATOM-NEXT: sbbl %eax, %eax
1185 ; ATOM-NEXT: ## kill: def $ax killed $ax killed $eax
1186 ; ATOM-NEXT: nop
1187 ; ATOM-NEXT: nop
1188 ; ATOM-NEXT: retq
1189 ;
1190 ; ATHLON-LABEL: test17:
1191 ; ATHLON: ## %bb.0: ## %entry
1192 ; ATHLON-NEXT: xorl %eax, %eax
1193 ; ATHLON-NEXT: cmpw {{[0-9]+}}(%esp), %ax
1194 ; ATHLON-NEXT: sbbl %eax, %eax
1195 ; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax
1196 ; ATHLON-NEXT: retl
1197 ;
1198 ; MCU-LABEL: test17:
1199 ; MCU: # %bb.0: # %entry
1200 ; MCU-NEXT: xorl %ecx, %ecx
1201 ; MCU-NEXT: negw %ax
1202 ; MCU-NEXT: sbbl %ecx, %ecx
1203 ; MCU-NEXT: movl %ecx, %eax
1204 ; MCU-NEXT: retl
1205 entry:
1206 %cmp = icmp ne i16 %x, 0
1207 %sub = sext i1 %cmp to i16
1208 ret i16 %sub
1209 }
1211 define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
1212 ; GENERIC-LABEL: test18:
1213 ; GENERIC: ## %bb.0:
1214 ; GENERIC-NEXT: movl %esi, %eax
1215 ; GENERIC-NEXT: cmpl $15, %edi
1216 ; GENERIC-NEXT: cmovgel %edx, %eax
1217 ; GENERIC-NEXT: ## kill: def $al killed $al killed $eax
1218 ; GENERIC-NEXT: retq
1219 ;
1220 ; ATOM-LABEL: test18:
1221 ; ATOM: ## %bb.0:
1222 ; ATOM-NEXT: movl %esi, %eax
1223 ; ATOM-NEXT: cmpl $15, %edi
1224 ; ATOM-NEXT: cmovgel %edx, %eax
1225 ; ATOM-NEXT: ## kill: def $al killed $al killed $eax
1226 ; ATOM-NEXT: nop
1227 ; ATOM-NEXT: nop
1228 ; ATOM-NEXT: retq
1229 ;
1230 ; ATHLON-LABEL: test18:
1231 ; ATHLON: ## %bb.0:
1232 ; ATHLON-NEXT: cmpl $15, {{[0-9]+}}(%esp)
1233 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
1234 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
1235 ; ATHLON-NEXT: cmovll %eax, %ecx
1236 ; ATHLON-NEXT: movzbl (%ecx), %eax
1237 ; ATHLON-NEXT: retl
1238 ;
1239 ; MCU-LABEL: test18:
1240 ; MCU: # %bb.0:
1241 ; MCU-NEXT: cmpl $15, %eax
1242 ; MCU-NEXT: jl .LBB24_2
1243 ; MCU-NEXT: # %bb.1:
1244 ; MCU-NEXT: movl %ecx, %edx
1245 ; MCU-NEXT: .LBB24_2:
1246 ; MCU-NEXT: movl %edx, %eax
1247 ; MCU-NEXT: retl
1248 %cmp = icmp slt i32 %x, 15
1249 %sel = select i1 %cmp, i8 %a, i8 %b
1250 ret i8 %sel
1251 }
1253 define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
1254 ; GENERIC-LABEL: trunc_select_miscompile:
1255 ; GENERIC: ## %bb.0:
1256 ; GENERIC-NEXT: ## kill: def $esi killed $esi def $rsi
1257 ; GENERIC-NEXT: movl %edi, %eax
1258 ; GENERIC-NEXT: leal 2(%rsi), %ecx
1259 ; GENERIC-NEXT: ## kill: def $cl killed $cl killed $ecx
1260 ; GENERIC-NEXT: shll %cl, %eax
1261 ; GENERIC-NEXT: retq
1262 ;
1263 ; ATOM-LABEL: trunc_select_miscompile:
1264 ; ATOM: ## %bb.0:
1265 ; ATOM-NEXT: ## kill: def $esi killed $esi def $rsi
1266 ; ATOM-NEXT: leal 2(%rsi), %ecx
1267 ; ATOM-NEXT: movl %edi, %eax
1268 ; ATOM-NEXT: ## kill: def $cl killed $cl killed $ecx
1269 ; ATOM-NEXT: shll %cl, %eax
1270 ; ATOM-NEXT: nop
1271 ; ATOM-NEXT: nop
1272 ; ATOM-NEXT: retq
1273 ;
1274 ; ATHLON-LABEL: trunc_select_miscompile:
1275 ; ATHLON: ## %bb.0:
1276 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1277 ; ATHLON-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
1278 ; ATHLON-NEXT: orb $2, %cl
1279 ; ATHLON-NEXT: shll %cl, %eax
1280 ; ATHLON-NEXT: retl
1281 ;
1282 ; MCU-LABEL: trunc_select_miscompile:
1283 ; MCU: # %bb.0:
1284 ; MCU-NEXT: movl %edx, %ecx
1285 ; MCU-NEXT: orb $2, %cl
1286 ; MCU-NEXT: # kill: def $cl killed $cl killed $ecx
1287 ; MCU-NEXT: shll %cl, %eax
1288 ; MCU-NEXT: retl
1289 %tmp1 = select i1 %cc, i32 3, i32 2
1290 %tmp2 = shl i32 %a, %tmp1
1291 ret i32 %tmp2
1292 }
1294 ; reproducer for pr29002
1295 define void @clamp_i8(i32 %src, ptr %dst) {
1296 ; GENERIC-LABEL: clamp_i8:
1297 ; GENERIC: ## %bb.0:
1298 ; GENERIC-NEXT: cmpl $127, %edi
1299 ; GENERIC-NEXT: movl $127, %eax
1300 ; GENERIC-NEXT: cmovlel %edi, %eax
1301 ; GENERIC-NEXT: cmpl $-128, %eax
1302 ; GENERIC-NEXT: movl $128, %ecx
1303 ; GENERIC-NEXT: cmovgel %eax, %ecx
1304 ; GENERIC-NEXT: movb %cl, (%rsi)
1305 ; GENERIC-NEXT: retq
1306 ;
1307 ; ATOM-LABEL: clamp_i8:
1308 ; ATOM: ## %bb.0:
1309 ; ATOM-NEXT: cmpl $127, %edi
1310 ; ATOM-NEXT: movl $127, %eax
1311 ; ATOM-NEXT: movl $128, %ecx
1312 ; ATOM-NEXT: cmovlel %edi, %eax
1313 ; ATOM-NEXT: cmpl $-128, %eax
1314 ; ATOM-NEXT: cmovgel %eax, %ecx
1315 ; ATOM-NEXT: movb %cl, (%rsi)
1316 ; ATOM-NEXT: retq
1317 ;
1318 ; ATHLON-LABEL: clamp_i8:
1319 ; ATHLON: ## %bb.0:
1320 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1321 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1322 ; ATHLON-NEXT: cmpl $127, %ecx
1323 ; ATHLON-NEXT: movl $127, %edx
1324 ; ATHLON-NEXT: cmovlel %ecx, %edx
1325 ; ATHLON-NEXT: cmpl $-128, %edx
1326 ; ATHLON-NEXT: movl $128, %ecx
1327 ; ATHLON-NEXT: cmovgel %edx, %ecx
1328 ; ATHLON-NEXT: movb %cl, (%eax)
1329 ; ATHLON-NEXT: retl
1330 ;
1331 ; MCU-LABEL: clamp_i8:
1332 ; MCU: # %bb.0:
1333 ; MCU-NEXT: cmpl $127, %eax
1334 ; MCU-NEXT: movl $127, %ecx
1335 ; MCU-NEXT: jg .LBB26_2
1336 ; MCU-NEXT: # %bb.1:
1337 ; MCU-NEXT: movl %eax, %ecx
1338 ; MCU-NEXT: .LBB26_2:
1339 ; MCU-NEXT: cmpl $-128, %ecx
1340 ; MCU-NEXT: movb $-128, %al
1341 ; MCU-NEXT: jl .LBB26_4
1342 ; MCU-NEXT: # %bb.3:
1343 ; MCU-NEXT: movl %ecx, %eax
1344 ; MCU-NEXT: .LBB26_4:
1345 ; MCU-NEXT: movb %al, (%edx)
1346 ; MCU-NEXT: retl
1347 %cmp = icmp sgt i32 %src, 127
1348 %sel1 = select i1 %cmp, i32 127, i32 %src
1349 %cmp1 = icmp slt i32 %sel1, -128
1350 %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
1351 %conv = trunc i32 %sel2 to i8
1352 store i8 %conv, ptr %dst, align 2
1353 ret void
1354 }
1356 ; reproducer for pr29002
1357 define void @clamp(i32 %src, ptr %dst) {
1358 ; GENERIC-LABEL: clamp:
1359 ; GENERIC: ## %bb.0:
1360 ; GENERIC-NEXT: cmpl $32768, %edi ## imm = 0x8000
1361 ; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF
1362 ; GENERIC-NEXT: cmovll %edi, %eax
1363 ; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000
1364 ; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000
1365 ; GENERIC-NEXT: cmovgel %eax, %ecx
1366 ; GENERIC-NEXT: movw %cx, (%rsi)
1367 ; GENERIC-NEXT: retq
1368 ;
1369 ; ATOM-LABEL: clamp:
1370 ; ATOM: ## %bb.0:
1371 ; ATOM-NEXT: cmpl $32768, %edi ## imm = 0x8000
1372 ; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF
1373 ; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000
1374 ; ATOM-NEXT: cmovll %edi, %eax
1375 ; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000
1376 ; ATOM-NEXT: cmovgel %eax, %ecx
1377 ; ATOM-NEXT: movw %cx, (%rsi)
1378 ; ATOM-NEXT: retq
1379 ;
1380 ; ATHLON-LABEL: clamp:
1381 ; ATHLON: ## %bb.0:
1382 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1383 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1384 ; ATHLON-NEXT: cmpl $32768, %ecx ## imm = 0x8000
1385 ; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF
1386 ; ATHLON-NEXT: cmovll %ecx, %edx
1387 ; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000
1388 ; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000
1389 ; ATHLON-NEXT: cmovgel %edx, %ecx
1390 ; ATHLON-NEXT: movw %cx, (%eax)
1391 ; ATHLON-NEXT: retl
1392 ;
1393 ; MCU-LABEL: clamp:
1394 ; MCU: # %bb.0:
1395 ; MCU-NEXT: cmpl $32768, %eax # imm = 0x8000
1396 ; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF
1397 ; MCU-NEXT: jge .LBB27_2
1398 ; MCU-NEXT: # %bb.1:
1399 ; MCU-NEXT: movl %eax, %ecx
1400 ; MCU-NEXT: .LBB27_2:
1401 ; MCU-NEXT: cmpl $-32768, %ecx # imm = 0x8000
1402 ; MCU-NEXT: movl $32768, %eax # imm = 0x8000
1403 ; MCU-NEXT: jl .LBB27_4
1404 ; MCU-NEXT: # %bb.3:
1405 ; MCU-NEXT: movl %ecx, %eax
1406 ; MCU-NEXT: .LBB27_4:
1407 ; MCU-NEXT: movw %ax, (%edx)
1408 ; MCU-NEXT: retl
1409 %cmp = icmp sgt i32 %src, 32767
1410 %sel1 = select i1 %cmp, i32 32767, i32 %src
1411 %cmp1 = icmp slt i32 %sel1, -32768
1412 %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
1413 %conv = trunc i32 %sel2 to i16
1414 store i16 %conv, ptr %dst, align 2
1415 ret void
1416 }
1418 define i16 @select_xor_1(i16 %A, i8 %cond) {
1419 ; CHECK-LABEL: select_xor_1:
1420 ; CHECK: ## %bb.0: ## %entry
1421 ; CHECK-NEXT: movl %edi, %eax
1422 ; CHECK-NEXT: xorl $43, %eax
1423 ; CHECK-NEXT: testb $1, %sil
1424 ; CHECK-NEXT: cmovel %edi, %eax
1425 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
1426 ; CHECK-NEXT: retq
1427 ;
1428 ; ATHLON-LABEL: select_xor_1:
1429 ; ATHLON: ## %bb.0: ## %entry
1430 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1431 ; ATHLON-NEXT: movl %ecx, %eax
1432 ; ATHLON-NEXT: xorl $43, %eax
1433 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1434 ; ATHLON-NEXT: cmovel %ecx, %eax
1435 ; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax
1436 ; ATHLON-NEXT: retl
1437 ;
1438 ; MCU-LABEL: select_xor_1:
1439 ; MCU: # %bb.0: # %entry
1440 ; MCU-NEXT: andl $1, %edx
1441 ; MCU-NEXT: negl %edx
1442 ; MCU-NEXT: andl $43, %edx
1443 ; MCU-NEXT: xorl %edx, %eax
1444 ; MCU-NEXT: # kill: def $ax killed $ax killed $eax
1445 ; MCU-NEXT: retl
1446 entry:
1447 %and = and i8 %cond, 1
1448 %cmp10 = icmp eq i8 %and, 0
1449 %0 = xor i16 %A, 43
1450 %1 = select i1 %cmp10, i16 %A, i16 %0
1451 ret i16 %1
1452 }
1454 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1455 ; icmp eq (and %cond, 1), 0
1456 define i16 @select_xor_1b(i16 %A, i8 %cond) {
1457 ; CHECK-LABEL: select_xor_1b:
1458 ; CHECK: ## %bb.0: ## %entry
1459 ; CHECK-NEXT: movl %edi, %eax
1460 ; CHECK-NEXT: xorl $43, %eax
1461 ; CHECK-NEXT: testb $1, %sil
1462 ; CHECK-NEXT: cmovel %edi, %eax
1463 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
1464 ; CHECK-NEXT: retq
1465 ;
1466 ; ATHLON-LABEL: select_xor_1b:
1467 ; ATHLON: ## %bb.0: ## %entry
1468 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1469 ; ATHLON-NEXT: movl %ecx, %eax
1470 ; ATHLON-NEXT: xorl $43, %eax
1471 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1472 ; ATHLON-NEXT: cmovel %ecx, %eax
1473 ; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax
1474 ; ATHLON-NEXT: retl
1475 ;
1476 ; MCU-LABEL: select_xor_1b:
1477 ; MCU: # %bb.0: # %entry
1478 ; MCU-NEXT: testb $1, %dl
1479 ; MCU-NEXT: je .LBB29_2
1480 ; MCU-NEXT: # %bb.1:
1481 ; MCU-NEXT: xorl $43, %eax
1482 ; MCU-NEXT: .LBB29_2: # %entry
1483 ; MCU-NEXT: # kill: def $ax killed $ax killed $eax
1484 ; MCU-NEXT: retl
1485 entry:
1486 %and = and i8 %cond, 1
1487 %cmp10 = icmp ne i8 %and, 1
1488 %0 = xor i16 %A, 43
1489 %1 = select i1 %cmp10, i16 %A, i16 %0
1490 ret i16 %1
1491 }
1493 define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1494 ; CHECK-LABEL: select_xor_2:
1495 ; CHECK: ## %bb.0: ## %entry
1496 ; CHECK-NEXT: movl %esi, %eax
1497 ; CHECK-NEXT: xorl %edi, %eax
1498 ; CHECK-NEXT: testb $1, %dl
1499 ; CHECK-NEXT: cmovel %edi, %eax
1500 ; CHECK-NEXT: retq
1501 ;
1502 ; ATHLON-LABEL: select_xor_2:
1503 ; ATHLON: ## %bb.0: ## %entry
1504 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1505 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1506 ; ATHLON-NEXT: xorl %ecx, %eax
1507 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1508 ; ATHLON-NEXT: cmovel %ecx, %eax
1509 ; ATHLON-NEXT: retl
1510 ;
1511 ; MCU-LABEL: select_xor_2:
1512 ; MCU: # %bb.0: # %entry
1513 ; MCU-NEXT: andl $1, %ecx
1514 ; MCU-NEXT: negl %ecx
1515 ; MCU-NEXT: andl %edx, %ecx
1516 ; MCU-NEXT: xorl %ecx, %eax
1517 ; MCU-NEXT: retl
1518 entry:
1519 %and = and i8 %cond, 1
1520 %cmp10 = icmp eq i8 %and, 0
1521 %0 = xor i32 %B, %A
1522 %1 = select i1 %cmp10, i32 %A, i32 %0
1523 ret i32 %1
1524 }
1526 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1527 ; icmp eq (and %cond, 1), 0
1528 define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
1529 ; CHECK-LABEL: select_xor_2b:
1530 ; CHECK: ## %bb.0: ## %entry
1531 ; CHECK-NEXT: movl %esi, %eax
1532 ; CHECK-NEXT: xorl %edi, %eax
1533 ; CHECK-NEXT: testb $1, %dl
1534 ; CHECK-NEXT: cmovel %edi, %eax
1535 ; CHECK-NEXT: retq
1536 ;
1537 ; ATHLON-LABEL: select_xor_2b:
1538 ; ATHLON: ## %bb.0: ## %entry
1539 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1540 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1541 ; ATHLON-NEXT: xorl %ecx, %eax
1542 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1543 ; ATHLON-NEXT: cmovel %ecx, %eax
1544 ; ATHLON-NEXT: retl
1545 ;
1546 ; MCU-LABEL: select_xor_2b:
1547 ; MCU: # %bb.0: # %entry
1548 ; MCU-NEXT: testb $1, %cl
1549 ; MCU-NEXT: je .LBB31_2
1550 ; MCU-NEXT: # %bb.1:
1551 ; MCU-NEXT: xorl %edx, %eax
1552 ; MCU-NEXT: .LBB31_2: # %entry
1553 ; MCU-NEXT: retl
1554 entry:
1555 %and = and i8 %cond, 1
1556 %cmp10 = icmp ne i8 %and, 1
1557 %0 = xor i32 %B, %A
1558 %1 = select i1 %cmp10, i32 %A, i32 %0
1559 ret i32 %1
1560 }
1562 define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1563 ; CHECK-LABEL: select_or:
1564 ; CHECK: ## %bb.0: ## %entry
1565 ; CHECK-NEXT: movl %esi, %eax
1566 ; CHECK-NEXT: orl %edi, %eax
1567 ; CHECK-NEXT: testb $1, %dl
1568 ; CHECK-NEXT: cmovel %edi, %eax
1569 ; CHECK-NEXT: retq
1570 ;
1571 ; ATHLON-LABEL: select_or:
1572 ; ATHLON: ## %bb.0: ## %entry
1573 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1574 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1575 ; ATHLON-NEXT: orl %ecx, %eax
1576 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1577 ; ATHLON-NEXT: cmovel %ecx, %eax
1578 ; ATHLON-NEXT: retl
1579 ;
1580 ; MCU-LABEL: select_or:
1581 ; MCU: # %bb.0: # %entry
1582 ; MCU-NEXT: andl $1, %ecx
1583 ; MCU-NEXT: negl %ecx
1584 ; MCU-NEXT: andl %edx, %ecx
1585 ; MCU-NEXT: orl %ecx, %eax
1586 ; MCU-NEXT: retl
1587 entry:
1588 %and = and i8 %cond, 1
1589 %cmp10 = icmp eq i8 %and, 0
1590 %0 = or i32 %B, %A
1591 %1 = select i1 %cmp10, i32 %A, i32 %0
1592 ret i32 %1
1593 }
1595 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1596 ; icmp eq (and %cond, 1), 0
1597 define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
1598 ; CHECK-LABEL: select_or_b:
1599 ; CHECK: ## %bb.0: ## %entry
1600 ; CHECK-NEXT: movl %esi, %eax
1601 ; CHECK-NEXT: orl %edi, %eax
1602 ; CHECK-NEXT: testb $1, %dl
1603 ; CHECK-NEXT: cmovel %edi, %eax
1604 ; CHECK-NEXT: retq
1605 ;
1606 ; ATHLON-LABEL: select_or_b:
1607 ; ATHLON: ## %bb.0: ## %entry
1608 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1609 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1610 ; ATHLON-NEXT: orl %ecx, %eax
1611 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1612 ; ATHLON-NEXT: cmovel %ecx, %eax
1613 ; ATHLON-NEXT: retl
1614 ;
1615 ; MCU-LABEL: select_or_b:
1616 ; MCU: # %bb.0: # %entry
1617 ; MCU-NEXT: testb $1, %cl
1618 ; MCU-NEXT: je .LBB33_2
1619 ; MCU-NEXT: # %bb.1:
1620 ; MCU-NEXT: orl %edx, %eax
1621 ; MCU-NEXT: .LBB33_2: # %entry
1622 ; MCU-NEXT: retl
1623 entry:
1624 %and = and i8 %cond, 1
1625 %cmp10 = icmp ne i8 %and, 1
1626 %0 = or i32 %B, %A
1627 %1 = select i1 %cmp10, i32 %A, i32 %0
1628 ret i32 %1
1629 }
1631 define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1632 ; CHECK-LABEL: select_or_1:
1633 ; CHECK: ## %bb.0: ## %entry
1634 ; CHECK-NEXT: movl %esi, %eax
1635 ; CHECK-NEXT: orl %edi, %eax
1636 ; CHECK-NEXT: testb $1, %dl
1637 ; CHECK-NEXT: cmovel %edi, %eax
1638 ; CHECK-NEXT: retq
1639 ;
1640 ; ATHLON-LABEL: select_or_1:
1641 ; ATHLON: ## %bb.0: ## %entry
1642 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1643 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1644 ; ATHLON-NEXT: orl %ecx, %eax
1645 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1646 ; ATHLON-NEXT: cmovel %ecx, %eax
1647 ; ATHLON-NEXT: retl
1648 ;
1649 ; MCU-LABEL: select_or_1:
1650 ; MCU: # %bb.0: # %entry
1651 ; MCU-NEXT: andl $1, %ecx
1652 ; MCU-NEXT: negl %ecx
1653 ; MCU-NEXT: andl %edx, %ecx
1654 ; MCU-NEXT: orl %ecx, %eax
1655 ; MCU-NEXT: retl
1656 entry:
1657 %and = and i32 %cond, 1
1658 %cmp10 = icmp eq i32 %and, 0
1659 %0 = or i32 %B, %A
1660 %1 = select i1 %cmp10, i32 %A, i32 %0
1661 ret i32 %1
1662 }
1664 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1665 ; icmp eq (and %cond, 1), 0
1666 define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
1667 ; CHECK-LABEL: select_or_1b:
1668 ; CHECK: ## %bb.0: ## %entry
1669 ; CHECK-NEXT: movl %esi, %eax
1670 ; CHECK-NEXT: orl %edi, %eax
1671 ; CHECK-NEXT: testb $1, %dl
1672 ; CHECK-NEXT: cmovel %edi, %eax
1673 ; CHECK-NEXT: retq
1674 ;
1675 ; ATHLON-LABEL: select_or_1b:
1676 ; ATHLON: ## %bb.0: ## %entry
1677 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1678 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1679 ; ATHLON-NEXT: orl %ecx, %eax
1680 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1681 ; ATHLON-NEXT: cmovel %ecx, %eax
1682 ; ATHLON-NEXT: retl
1683 ;
1684 ; MCU-LABEL: select_or_1b:
1685 ; MCU: # %bb.0: # %entry
1686 ; MCU-NEXT: testb $1, %cl
1687 ; MCU-NEXT: je .LBB35_2
1688 ; MCU-NEXT: # %bb.1:
1689 ; MCU-NEXT: orl %edx, %eax
1690 ; MCU-NEXT: .LBB35_2: # %entry
1691 ; MCU-NEXT: retl
1692 entry:
1693 %and = and i32 %cond, 1
1694 %cmp10 = icmp ne i32 %and, 1
1695 %0 = or i32 %B, %A
1696 %1 = select i1 %cmp10, i32 %A, i32 %0
1697 ret i32 %1
1698 }
1700 define i64 @PR51612(i64 %x, i64 %y) {
1701 ; CHECK-LABEL: PR51612:
1702 ; CHECK: ## %bb.0:
1703 ; CHECK-NEXT: leal 1(%rsi), %eax
1704 ; CHECK-NEXT: incq %rdi
1705 ; CHECK-NEXT: cmovnel %edi, %eax
1706 ; CHECK-NEXT: andl 10, %eax
1707 ; CHECK-NEXT: retq
1708 ;
1709 ; ATHLON-LABEL: PR51612:
1710 ; ATHLON: ## %bb.0:
1711 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1712 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1713 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
1714 ; ATHLON-NEXT: incl %edx
1715 ; ATHLON-NEXT: addl $1, %eax
1716 ; ATHLON-NEXT: adcl $0, %ecx
1717 ; ATHLON-NEXT: cmovbl %edx, %eax
1718 ; ATHLON-NEXT: andl 10, %eax
1719 ; ATHLON-NEXT: xorl %edx, %edx
1720 ; ATHLON-NEXT: retl
1721 ;
1722 ; MCU-LABEL: PR51612:
1723 ; MCU: # %bb.0:
1724 ; MCU-NEXT: addl $1, %eax
1725 ; MCU-NEXT: adcl $0, %edx
1726 ; MCU-NEXT: jae .LBB36_2
1727 ; MCU-NEXT: # %bb.1:
1728 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
1729 ; MCU-NEXT: incl %eax
1730 ; MCU-NEXT: .LBB36_2:
1731 ; MCU-NEXT: andl 10, %eax
1732 ; MCU-NEXT: xorl %edx, %edx
1733 ; MCU-NEXT: retl
1734 %add = add i64 %x, 1
1735 %inc = add i64 %y, 1
1736 %tobool = icmp eq i64 %add, 0
1737 %sel = select i1 %tobool, i64 %inc, i64 %add
1738 %i = load i32, ptr inttoptr (i32 10 to ptr), align 4
1739 %conv = zext i32 %i to i64
1740 %and = and i64 %sel, %conv
1741 ret i64 %and
1742 }
1744 ; The next 2 tests are for additional bugs based on PR51612.
1746 declare { i8, i1 } @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone
1747 declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
1749 define i8 @select_uaddo_common_op0(i8 %a, i8 %b, i8 %c, i1 %cond) {
1750 ; GENERIC-LABEL: select_uaddo_common_op0:
1751 ; GENERIC: ## %bb.0:
1752 ; GENERIC-NEXT: ## kill: def $esi killed $esi def $rsi
1753 ; GENERIC-NEXT: ## kill: def $edi killed $edi def $rdi
1754 ; GENERIC-NEXT: testb $1, %cl
1755 ; GENERIC-NEXT: cmovel %edx, %esi
1756 ; GENERIC-NEXT: leal (%rsi,%rdi), %eax
1757 ; GENERIC-NEXT: ## kill: def $al killed $al killed $eax
1758 ; GENERIC-NEXT: retq
1759 ;
1760 ; ATOM-LABEL: select_uaddo_common_op0:
1761 ; ATOM: ## %bb.0:
1762 ; ATOM-NEXT: ## kill: def $esi killed $esi def $rsi
1763 ; ATOM-NEXT: testb $1, %cl
1764 ; ATOM-NEXT: ## kill: def $edi killed $edi def $rdi
1765 ; ATOM-NEXT: cmovel %edx, %esi
1766 ; ATOM-NEXT: leal (%rsi,%rdi), %eax
1767 ; ATOM-NEXT: ## kill: def $al killed $al killed $eax
1768 ; ATOM-NEXT: nop
1769 ; ATOM-NEXT: nop
1770 ; ATOM-NEXT: retq
1771 ;
1772 ; ATHLON-LABEL: select_uaddo_common_op0:
1773 ; ATHLON: ## %bb.0:
1774 ; ATHLON-NEXT: movzbl {{[0-9]+}}(%esp), %eax
1775 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1776 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
1777 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx
1778 ; ATHLON-NEXT: cmovnel %ecx, %edx
1779 ; ATHLON-NEXT: addb (%edx), %al
1780 ; ATHLON-NEXT: retl
1781 ;
1782 ; MCU-LABEL: select_uaddo_common_op0:
1783 ; MCU: # %bb.0:
1784 ; MCU-NEXT: testb $1, {{[0-9]+}}(%esp)
1785 ; MCU-NEXT: jne .LBB37_2
1786 ; MCU-NEXT: # %bb.1:
1787 ; MCU-NEXT: movl %ecx, %edx
1788 ; MCU-NEXT: .LBB37_2:
1789 ; MCU-NEXT: addb %dl, %al
1790 ; MCU-NEXT: # kill: def $al killed $al killed $eax
1791 ; MCU-NEXT: retl
1792 %ab = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %b)
1793 %ac = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %c)
1794 %ab0 = extractvalue { i8, i1 } %ab, 0
1795 %ac0 = extractvalue { i8, i1 } %ac, 0
1796 %sel = select i1 %cond, i8 %ab0, i8 %ac0
1797 ret i8 %sel
1798 }
1800 define i32 @select_uaddo_common_op1(i32 %a, i32 %b, i32 %c, i1 %cond) {
1801 ; GENERIC-LABEL: select_uaddo_common_op1:
1802 ; GENERIC: ## %bb.0:
1803 ; GENERIC-NEXT: ## kill: def $esi killed $esi def $rsi
1804 ; GENERIC-NEXT: ## kill: def $edi killed $edi def $rdi
1805 ; GENERIC-NEXT: testb $1, %cl
1806 ; GENERIC-NEXT: cmovel %edx, %edi
1807 ; GENERIC-NEXT: leal (%rdi,%rsi), %eax
1808 ; GENERIC-NEXT: retq
1809 ;
1810 ; ATOM-LABEL: select_uaddo_common_op1:
1811 ; ATOM: ## %bb.0:
1812 ; ATOM-NEXT: ## kill: def $edi killed $edi def $rdi
1813 ; ATOM-NEXT: testb $1, %cl
1814 ; ATOM-NEXT: ## kill: def $esi killed $esi def $rsi
1815 ; ATOM-NEXT: cmovel %edx, %edi
1816 ; ATOM-NEXT: leal (%rdi,%rsi), %eax
1817 ; ATOM-NEXT: nop
1818 ; ATOM-NEXT: nop
1819 ; ATOM-NEXT: retq
1820 ;
1821 ; ATHLON-LABEL: select_uaddo_common_op1:
1822 ; ATHLON: ## %bb.0:
1823 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1824 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
1825 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
1826 ; ATHLON-NEXT: cmovnel %eax, %ecx
1827 ; ATHLON-NEXT: movl (%ecx), %eax
1828 ; ATHLON-NEXT: addl {{[0-9]+}}(%esp), %eax
1829 ; ATHLON-NEXT: retl
1830 ;
1831 ; MCU-LABEL: select_uaddo_common_op1:
1832 ; MCU: # %bb.0:
1833 ; MCU-NEXT: testb $1, {{[0-9]+}}(%esp)
1834 ; MCU-NEXT: jne .LBB38_2
1835 ; MCU-NEXT: # %bb.1:
1836 ; MCU-NEXT: movl %ecx, %eax
1837 ; MCU-NEXT: .LBB38_2:
1838 ; MCU-NEXT: addl %edx, %eax
1839 ; MCU-NEXT: retl
1840 %ab = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
1841 %cb = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %c, i32 %b)
1842 %ab0 = extractvalue { i32, i1 } %ab, 0
1843 %cb0 = extractvalue { i32, i1 } %cb, 0
1844 %sel = select i1 %cond, i32 %ab0, i32 %cb0
1845 ret i32 %sel
1846 }