llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll

   1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
   2
   3 ; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
   4 ; CHECK-NEXT:   __LLVM_StackMaps:
   5
   6 ; Header
   7 ; CHECK-NEXT:   .byte 3
   8 ; CHECK-NEXT:   .byte 0
   9 ; CHECK-NEXT:   .short 0
  10
  11 ; NumFunctions
  12 ; CHECK-NEXT:   .long 1
  13 ; NumConstants
  14 ; CHECK-NEXT:   .long 0
  15 ; NumRecords
  16 ; CHECK-NEXT:   .long 1
  17
  18 ; StackSizeRecord[NumFunctions]
  19 ;   StackSizeRecord[0]
  20 ;     CHECK-NEXT:   .quad _main
  21 ;     CHECK-NEXT:   .quad 24
  22 ;     CHECK-NEXT:   .quad 1
  23
  24 ; Constants[NumConstants] (empty)
  25
  26 ; StkMapRecord[NumRecords]
  27 ;   StkMapRecord[0]
  28 ;     CHECK-NEXT:       .quad 0
  29 ;     CHECK-NEXT:   .long {{.*}}
  30 ;     CHECK-NEXT:   .short {{.*}}
  31 ;     NumLocations
  32 ;     CHECK-NEXT:   .short 11
  33 ;     Location[NumLocations]
  34 ;       Location[0]
  35 ;         CHECK-NEXT: .byte   1
  36 ;         CHECK-NEXT: .byte   0
  37 ;         CHECK-NEXT: .short  1
  38 ;         CHECK-NEXT: .short  {{.*}}
  39 ;         CHECK-NEXT: .short  0
  40 ;         CHECK-NEXT: .long   0
  41 ;       Location[1]
  42 ;         CHECK-NEXT: .byte   4
  43 ;         CHECK-NEXT: .byte   0
  44 ;         CHECK-NEXT: .short  8
  45 ;         CHECK-NEXT: .short  0
  46 ;         CHECK-NEXT: .short  0
  47 ;         CHECK-NEXT: .long   22
  48 ;       Location[2]
  49 ;         CHECK-NEXT: .byte   1
  50 ;         CHECK-NEXT: .byte   0
  51 ;         CHECK-NEXT: .short  1
  52 ;         CHECK-NEXT: .short  {{.*}}
  53 ;         CHECK-NEXT: .short  0
  54 ;         CHECK-NEXT: .long   0
  55 ;       Location[3]
  56 ;         CHECK-NEXT: .byte   1
  57 ;         CHECK-NEXT: .byte   0
  58 ;         CHECK-NEXT: .short  16
  59 ;         CHECK-NEXT: .short  {{.*}}
  60 ;         CHECK-NEXT: .short  0
  61 ;         CHECK-NEXT: .long   0
  62 ;       Location[4]
  63 ;         CHECK-NEXT: .byte   1
  64 ;         CHECK-NEXT: .byte   0
  65 ;         CHECK-NEXT: .short  16
  66 ;         CHECK-NEXT: .short  {{.*}}
  67 ;         CHECK-NEXT: .short  0
  68 ;         CHECK-NEXT: .long   0
  69 ;       Location[5]
  70 ;         CHECK-NEXT: .byte   4
  71 ;         CHECK-NEXT: .byte   0
  72 ;         CHECK-NEXT: .short  8
  73 ;         CHECK-NEXT: .short  {{.*}}
  74 ;         CHECK-NEXT: .short  0
  75 ;         CHECK-NEXT: .long   66
  76 ;       Location[6]
  77 ;         CHECK-NEXT: .byte   1
  78 ;         CHECK-NEXT: .byte   0
  79 ;         CHECK-NEXT: .short  4
  80 ;         CHECK-NEXT: .short  {{.*}}
  81 ;         CHECK-NEXT: .short  0
  82 ;         CHECK-NEXT: .long   0
  83 ;       Location[7]
  84 ;         CHECK-NEXT: .byte   4
  85 ;         CHECK-NEXT: .byte   0
  86 ;         CHECK-NEXT: .short  8
  87 ;         CHECK-NEXT: .short  0
  88 ;         CHECK-NEXT: .short  0
  89 ;         CHECK-NEXT: .long   0
  90 ;       Location[8]
  91 ;         CHECK-NEXT: .byte   1
  92 ;         CHECK-NEXT: .byte   0
  93 ;         CHECK-NEXT: .short  4
  94 ;         CHECK-NEXT: .short  {{.*}}
  95 ;         CHECK-NEXT: .short  0
  96 ;         CHECK-NEXT: .long   0
  97 ;       Location[9]
  98 ;         CHECK-NEXT: .byte   4
  99 ;         CHECK-NEXT: .byte   0
 100 ;         CHECK-NEXT: .short  8
 101 ;         CHECK-NEXT: .short  0
 102 ;         CHECK-NEXT: .short  0
 103 ;         CHECK-NEXT: .long   0
 104 ;       Location[10]
 105 ;         CHECK-NEXT: .byte   1
 106 ;         CHECK-NEXT: .byte   0
 107 ;         CHECK-NEXT: .short  1
 108 ;         CHECK-NEXT: .short  {{.*}}
 109 ;         CHECK-NEXT: .short  0
 110 ;         CHECK-NEXT: .long   0
 111
 112 @p32 = external global ptr addrspace(270)
 113
 114 %struct1 = type {i32, i64}
 115 %struct2 = type {i1, i1, i1}
 116
 117 declare void @llvm.experimental.stackmap(i64, i32, ...)
 118
 119 define dso_local i32 @main(i32 %argc, ptr %argv) {
 120 entry:
 121   %i1reg = icmp eq i32 %argc, 5
 122   %i7reg = zext i1 %i1reg to i7
 123   %halfreg = sitofp i32 %argc to half
 124   %ptr32 = load ptr addrspace(270), ptr @p32
 125   %structreg1 = insertvalue %struct1 zeroinitializer, i32 %argc, 0
 126   %structreg2 = insertvalue %struct2 zeroinitializer, i1 %i1reg, 0
 127   call void (i64, i32, ...) @llvm.experimental.stackmap(
 128     i64 0,
 129     i32 0,
 130     i1 %i1reg,
 131     i7 22,
 132     i7 %i7reg,
 133     half 1.0,
 134     half %halfreg,
 135     i128 66,
 136     ; FIXME: fix and test vectors. At the moment even legally sized vectors
 137     ; are broken:
 138     ; https://github.com/llvm/llvm-project/issues/55613
 139     ;
 140     ; FIXME: test non-constant i128 once these are fixed:
 141     ;  - https://github.com/llvm/llvm-project/issues/26431
 142     ;  - https://github.com/llvm/llvm-project/issues/55957
 143     ptr addrspace(270) %ptr32,
 144     ; FIXME: The stackmap record generated for structs is incorrect:
 145     ;  - https://github.com/llvm/llvm-project/issues/55649
 146     ;  - https://github.com/llvm/llvm-project/issues/55957
 147     %struct1 zeroinitializer,
 148     %struct1 %structreg1,
 149     %struct2 zeroinitializer,
 150     %struct2 %structreg2)
 151   ret i32 0
 152 }