| blob | cd59562b2125a170cc468cdc4496f5467e98b609 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK
3 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
5 ; Try to ensure that vselect folds into any previous instruction.
6 ; Shuffle lowering can widen the select mask preventing it being used as a predicate mask move.
8 define void @PR46249(ptr noalias nocapture noundef %0) {
9 ; CHECK-LABEL: PR46249:
10 ; CHECK: # %bb.0:
11 ; CHECK-NEXT: vmovdqu64 (%rdi), %zmm0
12 ; CHECK-NEXT: vpshufd {{.*#+}} zmm1 = zmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
13 ; CHECK-NEXT: vpminsd %zmm0, %zmm1, %zmm2
14 ; CHECK-NEXT: movw $-21846, %ax # imm = 0xAAAA
15 ; CHECK-NEXT: kmovw %eax, %k1
16 ; CHECK-NEXT: vpmaxsd %zmm0, %zmm1, %zmm2 {%k1}
17 ; CHECK-NEXT: vpshufd {{.*#+}} zmm0 = zmm2[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
18 ; CHECK-NEXT: vpminsd %zmm2, %zmm0, %zmm1
19 ; CHECK-NEXT: vpmaxsd %zmm2, %zmm0, %zmm0
20 ; CHECK-NEXT: vshufps {{.*#+}} zmm2 = zmm1[0,1],zmm0[2,3],zmm1[4,5],zmm0[6,7],zmm1[8,9],zmm0[10,11],zmm1[12,13],zmm0[14,15]
21 ; CHECK-NEXT: vshufps {{.*#+}} zmm0 = zmm1[1,0],zmm0[3,2],zmm1[5,4],zmm0[7,6],zmm1[9,8],zmm0[11,10],zmm1[13,12],zmm0[15,14]
22 ; CHECK-NEXT: vpminsd %zmm2, %zmm0, %zmm1
23 ; CHECK-NEXT: vpmaxsd %zmm2, %zmm0, %zmm1 {%k1}
24 ; CHECK-NEXT: vpshufd {{.*#+}} zmm0 = zmm1[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
25 ; CHECK-NEXT: vpermq {{.*#+}} zmm0 = zmm0[2,3,0,1,6,7,4,5]
26 ; CHECK-NEXT: vpminsd %zmm1, %zmm0, %zmm2
27 ; CHECK-NEXT: movw $-3856, %ax # imm = 0xF0F0
28 ; CHECK-NEXT: kmovw %eax, %k2
29 ; CHECK-NEXT: vpmaxsd %zmm1, %zmm0, %zmm2 {%k2}
30 ; CHECK-NEXT: vpshufd {{.*#+}} zmm0 = zmm2[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13]
31 ; CHECK-NEXT: vpminsd %zmm2, %zmm0, %zmm1
32 ; CHECK-NEXT: vpmaxsd %zmm2, %zmm0, %zmm0
33 ; CHECK-NEXT: vshufps {{.*#+}} zmm2 = zmm1[0,1],zmm0[2,3],zmm1[4,5],zmm0[6,7],zmm1[8,9],zmm0[10,11],zmm1[12,13],zmm0[14,15]
34 ; CHECK-NEXT: vshufps {{.*#+}} zmm0 = zmm1[1,0],zmm0[3,2],zmm1[5,4],zmm0[7,6],zmm1[9,8],zmm0[11,10],zmm1[13,12],zmm0[15,14]
35 ; CHECK-NEXT: vpminsd %zmm2, %zmm0, %zmm1
36 ; CHECK-NEXT: vpmaxsd %zmm2, %zmm0, %zmm1 {%k1}
37 ; CHECK-NEXT: vpshufd {{.*#+}} zmm0 = zmm1[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
38 ; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[4,5,6,7,0,1,2,3]
39 ; CHECK-NEXT: vpminsd %zmm1, %zmm0, %zmm2
40 ; CHECK-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0
41 ; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm2[2,3,0,1],zmm0[6,7,4,5]
42 ; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm2[0,1,2,3],zmm0[4,5,6,7]
43 ; CHECK-NEXT: vpminsd %zmm0, %zmm1, %zmm2
44 ; CHECK-NEXT: vpmaxsd %zmm0, %zmm1, %zmm2 {%k2}
45 ; CHECK-NEXT: vpshufd {{.*#+}} zmm0 = zmm2[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13]
46 ; CHECK-NEXT: vpminsd %zmm2, %zmm0, %zmm1
47 ; CHECK-NEXT: vpmaxsd %zmm2, %zmm0, %zmm0
48 ; CHECK-NEXT: vshufps {{.*#+}} zmm2 = zmm1[0,1],zmm0[2,3],zmm1[4,5],zmm0[6,7],zmm1[8,9],zmm0[10,11],zmm1[12,13],zmm0[14,15]
49 ; CHECK-NEXT: vshufps {{.*#+}} zmm0 = zmm1[1,0],zmm0[3,2],zmm1[5,4],zmm0[7,6],zmm1[9,8],zmm0[11,10],zmm1[13,12],zmm0[15,14]
50 ; CHECK-NEXT: vpminsd %zmm2, %zmm0, %zmm1
51 ; CHECK-NEXT: vpmaxsd %zmm2, %zmm0, %zmm1 {%k1}
52 ; CHECK-NEXT: vmovdqu64 %zmm1, (%rdi)
53 ; CHECK-NEXT: vzeroupper
54 ; CHECK-NEXT: retq
55 %2 = load <16 x i32>, ptr %0, align 1
56 %3 = shufflevector <16 x i32> %2, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
57 %4 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %3, <16 x i32> %2) #2
58 %5 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %3, <16 x i32> %2) #2
59 %6 = shufflevector <16 x i32> %4, <16 x i32> %5, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
60 %7 = shufflevector <16 x i32> %6, <16 x i32> poison, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
61 %8 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %7, <16 x i32> %6) #2
62 %9 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %7, <16 x i32> %6) #2
63 %10 = shufflevector <16 x i32> %8, <16 x i32> %9, <16 x i32> <i32 0, i32 1, i32 18, i32 19, i32 4, i32 5, i32 22, i32 23, i32 8, i32 9, i32 26, i32 27, i32 12, i32 13, i32 30, i32 31>
64 %11 = shufflevector <16 x i32> %10, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
65 %12 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %11, <16 x i32> %10) #2
66 %13 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %11, <16 x i32> %10) #2
67 %14 = shufflevector <16 x i32> %12, <16 x i32> %13, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
68 %15 = shufflevector <16 x i32> %14, <16 x i32> poison, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
69 %16 = shufflevector <16 x i32> %15, <16 x i32> poison, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11>
70 %17 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %16, <16 x i32> %14) #2
71 %18 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %16, <16 x i32> %14) #2
72 %19 = shufflevector <16 x i32> %17, <16 x i32> %18, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
73 %20 = shufflevector <16 x i32> %19, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5, i32 10, i32 11, i32 8, i32 9, i32 14, i32 15, i32 12, i32 13>
74 %21 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %20, <16 x i32> %19) #2
75 %22 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %20, <16 x i32> %19) #2
76 %23 = shufflevector <16 x i32> %21, <16 x i32> %22, <16 x i32> <i32 0, i32 1, i32 18, i32 19, i32 4, i32 5, i32 22, i32 23, i32 8, i32 9, i32 26, i32 27, i32 12, i32 13, i32 30, i32 31>
77 %24 = shufflevector <16 x i32> %23, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
78 %25 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %24, <16 x i32> %23) #2
79 %26 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %24, <16 x i32> %23) #2
80 %27 = shufflevector <16 x i32> %25, <16 x i32> %26, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
81 %28 = shufflevector <16 x i32> %27, <16 x i32> poison, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
82 %29 = shufflevector <16 x i32> %28, <16 x i32> poison, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
83 %30 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %29, <16 x i32> %27) #2
84 %31 = bitcast <16 x i32> %30 to <8 x i64>
85 %32 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %29, <16 x i32> %27) #2
86 %33 = bitcast <16 x i32> %32 to <8 x i64>
87 %34 = shufflevector <8 x i64> %31, <8 x i64> %33, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
88 %35 = shufflevector <8 x i64> %31, <8 x i64> %33, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 14, i32 15, i32 12, i32 13>
89 %36 = bitcast <8 x i64> %35 to <16 x i32>
90 %37 = bitcast <8 x i64> %34 to <16 x i32>
91 %38 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %36, <16 x i32> %37) #2
92 %39 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %36, <16 x i32> %37) #2
93 %40 = shufflevector <16 x i32> %38, <16 x i32> %39, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
94 %41 = shufflevector <16 x i32> %40, <16 x i32> poison, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5, i32 10, i32 11, i32 8, i32 9, i32 14, i32 15, i32 12, i32 13>
95 %42 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %41, <16 x i32> %40) #2
96 %43 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %41, <16 x i32> %40) #2
97 %44 = shufflevector <16 x i32> %42, <16 x i32> %43, <16 x i32> <i32 0, i32 1, i32 18, i32 19, i32 4, i32 5, i32 22, i32 23, i32 8, i32 9, i32 26, i32 27, i32 12, i32 13, i32 30, i32 31>
98 %45 = shufflevector <16 x i32> %44, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
99 %46 = tail call <16 x i32> @llvm.smin.v16i32(<16 x i32> %45, <16 x i32> %44) #2
100 %47 = tail call <16 x i32> @llvm.smax.v16i32(<16 x i32> %45, <16 x i32> %44) #2
101 %48 = shufflevector <16 x i32> %46, <16 x i32> %47, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
102 store <16 x i32> %48, ptr %0, align 1
103 ret void
104 }
105 declare <16 x i32> @llvm.smin.v16i32(<16 x i32>, <16 x i32>)
106 declare <16 x i32> @llvm.smax.v16i32(<16 x i32>, <16 x i32>)