1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s
4 define i1 @test_add_nuw(i8 %start, i8 %low, i8 %high) {
5 ; CHECK-LABEL: @test_add_nuw(
7 ; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nuw i8 [[START:%.*]], 3
8 ; CHECK-NEXT: [[C_1:%.*]] = icmp uge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
9 ; CHECK-NEXT: br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
11 ; CHECK-NEXT: [[UC_3:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
12 ; CHECK-NEXT: [[START_1_1:%.*]] = add nuw i8 [[START]], 1
13 ; CHECK-NEXT: [[UC_4:%.*]] = icmp uge i8 [[START_1_1]], [[HIGH]]
14 ; CHECK-NEXT: [[RES_11:%.*]] = xor i1 [[UC_3]], [[UC_4]]
15 ; CHECK-NEXT: [[START_3_1:%.*]] = add nuw i8 [[START]], 3
16 ; CHECK-NEXT: [[RES_12:%.*]] = xor i1 [[RES_11]], true
17 ; CHECK-NEXT: [[UC_5:%.*]] = icmp ugt i8 [[START_3_1]], [[HIGH]]
18 ; CHECK-NEXT: [[RES_13:%.*]] = xor i1 [[RES_12]], [[UC_5]]
19 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sge i8 [[START_1_1]], [[HIGH]]
20 ; CHECK-NEXT: [[RES_14:%.*]] = xor i1 [[RES_13]], [[SC_8]]
21 ; CHECK-NEXT: [[SC_9:%.*]] = icmp sge i8 [[START_3_1]], [[HIGH]]
22 ; CHECK-NEXT: [[RES_15:%.*]] = xor i1 [[RES_14]], [[SC_9]]
23 ; CHECK-NEXT: ret i1 [[RES_15]]
25 ; CHECK-NEXT: [[START_1:%.*]] = add nuw i8 [[START]], 1
26 ; CHECK-NEXT: [[RES_0:%.*]] = xor i1 false, false
27 ; CHECK-NEXT: [[SC_1:%.*]] = icmp sgt i8 [[START]], [[HIGH]]
28 ; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[RES_0]], [[SC_1]]
29 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sge i8 [[START_1]], [[HIGH]]
30 ; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[RES_1]], [[SC_2]]
31 ; CHECK-NEXT: [[START_2:%.*]] = add nuw i8 [[START]], 2
32 ; CHECK-NEXT: [[RES_3:%.*]] = xor i1 [[RES_2]], false
33 ; CHECK-NEXT: [[SC_3:%.*]] = icmp sge i8 [[START_2]], [[HIGH]]
34 ; CHECK-NEXT: [[RES_4:%.*]] = xor i1 [[RES_3]], [[SC_3]]
35 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i8 [[START_2]], [[START_1]]
36 ; CHECK-NEXT: [[RES_5:%.*]] = xor i1 [[RES_4]], [[SC_4]]
37 ; CHECK-NEXT: [[START_3:%.*]] = add nuw i8 [[START]], 3
38 ; CHECK-NEXT: [[RES_6:%.*]] = xor i1 [[RES_5]], false
39 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sge i8 [[START_3]], [[START_1]]
40 ; CHECK-NEXT: [[RES_7:%.*]] = xor i1 [[RES_6]], [[SC_5]]
41 ; CHECK-NEXT: [[START_4:%.*]] = add nuw i8 [[START]], 4
42 ; CHECK-NEXT: [[UC_2:%.*]] = icmp uge i8 [[START_4]], [[HIGH]]
43 ; CHECK-NEXT: [[RES_8:%.*]] = xor i1 [[RES_7]], [[UC_2]]
44 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sge i8 [[START_4]], [[START_1]]
45 ; CHECK-NEXT: [[RES_9:%.*]] = xor i1 [[RES_8]], [[SC_6]]
46 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sge i8 [[START_4]], [[HIGH]]
47 ; CHECK-NEXT: [[RES_10:%.*]] = xor i1 [[RES_9]], [[SC_7]]
48 ; CHECK-NEXT: ret i1 [[RES_10]]
51 %add.ptr.i = add nuw i8 %start, 3
52 %c.1 = icmp uge i8 %add.ptr.i, %high
53 br i1 %c.1, label %if.then, label %if.else
57 %uc.3 = icmp ugt i8 %start, %high
58 %start.1.1 = add nuw i8 %start, 1
59 %uc.4 = icmp uge i8 %start.1.1, %high
60 %res.11 = xor i1 %uc.3, %uc.4
62 %start.3.1 = add nuw i8 %start, 3
63 %t.0 = icmp uge i8 %start.3.1, %high
64 %res.12 = xor i1 %res.11, %t.0
66 %uc.5 = icmp ugt i8 %start.3.1, %high
67 %res.13 = xor i1 %res.12, %uc.5
69 %sc.8 = icmp sge i8 %start.1.1, %high
70 %res.14 = xor i1 %res.13, %sc.8
72 %sc.9 = icmp sge i8 %start.3.1, %high
73 %res.15 = xor i1 %res.14, %sc.9
78 %f.0 = icmp ugt i8 %start, %high
79 %start.1 = add nuw i8 %start, 1
80 %f.1 = icmp uge i8 %start.1, %high
81 %res.0 = xor i1 %f.0, %f.1
83 %sc.1 = icmp sgt i8 %start, %high
84 %res.1 = xor i1 %res.0, %sc.1
86 %sc.2 = icmp sge i8 %start.1, %high
87 %res.2 = xor i1 %res.1, %sc.2
89 %start.2 = add nuw i8 %start, 2
90 %f.2 = icmp uge i8 %start.2, %high
91 %res.3 = xor i1 %res.2, %f.2
93 %sc.3 = icmp sge i8 %start.2, %high
94 %res.4 = xor i1 %res.3, %sc.3
96 %sc.4 = icmp sle i8 %start.2, %start.1
97 %res.5 = xor i1 %res.4, %sc.4
99 %start.3 = add nuw i8 %start, 3
100 %f.3 = icmp uge i8 %start.3, %high
101 %res.6 = xor i1 %res.5, %f.3
103 %sc.5 = icmp sge i8 %start.3, %start.1
104 %res.7 = xor i1 %res.6, %sc.5
106 %start.4 = add nuw i8 %start, 4
107 %uc.2 = icmp uge i8 %start.4, %high
108 %res.8 = xor i1 %res.7, %uc.2
110 %sc.6 = icmp sge i8 %start.4, %start.1
111 %res.9 = xor i1 %res.8, %sc.6
113 %sc.7 = icmp sge i8 %start.4, %high
114 %res.10 = xor i1 %res.9, %sc.7
119 define i1 @test_add_nsw(i8 %start, i8 %low, i8 %high) {
120 ; CHECK-LABEL: @test_add_nsw(
122 ; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nsw i8 [[START:%.*]], 3
123 ; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
124 ; CHECK-NEXT: br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
126 ; CHECK-NEXT: [[UC_3:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
127 ; CHECK-NEXT: [[START_1_1:%.*]] = add nuw i8 [[START]], 1
128 ; CHECK-NEXT: [[UC_4:%.*]] = icmp uge i8 [[START_1_1]], [[HIGH]]
129 ; CHECK-NEXT: [[RES_11:%.*]] = xor i1 [[UC_3]], [[UC_4]]
130 ; CHECK-NEXT: [[START_3_1:%.*]] = add nuw i8 [[START]], 3
131 ; CHECK-NEXT: [[T_0:%.*]] = icmp uge i8 [[START_3_1]], [[HIGH]]
132 ; CHECK-NEXT: [[RES_12:%.*]] = xor i1 [[RES_11]], [[T_0]]
133 ; CHECK-NEXT: [[UC_5:%.*]] = icmp ugt i8 [[START_3_1]], [[HIGH]]
134 ; CHECK-NEXT: [[RES_13:%.*]] = xor i1 [[RES_12]], [[UC_5]]
135 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sge i8 [[START_1_1]], [[HIGH]]
136 ; CHECK-NEXT: [[RES_14:%.*]] = xor i1 [[RES_13]], [[SC_8]]
137 ; CHECK-NEXT: [[SC_9:%.*]] = icmp sge i8 [[START_3_1]], [[HIGH]]
138 ; CHECK-NEXT: [[RES_15:%.*]] = xor i1 [[RES_14]], [[SC_9]]
139 ; CHECK-NEXT: ret i1 [[RES_15]]
141 ; CHECK-NEXT: [[F_0:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
142 ; CHECK-NEXT: [[START_1:%.*]] = add nuw i8 [[START]], 1
143 ; CHECK-NEXT: [[F_1:%.*]] = icmp uge i8 [[START_1]], [[HIGH]]
144 ; CHECK-NEXT: [[RES_0:%.*]] = xor i1 [[F_0]], [[F_1]]
145 ; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[RES_0]], false
146 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sge i8 [[START_1]], [[HIGH]]
147 ; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[RES_1]], [[SC_2]]
148 ; CHECK-NEXT: [[START_2:%.*]] = add nuw i8 [[START]], 2
149 ; CHECK-NEXT: [[F_2:%.*]] = icmp uge i8 [[START_2]], [[HIGH]]
150 ; CHECK-NEXT: [[RES_3:%.*]] = xor i1 [[RES_2]], [[F_2]]
151 ; CHECK-NEXT: [[SC_3:%.*]] = icmp sge i8 [[START_2]], [[HIGH]]
152 ; CHECK-NEXT: [[RES_4:%.*]] = xor i1 [[RES_3]], [[SC_3]]
153 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i8 [[START_2]], [[START_1]]
154 ; CHECK-NEXT: [[RES_5:%.*]] = xor i1 [[RES_4]], [[SC_4]]
155 ; CHECK-NEXT: [[START_3:%.*]] = add nuw i8 [[START]], 3
156 ; CHECK-NEXT: [[F_3:%.*]] = icmp uge i8 [[START_3]], [[HIGH]]
157 ; CHECK-NEXT: [[RES_6:%.*]] = xor i1 [[RES_5]], [[F_3]]
158 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sge i8 [[START_3]], [[START_1]]
159 ; CHECK-NEXT: [[RES_7:%.*]] = xor i1 [[RES_6]], [[SC_5]]
160 ; CHECK-NEXT: [[START_4:%.*]] = add nuw i8 [[START]], 4
161 ; CHECK-NEXT: [[UC_2:%.*]] = icmp uge i8 [[START_4]], [[HIGH]]
162 ; CHECK-NEXT: [[RES_8:%.*]] = xor i1 [[RES_7]], [[UC_2]]
163 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sge i8 [[START_4]], [[START_1]]
164 ; CHECK-NEXT: [[RES_9:%.*]] = xor i1 [[RES_8]], [[SC_6]]
165 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sge i8 [[START_4]], [[HIGH]]
166 ; CHECK-NEXT: [[RES_10:%.*]] = xor i1 [[RES_9]], [[SC_7]]
167 ; CHECK-NEXT: ret i1 [[RES_10]]
170 %add.ptr.i = add nsw i8 %start, 3
171 %c.1 = icmp sge i8 %add.ptr.i, %high
172 br i1 %c.1, label %if.then, label %if.else
175 %uc.3 = icmp ugt i8 %start, %high
176 %start.1.1 = add nuw i8 %start, 1
177 %uc.4 = icmp uge i8 %start.1.1, %high
178 %res.11 = xor i1 %uc.3, %uc.4
180 %start.3.1 = add nuw i8 %start, 3
181 %t.0 = icmp uge i8 %start.3.1, %high
182 %res.12 = xor i1 %res.11, %t.0
184 %uc.5 = icmp ugt i8 %start.3.1, %high
185 %res.13 = xor i1 %res.12, %uc.5
187 %sc.8 = icmp sge i8 %start.1.1, %high
188 %res.14 = xor i1 %res.13, %sc.8
190 %sc.9 = icmp sge i8 %start.3.1, %high
191 %res.15 = xor i1 %res.14, %sc.9
196 %f.0 = icmp ugt i8 %start, %high
197 %start.1 = add nuw i8 %start, 1
198 %f.1 = icmp uge i8 %start.1, %high
199 %res.0 = xor i1 %f.0, %f.1
201 %sc.1 = icmp sgt i8 %start, %high
202 %res.1 = xor i1 %res.0, %sc.1
204 %sc.2 = icmp sge i8 %start.1, %high
205 %res.2 = xor i1 %res.1, %sc.2
207 %start.2 = add nuw i8 %start, 2
208 %f.2 = icmp uge i8 %start.2, %high
209 %res.3 = xor i1 %res.2, %f.2
211 %sc.3 = icmp sge i8 %start.2, %high
212 %res.4 = xor i1 %res.3, %sc.3
214 %sc.4 = icmp sle i8 %start.2, %start.1
215 %res.5 = xor i1 %res.4, %sc.4
217 %start.3 = add nuw i8 %start, 3
218 %f.3 = icmp uge i8 %start.3, %high
219 %res.6 = xor i1 %res.5, %f.3
221 %sc.5 = icmp sge i8 %start.3, %start.1
222 %res.7 = xor i1 %res.6, %sc.5
224 %start.4 = add nuw i8 %start, 4
225 %uc.2 = icmp uge i8 %start.4, %high
226 %res.8 = xor i1 %res.7, %uc.2
228 %sc.6 = icmp sge i8 %start.4, %start.1
229 %res.9 = xor i1 %res.8, %sc.6
231 %sc.7 = icmp sge i8 %start.4, %high
232 %res.10 = xor i1 %res.9, %sc.7
238 define i1 @test_sub_nuw(i8 %start, i8 %low, i8 %high) {
239 ; CHECK-LABEL: @test_sub_nuw(
241 ; CHECK-NEXT: [[ADD_PTR_I:%.*]] = sub nuw i8 [[START:%.*]], 3
242 ; CHECK-NEXT: [[C_1:%.*]] = icmp uge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
243 ; CHECK-NEXT: br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
245 ; CHECK-NEXT: [[START_1_1:%.*]] = sub nuw i8 [[START]], 1
246 ; CHECK-NEXT: [[RES_11:%.*]] = xor i1 true, true
247 ; CHECK-NEXT: [[START_3_1:%.*]] = add nuw i8 [[START]], 3
248 ; CHECK-NEXT: [[RES_12:%.*]] = xor i1 [[RES_11]], true
249 ; CHECK-NEXT: [[RES_13:%.*]] = xor i1 [[RES_12]], true
250 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sge i8 [[START_1_1]], [[HIGH]]
251 ; CHECK-NEXT: [[RES_14:%.*]] = xor i1 [[RES_13]], [[SC_8]]
252 ; CHECK-NEXT: [[SC_9:%.*]] = icmp sge i8 [[START_3_1]], [[HIGH]]
253 ; CHECK-NEXT: [[RES_15:%.*]] = xor i1 [[RES_14]], [[SC_9]]
254 ; CHECK-NEXT: ret i1 [[RES_15]]
256 ; CHECK-NEXT: [[F_0:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
257 ; CHECK-NEXT: [[START_1:%.*]] = sub nuw i8 [[START]], 1
258 ; CHECK-NEXT: [[F_1:%.*]] = icmp uge i8 [[START_1]], [[HIGH]]
259 ; CHECK-NEXT: [[RES_0:%.*]] = xor i1 [[F_0]], [[F_1]]
260 ; CHECK-NEXT: [[SC_1:%.*]] = icmp sgt i8 [[START]], [[HIGH]]
261 ; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[RES_0]], [[SC_1]]
262 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sge i8 [[START_1]], [[HIGH]]
263 ; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[RES_1]], [[SC_2]]
264 ; CHECK-NEXT: [[START_2:%.*]] = sub nuw i8 [[START]], 2
265 ; CHECK-NEXT: [[F_2:%.*]] = icmp uge i8 [[START_2]], [[HIGH]]
266 ; CHECK-NEXT: [[RES_3:%.*]] = xor i1 [[RES_2]], [[F_2]]
267 ; CHECK-NEXT: [[SC_3:%.*]] = icmp sge i8 [[START_2]], [[HIGH]]
268 ; CHECK-NEXT: [[RES_4:%.*]] = xor i1 [[RES_3]], [[SC_3]]
269 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i8 [[START_2]], [[START_1]]
270 ; CHECK-NEXT: [[RES_5:%.*]] = xor i1 [[RES_4]], [[SC_4]]
271 ; CHECK-NEXT: [[START_3:%.*]] = sub nuw i8 [[START]], 3
272 ; CHECK-NEXT: [[RES_6:%.*]] = xor i1 [[RES_5]], false
273 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sge i8 [[START_3]], [[START_1]]
274 ; CHECK-NEXT: [[RES_7:%.*]] = xor i1 [[RES_6]], [[SC_5]]
275 ; CHECK-NEXT: [[START_4:%.*]] = sub nuw i8 [[START]], 4
276 ; CHECK-NEXT: [[RES_8:%.*]] = xor i1 [[RES_7]], false
277 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sge i8 [[START_4]], [[START_1]]
278 ; CHECK-NEXT: [[RES_9:%.*]] = xor i1 [[RES_8]], [[SC_6]]
279 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sge i8 [[START_4]], [[HIGH]]
280 ; CHECK-NEXT: [[RES_10:%.*]] = xor i1 [[RES_9]], [[SC_7]]
281 ; CHECK-NEXT: ret i1 [[RES_10]]
284 %add.ptr.i = sub nuw i8 %start, 3
285 %c.1 = icmp uge i8 %add.ptr.i, %high
286 br i1 %c.1, label %if.then, label %if.else
290 %uc.3 = icmp ugt i8 %start, %high
291 %start.1.1 = sub nuw i8 %start, 1
292 %uc.4 = icmp uge i8 %start.1.1, %high
293 %res.11 = xor i1 %uc.3, %uc.4
295 %start.3.1 = add nuw i8 %start, 3
296 %t.0 = icmp uge i8 %start.3.1, %high
297 %res.12 = xor i1 %res.11, %t.0
299 %uc.5 = icmp ugt i8 %start.3.1, %high
300 %res.13 = xor i1 %res.12, %uc.5
302 %sc.8 = icmp sge i8 %start.1.1, %high
303 %res.14 = xor i1 %res.13, %sc.8
305 %sc.9 = icmp sge i8 %start.3.1, %high
306 %res.15 = xor i1 %res.14, %sc.9
311 %f.0 = icmp ugt i8 %start, %high
312 %start.1 = sub nuw i8 %start, 1
313 %f.1 = icmp uge i8 %start.1, %high
314 %res.0 = xor i1 %f.0, %f.1
316 %sc.1 = icmp sgt i8 %start, %high
317 %res.1 = xor i1 %res.0, %sc.1
319 %sc.2 = icmp sge i8 %start.1, %high
320 %res.2 = xor i1 %res.1, %sc.2
322 %start.2 = sub nuw i8 %start, 2
323 %f.2 = icmp uge i8 %start.2, %high
324 %res.3 = xor i1 %res.2, %f.2
326 %sc.3 = icmp sge i8 %start.2, %high
327 %res.4 = xor i1 %res.3, %sc.3
329 %sc.4 = icmp sle i8 %start.2, %start.1
330 %res.5 = xor i1 %res.4, %sc.4
332 %start.3 = sub nuw i8 %start, 3
333 %f.3 = icmp uge i8 %start.3, %high
334 %res.6 = xor i1 %res.5, %f.3
336 %sc.5 = icmp sge i8 %start.3, %start.1
337 %res.7 = xor i1 %res.6, %sc.5
339 %start.4 = sub nuw i8 %start, 4
340 %uc.2 = icmp uge i8 %start.4, %high
341 %res.8 = xor i1 %res.7, %uc.2
343 %sc.6 = icmp sge i8 %start.4, %start.1
344 %res.9 = xor i1 %res.8, %sc.6
346 %sc.7 = icmp sge i8 %start.4, %high
347 %res.10 = xor i1 %res.9, %sc.7
352 define i1 @test_and_ule_sge(i32 %x, i32 %y, i32 %z, i32 %a) {
353 ; CHECK-LABEL: @test_and_ule_sge(
355 ; CHECK-NEXT: [[C_1:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]]
356 ; CHECK-NEXT: [[C_2:%.*]] = icmp sle i32 [[Y]], [[Z:%.*]]
357 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[C_1]], [[C_2]]
358 ; CHECK-NEXT: br i1 [[AND]], label [[THEN:%.*]], label [[ELSE:%.*]]
360 ; CHECK-NEXT: [[UC_1:%.*]] = icmp ule i32 [[X]], [[Z]]
361 ; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[UC_1]], true
362 ; CHECK-NEXT: [[UC_3:%.*]] = icmp ule i32 [[Y]], [[Z]]
363 ; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[RES_1]], [[UC_3]]
364 ; CHECK-NEXT: [[UC_4:%.*]] = icmp ule i32 [[X]], [[A:%.*]]
365 ; CHECK-NEXT: [[RES_4:%.*]] = xor i1 [[RES_2]], [[UC_4]]
366 ; CHECK-NEXT: [[SC_1:%.*]] = icmp sle i32 [[X]], [[Z]]
367 ; CHECK-NEXT: [[RES_5:%.*]] = xor i1 [[RES_4]], [[SC_1]]
368 ; CHECK-NEXT: [[SC_2:%.*]] = icmp sle i32 [[X]], [[Y]]
369 ; CHECK-NEXT: [[RES_6:%.*]] = xor i1 [[RES_5]], [[SC_2]]
370 ; CHECK-NEXT: [[RES_7:%.*]] = xor i1 [[RES_6]], true
371 ; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i32 [[X]], [[A]]
372 ; CHECK-NEXT: [[RES_8:%.*]] = xor i1 [[RES_7]], [[SC_4]]
373 ; CHECK-NEXT: ret i1 [[RES_8]]
375 ; CHECK-NEXT: [[UC_5:%.*]] = icmp ule i32 [[X]], [[Z]]
376 ; CHECK-NEXT: [[UC_6:%.*]] = icmp ule i32 [[X]], [[A]]
377 ; CHECK-NEXT: [[RES_9:%.*]] = xor i1 [[UC_5]], [[UC_6]]
378 ; CHECK-NEXT: [[UC_7:%.*]] = icmp ule i32 [[X]], [[Y]]
379 ; CHECK-NEXT: [[RES_10:%.*]] = xor i1 [[RES_9]], [[UC_7]]
380 ; CHECK-NEXT: [[UC_8:%.*]] = icmp ule i32 [[Y]], [[Z]]
381 ; CHECK-NEXT: [[RES_11:%.*]] = xor i1 [[RES_10]], [[UC_8]]
382 ; CHECK-NEXT: [[SC_5:%.*]] = icmp sle i32 [[X]], [[Z]]
383 ; CHECK-NEXT: [[RES_12:%.*]] = xor i1 [[RES_11]], [[SC_5]]
384 ; CHECK-NEXT: [[SC_6:%.*]] = icmp sle i32 [[X]], [[A]]
385 ; CHECK-NEXT: [[RES_13:%.*]] = xor i1 [[RES_12]], [[SC_6]]
386 ; CHECK-NEXT: [[SC_7:%.*]] = icmp sle i32 [[X]], [[Y]]
387 ; CHECK-NEXT: [[RES_14:%.*]] = xor i1 [[RES_13]], [[SC_7]]
388 ; CHECK-NEXT: [[SC_8:%.*]] = icmp sle i32 [[Y]], [[Z]]
389 ; CHECK-NEXT: [[RES_15:%.*]] = xor i1 [[RES_14]], [[SC_8]]
390 ; CHECK-NEXT: ret i1 [[RES_15]]
393 %c.1 = icmp ule i32 %x, %y
394 %c.2 = icmp sle i32 %y, %z
395 %and = and i1 %c.1, %c.2
396 br i1 %and, label %then, label %else
399 %uc.1 = icmp ule i32 %x, %z
400 %uc.2 = icmp ule i32 %x, %y
401 %res.1 = xor i1 %uc.1, %uc.2
403 %uc.3 = icmp ule i32 %y, %z
404 %res.2 = xor i1 %res.1, %uc.3
406 %uc.4 = icmp ule i32 %x, %a
407 %res.4 = xor i1 %res.2, %uc.4
409 %sc.1 = icmp sle i32 %x, %z
410 %res.5 = xor i1 %res.4, %sc.1
412 %sc.2 = icmp sle i32 %x, %y
413 %res.6 = xor i1 %res.5, %sc.2
415 %sc.3 = icmp sle i32 %y, %z
416 %res.7 = xor i1 %res.6, %sc.3
418 %sc.4 = icmp sle i32 %x, %a
419 %res.8 = xor i1 %res.7, %sc.4
424 %uc.5 = icmp ule i32 %x, %z
425 %uc.6 = icmp ule i32 %x, %a
426 %res.9 = xor i1 %uc.5, %uc.6
428 %uc.7 = icmp ule i32 %x, %y
429 %res.10 = xor i1 %res.9, %uc.7
431 %uc.8 = icmp ule i32 %y, %z
432 %res.11 = xor i1 %res.10, %uc.8
434 %sc.5 = icmp sle i32 %x, %z
435 %res.12 = xor i1 %res.11, %sc.5
437 %sc.6 = icmp sle i32 %x, %a
438 %res.13 = xor i1 %res.12, %sc.6
440 %sc.7 = icmp sle i32 %x, %y
441 %res.14 = xor i1 %res.13, %sc.7
443 %sc.8 = icmp sle i32 %y, %z
444 %res.15 = xor i1 %res.14, %sc.8