1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -passes=early-cse < %s | FileCheck %s
4 define i32 @different_types_load(ptr %p) {
5 ; CHECK-LABEL: @different_types_load(
6 ; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
7 ; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[P]], align 4
8 ; CHECK-NEXT: [[V2_C:%.*]] = trunc i64 [[V2]] to i32
9 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[V1]], [[V2_C]]
10 ; CHECK-NEXT: ret i32 [[SUB]]
12 %v1 = load i32, ptr %p
13 %v2 = load i64, ptr %p
14 %v2.c = trunc i64 %v2 to i32
15 %sub = sub i32 %v1, %v2.c
19 define i32 @different_types_vector_load(ptr %p) {
20 ; CHECK-LABEL: @different_types_vector_load(
21 ; CHECK-NEXT: [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[P:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 false>, <4 x i32> poison)
22 ; CHECK-NEXT: [[V2:%.*]] = call <8 x i32> @llvm.masked.load.v8i32.p0(ptr [[P]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <8 x i32> poison)
23 ; CHECK-NEXT: [[E1:%.*]] = extractelement <4 x i32> [[V1]], i32 0
24 ; CHECK-NEXT: [[E2:%.*]] = extractelement <8 x i32> [[V2]], i32 6
25 ; CHECK-NEXT: [[SUM:%.*]] = add i32 [[E1]], [[E2]]
26 ; CHECK-NEXT: ret i32 [[SUM]]
28 %v1 = call <4 x i32> @llvm.masked.load.v4i32.p(ptr %p, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 false>, <4 x i32> poison)
29 %v2 = call <8 x i32> @llvm.masked.load.v8i32.p(ptr %p, i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <8 x i32> poison)
30 %e1 = extractelement <4 x i32> %v1, i32 0
31 %e2 = extractelement <8 x i32> %v2, i32 6
32 %sum = add i32 %e1, %e2
36 define i32 @different_types_store(ptr %p, i32 %a) {
37 ; CHECK-LABEL: @different_types_store(
38 ; CHECK-NEXT: store i32 [[A:%.*]], ptr [[P:%.*]], align 4
39 ; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[P]], align 4
40 ; CHECK-NEXT: [[V2_C:%.*]] = trunc i64 [[V2]] to i32
41 ; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], [[V2_C]]
42 ; CHECK-NEXT: ret i32 [[SUB]]
45 %v2 = load i64, ptr %p
46 %v2.c = trunc i64 %v2 to i32
47 %sub = sub i32 %a, %v2.c
51 define i32 @different_elt_types_vector_load(ptr %p, <4 x i1> %c) {
52 ; CHECK-LABEL: @different_elt_types_vector_load(
53 ; CHECK-NEXT: [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[P:%.*]], i32 4, <4 x i1> [[C:%.*]], <4 x i32> poison)
54 ; CHECK-NEXT: [[V2:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[P]], i32 4, <4 x i1> [[C]], <4 x float> poison)
55 ; CHECK-NEXT: [[E1:%.*]] = extractelement <4 x i32> [[V1]], i32 0
56 ; CHECK-NEXT: [[E2:%.*]] = extractelement <4 x float> [[V2]], i32 0
57 ; CHECK-NEXT: [[E2I:%.*]] = fptosi float [[E2]] to i32
58 ; CHECK-NEXT: [[SUM:%.*]] = add i32 [[E1]], [[E2I]]
59 ; CHECK-NEXT: ret i32 [[SUM]]
61 %v1 = call <4 x i32> @llvm.masked.load.v4i32.p(ptr %p, i32 4, <4 x i1> %c, <4 x i32> poison)
62 %v2 = call <4 x float> @llvm.masked.load.v4f32.p(ptr %p, i32 4, <4 x i1> %c, <4 x float> poison)
63 %e1 = extractelement <4 x i32> %v1, i32 0
64 %e2 = extractelement <4 x float> %v2, i32 0
65 %e2i = fptosi float %e2 to i32
66 %sum = add i32 %e1, %e2i
70 define float @different_elt_types_vector_store_load(ptr %p, <4 x i32> %v1, <4 x i1> %c) {
71 ; CHECK-LABEL: @different_elt_types_vector_store_load(
72 ; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0(<4 x i32> [[V1:%.*]], ptr [[P:%.*]], i32 4, <4 x i1> [[C:%.*]])
73 ; CHECK-NEXT: [[V2:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[P]], i32 4, <4 x i1> [[C]], <4 x float> poison)
74 ; CHECK-NEXT: [[E2:%.*]] = extractelement <4 x float> [[V2]], i32 0
75 ; CHECK-NEXT: ret float [[E2]]
77 call void @llvm.masked.store.v4i32.p(<4 x i32> %v1, ptr %p, i32 4, <4 x i1> %c)
78 %v2 = call <4 x float> @llvm.masked.load.v4f32.p(ptr %p, i32 4, <4 x i1> %c, <4 x float> poison)
79 %e2 = extractelement <4 x float> %v2, i32 0
83 define void @dse(ptr %p, i32 %i1, i8 %i2) {
85 ; CHECK-NEXT: store i32 [[I1:%.*]], ptr [[P:%.*]], align 4
86 ; CHECK-NEXT: store i8 [[I2:%.*]], ptr [[P]], align 1
87 ; CHECK-NEXT: ret void
94 declare <4 x i32> @llvm.masked.load.v4i32.p(ptr, i32 immarg, <4 x i1>, <4 x i32>)
95 declare <8 x i32> @llvm.masked.load.v8i32.p(ptr, i32 immarg, <8 x i1>, <8 x i32>)
96 declare <4 x float> @llvm.masked.load.v4f32.p(ptr, i32 immarg, <4 x i1>, <4 x float>)
97 declare void @llvm.masked.store.v4i32.p(<4 x i32>, ptr, i32 immarg, <4 x i1>)