1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2 ; RUN: opt -S -passes=indvars < %s | FileCheck %s
6 ; %loop2 is never entered and we cannot derive any fact about %iv from it.
7 define i32 @main(i32 %iv.start, i32 %arg2) mustprogress {
8 ; CHECK-LABEL: define i32 @main
9 ; CHECK-SAME: (i32 [[IV_START:%.*]], i32 [[ARG2:%.*]]) #[[ATTR0:[0-9]+]] {
11 ; CHECK-NEXT: br label [[LOOP:%.*]]
13 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ [[IV_START]], [[ENTRY:%.*]] ]
14 ; CHECK-NEXT: br i1 false, label [[LOOP2_PREHEADER:%.*]], label [[LOOP_LATCH]]
15 ; CHECK: loop2.preheader:
16 ; CHECK-NEXT: br label [[LOOP2:%.*]]
18 ; CHECK-NEXT: br i1 true, label [[LOOP2_EXIT:%.*]], label [[LOOP2]]
20 ; CHECK-NEXT: br label [[LOOP_LATCH]]
22 ; CHECK-NEXT: [[IV_NEXT]] = sdiv i32 [[ARG2]], [[IV]]
23 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[IV]], -1
24 ; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP_EXIT:%.*]], label [[LOOP]]
26 ; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i32 [ [[IV_NEXT]], [[LOOP_LATCH]] ]
27 ; CHECK-NEXT: ret i32 [[IV_NEXT_LCSSA]]
33 %iv = phi i32 [ %iv.next, %loop.latch ], [ %iv.start, %entry ]
34 br i1 false, label %loop2.preheader, label %loop.latch
40 %x = load i32, ptr @x, align 4
41 %cmp1 = icmp ult i32 %iv, %x
42 br i1 %cmp1, label %loop2.exit, label %loop2
48 %iv.next = sdiv i32 %arg2, %iv
49 %cmp2 = icmp eq i32 %iv, -1
50 br i1 %cmp2, label %loop.exit, label %loop
53 %iv.next.lcssa = phi i32 [ %iv.next, %loop.latch ]
54 ret i32 %iv.next.lcssa