| blob | 5b7622bca6b5cc26b0dc6ec953e2a5d0655dc139 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -O3 -S | FileCheck --check-prefix=OLDPM %s
3 ; RUN: opt < %s -passes='default<O3>' -S | FileCheck --check-prefix=NEWPM %s
5 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
6 target triple = "thumbv6m-none-none-eabi"
8 ; Not only should we be able to to form memsets here, the original loops
9 ; should be deleted, too.
11 ; Function Attrs: nounwind
12 define dso_local void @arm_fill_q7(i8 signext %value, ptr %pDst, i32 %blockSize) #0 {
13 ; OLDPM-LABEL: @arm_fill_q7(
14 ; OLDPM-NEXT: entry:
15 ; OLDPM-NEXT: [[CMP_NOT20:%.*]] = icmp ult i32 [[BLOCKSIZE:%.*]], 4
16 ; OLDPM-NEXT: br i1 [[CMP_NOT20]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]
17 ; OLDPM: while.body.preheader:
18 ; OLDPM-NEXT: [[TMP0:%.*]] = and i32 [[BLOCKSIZE]], -4
19 ; OLDPM-NEXT: call void @llvm.memset.p0.i32(ptr align 1 [[PDST:%.*]], i8 [[VALUE:%.*]], i32 [[TMP0]], i1 false)
20 ; OLDPM-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[TMP0]]
21 ; OLDPM-NEXT: br label [[WHILE_END]]
22 ; OLDPM: while.end:
23 ; OLDPM-NEXT: [[PDST_ADDR_0_LCSSA:%.*]] = phi ptr [ [[PDST]], [[ENTRY:%.*]] ], [ [[SCEVGEP]], [[WHILE_BODY_PREHEADER]] ]
24 ; OLDPM-NEXT: [[REM:%.*]] = and i32 [[BLOCKSIZE]], 3
25 ; OLDPM-NEXT: [[CMP14_NOT17:%.*]] = icmp eq i32 [[REM]], 0
26 ; OLDPM-NEXT: br i1 [[CMP14_NOT17]], label [[WHILE_END18:%.*]], label [[WHILE_BODY16_PREHEADER:%.*]]
27 ; OLDPM: while.body16.preheader:
28 ; OLDPM-NEXT: call void @llvm.memset.p0.i32(ptr align 1 [[PDST_ADDR_0_LCSSA]], i8 [[VALUE]], i32 [[REM]], i1 false)
29 ; OLDPM-NEXT: br label [[WHILE_END18]]
30 ; OLDPM: while.end18:
31 ; OLDPM-NEXT: ret void
32 ;
33 ; NEWPM-LABEL: @arm_fill_q7(
34 ; NEWPM-NEXT: entry:
35 ; NEWPM-NEXT: [[CMP_NOT17:%.*]] = icmp ult i32 [[BLOCKSIZE:%.*]], 4
36 ; NEWPM-NEXT: br i1 [[CMP_NOT17]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]
37 ; NEWPM: while.body.preheader:
38 ; NEWPM-NEXT: [[TMP0:%.*]] = and i32 [[BLOCKSIZE]], -4
39 ; NEWPM-NEXT: call void @llvm.memset.p0.i32(ptr align 1 [[PDST:%.*]], i8 [[VALUE:%.*]], i32 [[TMP0]], i1 false)
40 ; NEWPM-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[PDST]], i32 [[TMP0]]
41 ; NEWPM-NEXT: br label [[WHILE_END]]
42 ; NEWPM: while.end:
43 ; NEWPM-NEXT: [[PDST_ADDR_0_LCSSA:%.*]] = phi ptr [ [[PDST]], [[ENTRY:%.*]] ], [ [[SCEVGEP]], [[WHILE_BODY_PREHEADER]] ]
44 ; NEWPM-NEXT: [[REM:%.*]] = and i32 [[BLOCKSIZE]], 3
45 ; NEWPM-NEXT: [[CMP14_NOT20:%.*]] = icmp eq i32 [[REM]], 0
46 ; NEWPM-NEXT: br i1 [[CMP14_NOT20]], label [[WHILE_END18:%.*]], label [[WHILE_BODY16_PREHEADER:%.*]]
47 ; NEWPM: while.body16.preheader:
48 ; NEWPM-NEXT: call void @llvm.memset.p0.i32(ptr align 1 [[PDST_ADDR_0_LCSSA]], i8 [[VALUE]], i32 [[REM]], i1 false)
49 ; NEWPM-NEXT: br label [[WHILE_END18]]
50 ; NEWPM: while.end18:
51 ; NEWPM-NEXT: ret void
52 ;
53 entry:
54 %value.addr = alloca i8, align 1
55 %pDst.addr = alloca ptr, align 4
56 %blockSize.addr = alloca i32, align 4
57 %blkCnt = alloca i32, align 4
58 %packedValue = alloca i32, align 4
59 store i8 %value, ptr %value.addr, align 1, !tbaa !3
60 store ptr %pDst, ptr %pDst.addr, align 4, !tbaa !6
61 store i32 %blockSize, ptr %blockSize.addr, align 4, !tbaa !8
62 call void @llvm.lifetime.start.p0(i64 4, ptr %blkCnt) #3
63 call void @llvm.lifetime.start.p0(i64 4, ptr %packedValue) #3
64 %0 = load i8, ptr %value.addr, align 1, !tbaa !3
65 %conv = sext i8 %0 to i32
66 %shl = shl i32 %conv, 0
67 %and = and i32 %shl, 255
68 %1 = load i8, ptr %value.addr, align 1, !tbaa !3
69 %conv1 = sext i8 %1 to i32
70 %shl2 = shl i32 %conv1, 8
71 %and3 = and i32 %shl2, 65280
72 %or = or i32 %and, %and3
73 %2 = load i8, ptr %value.addr, align 1, !tbaa !3
74 %conv4 = sext i8 %2 to i32
75 %shl5 = shl i32 %conv4, 16
76 %and6 = and i32 %shl5, 16711680
77 %or7 = or i32 %or, %and6
78 %3 = load i8, ptr %value.addr, align 1, !tbaa !3
79 %conv8 = sext i8 %3 to i32
80 %shl9 = shl i32 %conv8, 24
81 %and10 = and i32 %shl9, -16777216
82 %or11 = or i32 %or7, %and10
83 store i32 %or11, ptr %packedValue, align 4, !tbaa !8
84 %4 = load i32, ptr %blockSize.addr, align 4, !tbaa !8
85 %shr = lshr i32 %4, 2
86 store i32 %shr, ptr %blkCnt, align 4, !tbaa !8
87 br label %while.cond
89 while.cond: ; preds = %while.body, %entry
90 %5 = load i32, ptr %blkCnt, align 4, !tbaa !8
91 %cmp = icmp ugt i32 %5, 0
92 br i1 %cmp, label %while.body, label %while.end
94 while.body: ; preds = %while.cond
95 %6 = load i32, ptr %packedValue, align 4, !tbaa !8
96 call void @write_q7x4_ia(ptr %pDst.addr, i32 %6)
97 %7 = load i32, ptr %blkCnt, align 4, !tbaa !8
98 %dec = add i32 %7, -1
99 store i32 %dec, ptr %blkCnt, align 4, !tbaa !8
100 br label %while.cond, !llvm.loop !10
102 while.end: ; preds = %while.cond
103 %8 = load i32, ptr %blockSize.addr, align 4, !tbaa !8
104 %rem = urem i32 %8, 4
105 store i32 %rem, ptr %blkCnt, align 4, !tbaa !8
106 br label %while.cond13
108 while.cond13: ; preds = %while.body16, %while.end
109 %9 = load i32, ptr %blkCnt, align 4, !tbaa !8
110 %cmp14 = icmp ugt i32 %9, 0
111 br i1 %cmp14, label %while.body16, label %while.end18
113 while.body16: ; preds = %while.cond13
114 %10 = load i8, ptr %value.addr, align 1, !tbaa !3
115 %11 = load ptr, ptr %pDst.addr, align 4, !tbaa !6
116 %incdec.ptr = getelementptr inbounds i8, ptr %11, i32 1
117 store ptr %incdec.ptr, ptr %pDst.addr, align 4, !tbaa !6
118 store i8 %10, ptr %11, align 1, !tbaa !3
119 %12 = load i32, ptr %blkCnt, align 4, !tbaa !8
120 %dec17 = add i32 %12, -1
121 store i32 %dec17, ptr %blkCnt, align 4, !tbaa !8
122 br label %while.cond13, !llvm.loop !12
124 while.end18: ; preds = %while.cond13
125 call void @llvm.lifetime.end.p0(i64 4, ptr %packedValue) #3
126 call void @llvm.lifetime.end.p0(i64 4, ptr %blkCnt) #3
127 ret void
128 }
130 ; Function Attrs: argmemonly nofree nosync nounwind willreturn
131 declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
133 ; Function Attrs: alwaysinline nounwind
134 define internal void @write_q7x4_ia(ptr %pQ7, i32 %value) #2 {
135 entry:
136 %pQ7.addr = alloca ptr, align 4
137 %value.addr = alloca i32, align 4
138 %val = alloca i32, align 4
139 store ptr %pQ7, ptr %pQ7.addr, align 4, !tbaa !6
140 store i32 %value, ptr %value.addr, align 4, !tbaa !8
141 call void @llvm.lifetime.start.p0(i64 4, ptr %val) #3
142 %0 = load i32, ptr %value.addr, align 4, !tbaa !8
143 store i32 %0, ptr %val, align 4, !tbaa !8
144 %1 = load i32, ptr %val, align 4, !tbaa !8
145 %and = and i32 %1, 255
146 %conv = trunc i32 %and to i8
147 %2 = load ptr, ptr %pQ7.addr, align 4, !tbaa !6
148 %3 = load ptr, ptr %2, align 4, !tbaa !6
149 store i8 %conv, ptr %3, align 1, !tbaa !3
150 %4 = load i32, ptr %val, align 4, !tbaa !8
151 %shr = ashr i32 %4, 8
152 %and1 = and i32 %shr, 255
153 %conv2 = trunc i32 %and1 to i8
154 %5 = load ptr, ptr %pQ7.addr, align 4, !tbaa !6
155 %6 = load ptr, ptr %5, align 4, !tbaa !6
156 %arrayidx3 = getelementptr inbounds i8, ptr %6, i32 1
157 store i8 %conv2, ptr %arrayidx3, align 1, !tbaa !3
158 %7 = load i32, ptr %val, align 4, !tbaa !8
159 %shr4 = ashr i32 %7, 16
160 %and5 = and i32 %shr4, 255
161 %conv6 = trunc i32 %and5 to i8
162 %8 = load ptr, ptr %pQ7.addr, align 4, !tbaa !6
163 %9 = load ptr, ptr %8, align 4, !tbaa !6
164 %arrayidx7 = getelementptr inbounds i8, ptr %9, i32 2
165 store i8 %conv6, ptr %arrayidx7, align 1, !tbaa !3
166 %10 = load i32, ptr %val, align 4, !tbaa !8
167 %shr8 = ashr i32 %10, 24
168 %and9 = and i32 %shr8, 255
169 %conv10 = trunc i32 %and9 to i8
170 %11 = load ptr, ptr %pQ7.addr, align 4, !tbaa !6
171 %12 = load ptr, ptr %11, align 4, !tbaa !6
172 %arrayidx11 = getelementptr inbounds i8, ptr %12, i32 3
173 store i8 %conv10, ptr %arrayidx11, align 1, !tbaa !3
174 %13 = load ptr, ptr %pQ7.addr, align 4, !tbaa !6
175 %14 = load ptr, ptr %13, align 4, !tbaa !6
176 %add.ptr = getelementptr inbounds i8, ptr %14, i32 4
177 store ptr %add.ptr, ptr %13, align 4, !tbaa !6
178 call void @llvm.lifetime.end.p0(i64 4, ptr %val) #3
179 ret void
180 }
182 ; Function Attrs: argmemonly nofree nosync nounwind willreturn
183 declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
185 attributes #0 = { nounwind "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m0plus" "target-features"="+armv6-m,+strict-align,+thumb-mode,-aes,-bf16,-cdecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-dotprod,-dsp,-fp16fml,-fullfp16,-hwdiv,-hwdiv-arm,-i8mm,-lob,-mve,-mve.fp,-ras,-sb,-sha2" "unsafe-fp-math"="false" "use-soft-float"="false" }
186 attributes #1 = { argmemonly nofree nosync nounwind willreturn }
187 attributes #2 = { alwaysinline nounwind "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m0plus" "target-features"="+armv6-m,+strict-align,+thumb-mode,-aes,-bf16,-cdecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-dotprod,-dsp,-fp16fml,-fullfp16,-hwdiv,-hwdiv-arm,-i8mm,-lob,-mve,-mve.fp,-ras,-sb,-sha2" "unsafe-fp-math"="false" "use-soft-float"="false" }
188 attributes #3 = { nounwind }
190 !llvm.module.flags = !{!0, !1}
191 !llvm.ident = !{!2}
193 !0 = !{i32 1, !"wchar_size", i32 4}
194 !1 = !{i32 1, !"min_enum_size", i32 4}
195 !2 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project.git 07f234be1ccbce131704f580aa3f117083a887f7)"}
196 !3 = !{!4, !4, i64 0}
197 !4 = !{!"omnipotent char", !5, i64 0}
198 !5 = !{!"Simple C/C++ TBAA"}
199 !6 = !{!7, !7, i64 0}
200 !7 = !{!"any pointer", !4, i64 0}
201 !8 = !{!9, !9, i64 0}
202 !9 = !{!"int", !4, i64 0}
203 !10 = distinct !{!10, !11}
204 !11 = !{!"llvm.loop.mustprogress"}
205 !12 = distinct !{!12, !11}