1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=SSE2 | FileCheck %s --check-prefixes=CHECK,SSE
3 ; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=AVX2 | FileCheck %s --check-prefixes=CHECK,AVX
5 declare void @use(float)
7 ; TODO: The insert is costed as free, so creating a shuffle appears to be a loss.
9 define <4 x float> @ext0_v4f32(<4 x float> %x, <4 x float> %y) {
10 ; CHECK-LABEL: @ext0_v4f32(
11 ; CHECK-NEXT: [[TMP1:%.*]] = fneg <4 x float> [[X:%.*]]
12 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 4, i32 1, i32 2, i32 3>
13 ; CHECK-NEXT: ret <4 x float> [[R]]
15 %e = extractelement <4 x float> %x, i32 0
17 %r = insertelement <4 x float> %y, float %n, i32 0
21 ; Eliminating extract/insert is profitable.
23 define <4 x float> @ext2_v4f32(<4 x float> %x, <4 x float> %y) {
24 ; CHECK-LABEL: @ext2_v4f32(
25 ; CHECK-NEXT: [[TMP1:%.*]] = fneg <4 x float> [[X:%.*]]
26 ; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x float> [[Y:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
27 ; CHECK-NEXT: ret <4 x float> [[R]]
29 %e = extractelement <4 x float> %x, i32 2
31 %r = insertelement <4 x float> %y, float %n, i32 2
35 ; Eliminating extract/insert is still profitable. Flags propagate.
37 define <2 x double> @ext1_v2f64(<2 x double> %x, <2 x double> %y) {
38 ; CHECK-LABEL: @ext1_v2f64(
39 ; CHECK-NEXT: [[TMP1:%.*]] = fneg nsz <2 x double> [[X:%.*]]
40 ; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x double> [[Y:%.*]], <2 x double> [[TMP1]], <2 x i32> <i32 0, i32 3>
41 ; CHECK-NEXT: ret <2 x double> [[R]]
43 %e = extractelement <2 x double> %x, i32 1
44 %n = fneg nsz double %e
45 %r = insertelement <2 x double> %y, double %n, i32 1
49 ; The vector fneg would cost twice as much as the scalar op with SSE,
50 ; so we don't transform there (the shuffle would also be more expensive).
52 define <8 x float> @ext7_v8f32(<8 x float> %x, <8 x float> %y) {
53 ; SSE-LABEL: @ext7_v8f32(
54 ; SSE-NEXT: [[E:%.*]] = extractelement <8 x float> [[X:%.*]], i32 7
55 ; SSE-NEXT: [[N:%.*]] = fneg float [[E]]
56 ; SSE-NEXT: [[R:%.*]] = insertelement <8 x float> [[Y:%.*]], float [[N]], i32 7
57 ; SSE-NEXT: ret <8 x float> [[R]]
59 ; AVX-LABEL: @ext7_v8f32(
60 ; AVX-NEXT: [[TMP1:%.*]] = fneg <8 x float> [[X:%.*]]
61 ; AVX-NEXT: [[R:%.*]] = shufflevector <8 x float> [[Y:%.*]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 15>
62 ; AVX-NEXT: ret <8 x float> [[R]]
64 %e = extractelement <8 x float> %x, i32 7
66 %r = insertelement <8 x float> %y, float %n, i32 7
70 ; Same as above with an extra use of the extracted element.
72 define <8 x float> @ext7_v8f32_use1(<8 x float> %x, <8 x float> %y) {
73 ; SSE-LABEL: @ext7_v8f32_use1(
74 ; SSE-NEXT: [[E:%.*]] = extractelement <8 x float> [[X:%.*]], i32 5
75 ; SSE-NEXT: call void @use(float [[E]])
76 ; SSE-NEXT: [[N:%.*]] = fneg float [[E]]
77 ; SSE-NEXT: [[R:%.*]] = insertelement <8 x float> [[Y:%.*]], float [[N]], i32 5
78 ; SSE-NEXT: ret <8 x float> [[R]]
80 ; AVX-LABEL: @ext7_v8f32_use1(
81 ; AVX-NEXT: [[E:%.*]] = extractelement <8 x float> [[X:%.*]], i32 5
82 ; AVX-NEXT: call void @use(float [[E]])
83 ; AVX-NEXT: [[TMP1:%.*]] = fneg <8 x float> [[X]]
84 ; AVX-NEXT: [[R:%.*]] = shufflevector <8 x float> [[Y:%.*]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 13, i32 6, i32 7>
85 ; AVX-NEXT: ret <8 x float> [[R]]
87 %e = extractelement <8 x float> %x, i32 5
88 call void @use(float %e)
90 %r = insertelement <8 x float> %y, float %n, i32 5
94 ; Negative test - the transform is likely not profitable if the fneg has another use.
96 define <8 x float> @ext7_v8f32_use2(<8 x float> %x, <8 x float> %y) {
97 ; CHECK-LABEL: @ext7_v8f32_use2(
98 ; CHECK-NEXT: [[E:%.*]] = extractelement <8 x float> [[X:%.*]], i32 3
99 ; CHECK-NEXT: [[N:%.*]] = fneg float [[E]]
100 ; CHECK-NEXT: call void @use(float [[N]])
101 ; CHECK-NEXT: [[R:%.*]] = insertelement <8 x float> [[Y:%.*]], float [[N]], i32 3
102 ; CHECK-NEXT: ret <8 x float> [[R]]
104 %e = extractelement <8 x float> %x, i32 3
106 call void @use(float %n)
107 %r = insertelement <8 x float> %y, float %n, i32 3
111 ; Negative test - can't convert variable index to a shuffle.
113 define <2 x double> @ext_index_var_v2f64(<2 x double> %x, <2 x double> %y, i32 %index) {
114 ; CHECK-LABEL: @ext_index_var_v2f64(
115 ; CHECK-NEXT: [[E:%.*]] = extractelement <2 x double> [[X:%.*]], i32 [[INDEX:%.*]]
116 ; CHECK-NEXT: [[N:%.*]] = fneg nsz double [[E]]
117 ; CHECK-NEXT: [[R:%.*]] = insertelement <2 x double> [[Y:%.*]], double [[N]], i32 [[INDEX]]
118 ; CHECK-NEXT: ret <2 x double> [[R]]
120 %e = extractelement <2 x double> %x, i32 %index
121 %n = fneg nsz double %e
122 %r = insertelement <2 x double> %y, double %n, i32 %index
126 ; Negative test - require same extract/insert index for simple shuffle.
127 ; TODO: We could handle this by adjusting the cost calculation.
129 define <2 x double> @ext1_v2f64_ins0(<2 x double> %x, <2 x double> %y) {
130 ; CHECK-LABEL: @ext1_v2f64_ins0(
131 ; CHECK-NEXT: [[E:%.*]] = extractelement <2 x double> [[X:%.*]], i32 1
132 ; CHECK-NEXT: [[N:%.*]] = fneg nsz double [[E]]
133 ; CHECK-NEXT: [[R:%.*]] = insertelement <2 x double> [[Y:%.*]], double [[N]], i32 0
134 ; CHECK-NEXT: ret <2 x double> [[R]]
136 %e = extractelement <2 x double> %x, i32 1
137 %n = fneg nsz double %e
138 %r = insertelement <2 x double> %y, double %n, i32 0
142 ; Negative test - avoid changing poison ops
144 define <4 x float> @ext12_v4f32(<4 x float> %x, <4 x float> %y) {
145 ; CHECK-LABEL: @ext12_v4f32(
146 ; CHECK-NEXT: [[E:%.*]] = extractelement <4 x float> [[X:%.*]], i32 12
147 ; CHECK-NEXT: [[N:%.*]] = fneg float [[E]]
148 ; CHECK-NEXT: [[R:%.*]] = insertelement <4 x float> [[Y:%.*]], float [[N]], i32 12
149 ; CHECK-NEXT: ret <4 x float> [[R]]
151 %e = extractelement <4 x float> %x, i32 12
153 %r = insertelement <4 x float> %y, float %n, i32 12
157 ; This used to crash because we assumed matching a true, unary fneg instruction.
159 define <2 x float> @ext1_v2f32_fsub(<2 x float> %x) {
160 ; CHECK-LABEL: @ext1_v2f32_fsub(
161 ; CHECK-NEXT: [[TMP1:%.*]] = fneg <2 x float> [[X:%.*]]
162 ; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[X]], <2 x float> [[TMP1]], <2 x i32> <i32 0, i32 3>
163 ; CHECK-NEXT: ret <2 x float> [[R]]
165 %e = extractelement <2 x float> %x, i32 1
166 %s = fsub float -0.0, %e
167 %r = insertelement <2 x float> %x, float %s, i32 1
171 ; This used to crash because we assumed matching a true, unary fneg instruction.
173 define <2 x float> @ext1_v2f32_fsub_fmf(<2 x float> %x, <2 x float> %y) {
174 ; CHECK-LABEL: @ext1_v2f32_fsub_fmf(
175 ; CHECK-NEXT: [[TMP1:%.*]] = fneg nnan nsz <2 x float> [[X:%.*]]
176 ; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[Y:%.*]], <2 x float> [[TMP1]], <2 x i32> <i32 0, i32 3>
177 ; CHECK-NEXT: ret <2 x float> [[R]]
179 %e = extractelement <2 x float> %x, i32 1
180 %s = fsub nsz nnan float 0.0, %e
181 %r = insertelement <2 x float> %y, float %s, i32 1