[X86][MC,LLD][NFC] Rename R_X86_64_REX2_GOTPCRELX (#116737)
[llvm-project.git] / llvm / test / MC / RISCV / rv32-supervisor-csr-names.s
blob4c1fef446a3d8681a98ea1003f4d8313fbd5f047
1 # RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
2 # RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
3 # RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
4 # RUN: | llvm-objdump -d - \
5 # RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
7 ##################################
8 # Supervisor Trap Setup
9 ##################################
11 # stimecmph
12 # name
13 # CHECK-INST: csrrs t1, stimecmph, zero
14 # CHECK-ENC: encoding: [0x73,0x23,0xd0,0x15]
15 # CHECK-INST-ALIAS: csrr t1, stimecmph
16 # uimm12
17 # CHECK-INST: csrrs t2, stimecmph, zero
18 # CHECK-ENC: encoding: [0xf3,0x23,0xd0,0x15]
19 # CHECK-INST-ALIAS: csrr t2, stimecmph
20 # name
21 csrrs t1, stimecmph, zero
22 # uimm12
23 csrrs t2, 0x15D, zero
25 #########################################
26 # Advanced Interrupt Architecture (Smaia and Ssaia)
27 #########################################
29 # sieh
30 # name
31 # CHECK-INST: csrrs t1, sieh, zero
32 # CHECK-ENC: encoding: [0x73,0x23,0x40,0x11]
33 # CHECK-INST-ALIAS: csrr t1, sieh
34 # uimm12
35 # CHECK-INST: csrrs t2, sieh, zero
36 # CHECK-ENC: encoding: [0xf3,0x23,0x40,0x11]
37 # CHECK-INST-ALIAS: csrr t2, sieh
38 # name
39 csrrs t1, sieh, zero
40 # uimm12
41 csrrs t2, 0x114, zero
43 # siph
44 # name
45 # CHECK-INST: csrrs t1, siph, zero
46 # CHECK-ENC: encoding: [0x73,0x23,0x40,0x15]
47 # CHECK-INST-ALIAS: csrr t1, siph
48 # uimm12
49 # CHECK-INST: csrrs t2, siph, zero
50 # CHECK-ENC: encoding: [0xf3,0x23,0x40,0x15]
51 # CHECK-INST-ALIAS: csrr t2, siph
52 # name
53 csrrs t1, siph, zero
54 # uimm12
55 csrrs t2, 0x154, zero