llvm/test/MC/RISCV/rvzfinx-aliases-valid.s

   1 # RUN: llvm-mc %s -triple=riscv32 -mattr=+zfinx -riscv-no-aliases \
   2 # RUN:     | FileCheck -check-prefix=CHECK-INST %s
   3 # RUN: llvm-mc %s -triple=riscv32 -mattr=+zfinx \
   4 # RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
   5 # RUN: llvm-mc %s -triple=riscv64 -mattr=+zfinx -riscv-no-aliases \
   6 # RUN:     | FileCheck -check-prefix=CHECK-INST %s
   7 # RUN: llvm-mc %s -triple=riscv64 -mattr=+zfinx \
   8 # RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
   9 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfinx %s \
  10 # RUN:     | llvm-objdump --no-print-imm-hex -d --mattr=+zfinx -M no-aliases - \
  11 # RUN:     | FileCheck -check-prefix=CHECK-INST %s
  12 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zfinx %s \
  13 # RUN:     | llvm-objdump --no-print-imm-hex -d --mattr=+zfinx - \
  14 # RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
  15 # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfinx %s \
  16 # RUN:     | llvm-objdump --no-print-imm-hex -d --mattr=+zfinx -M no-aliases - \
  17 # RUN:     | FileCheck -check-prefix=CHECK-INST %s
  18 # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zfinx %s \
  19 # RUN:     | llvm-objdump --no-print-imm-hex -d --mattr=+zfinx - \
  20 # RUN:     | FileCheck -check-prefix=CHECK-ALIAS %s
  21
  22 ##===----------------------------------------------------------------------===##
  23 ## Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)
  24 ##===----------------------------------------------------------------------===##
  25
  26 # CHECK-INST: fsgnj.s s1, s2, s2
  27 # CHECK-ALIAS: fmv.s s1, s2
  28 fmv.s s1, s2
  29 # CHECK-INST: fsgnjx.s s1, s2, s2
  30 # CHECK-ALIAS: fabs.s s1, s2
  31 fabs.s s1, s2
  32 # CHECK-INST: fsgnjn.s s2, s3, s3
  33 # CHECK-ALIAS: fneg.s s2, s3
  34 fneg.s s2, s3
  35
  36 # CHECK-INST: flt.s tp, s6, s5
  37 # CHECK-ALIAS: flt.s tp, s6, s5
  38 fgt.s x4, s5, s6
  39 # CHECK-INST: fle.s t2, s1, s0
  40 # CHECK-ALIAS: fle.s t2, s1, s0
  41 fge.s x7, x8, x9
  42
  43 # The following instructions actually alias instructions from the base ISA.
  44 # However, it only makes sense to support them when the F or Zfinx extension is
  45 # enabled.
  46 # CHECK-INST: csrrs t0, fcsr, zero
  47 # CHECK-ALIAS: frcsr t0
  48 frcsr x5
  49 # CHECK-INST: csrrw t1, fcsr, t2
  50 # CHECK-ALIAS: fscsr t1, t2
  51 fscsr x6, x7
  52 # CHECK-INST: csrrw  zero, fcsr, t3
  53 # CHECK-ALIAS: fscsr t3
  54 fscsr x28
  55
  56 # These are obsolete aliases of frcsr/fscsr. They are accepted by the assembler
  57 # but the disassembler should always print them as the equivalent, new aliases.
  58 # CHECK-INST: csrrs t4, fcsr, zero
  59 # CHECK-ALIAS: frcsr t4
  60 frsr x29
  61 # CHECK-INST: csrrw t5, fcsr, t6
  62 # CHECK-ALIAS: fscsr t5, t6
  63 fssr x30, x31
  64 # CHECK-INST: csrrw zero, fcsr, s0
  65 # CHECK-ALIAS: fscsr s0
  66 fssr x8
  67
  68 # CHECK-INST: csrrs t4, frm, zero
  69 # CHECK-ALIAS: frrm t4
  70 frrm x29
  71 # CHECK-INST: csrrw  t5, frm, t4
  72 # CHECK-ALIAS: fsrm t5, t4
  73 fsrm x30, x29
  74 # CHECK-INST: csrrw  zero, frm, t6
  75 # CHECK-ALIAS: fsrm t6
  76 fsrm x31
  77 # CHECK-INST: csrrwi a0, frm, 31
  78 # CHECK-ALIAS: fsrmi a0, 31
  79 fsrmi x10, 0x1f
  80 # CHECK-INST: csrrwi  zero, frm, 30
  81 # CHECK-ALIAS: fsrmi 30
  82 fsrmi 0x1e
  83
  84 # CHECK-INST: csrrs a1, fflags, zero
  85 # CHECK-ALIAS: frflags a1
  86 frflags x11
  87 # CHECK-INST: csrrw a2, fflags, a1
  88 # CHECK-ALIAS: fsflags a2, a1
  89 fsflags x12, x11
  90 # CHECK-INST: csrrw zero, fflags, a3
  91 # CHECK-ALIAS: fsflags a3
  92 fsflags x13
  93 # CHECK-INST: csrrwi a4, fflags, 29
  94 # CHECK-ALIAS: fsflagsi a4, 29
  95 fsflagsi x14, 0x1d
  96 # CHECK-INST: csrrwi zero, fflags, 28
  97 # CHECK-ALIAS: fsflagsi 28
  98 fsflagsi 0x1c
  99
 100 ##===----------------------------------------------------------------------===##
 101 ## Aliases which omit the rounding mode.
 102 ##===----------------------------------------------------------------------===##
 103
 104 # CHECK-INST: fmadd.s a0, a1, a2, a3, dyn
 105 # CHECK-ALIAS: fmadd.s a0, a1, a2, a3
 106 fmadd.s x10, x11, x12, x13
 107 # CHECK-INST: fmsub.s a4, a5, a6, a7, dyn
 108 # CHECK-ALIAS: fmsub.s a4, a5, a6, a7
 109 fmsub.s x14, x15, x16, x17
 110 # CHECK-INST: fnmsub.s s2, s3, s4, s5, dyn
 111 # CHECK-ALIAS: fnmsub.s s2, s3, s4, s5
 112 fnmsub.s x18, x19, x20, x21
 113 # CHECK-INST: fnmadd.s s6, s7, s8, s9, dyn
 114 # CHECK-ALIAS: fnmadd.s s6, s7, s8, s9
 115 fnmadd.s x22, x23, x24, x25
 116 # CHECK-INST: fadd.s s10, s11, t3, dyn
 117 # CHECK-ALIAS: fadd.s s10, s11, t3
 118 fadd.s x26, x27, x28
 119 # CHECK-INST: fsub.s t4, t5, t6, dyn
 120 # CHECK-ALIAS: fsub.s t4, t5, t6
 121 fsub.s x29, x30, x31
 122 # CHECK-INST: fmul.s s0, s1, s2, dyn
 123 # CHECK-ALIAS: fmul.s s0, s1, s2
 124 fmul.s s0, s1, s2
 125 # CHECK-INST: fdiv.s s3, s4, s5, dyn
 126 # CHECK-ALIAS: fdiv.s s3, s4, s5
 127 fdiv.s s3, s4, s5
 128 # CHECK-INST: sqrt.s s6, s7, dyn
 129 # CHECK-ALIAS: sqrt.s s6, s7
 130 fsqrt.s s6, s7
 131 # CHECK-INST: fcvt.w.s a0, s5, dyn
 132 # CHECK-ALIAS: fcvt.w.s a0, s5
 133 fcvt.w.s a0, s5
 134 # CHECK-INST: fcvt.wu.s a1, s6, dyn
 135 # CHECK-ALIAS: fcvt.wu.s a1, s6
 136 fcvt.wu.s a1, s6
 137 # CHECK-INST: fcvt.s.w t6, a4, dyn
 138 # CHECK-ALIAS: fcvt.s.w t6, a4
 139 fcvt.s.w t6, a4
 140 # CHECK-INST: fcvt.s.wu s0, a5, dyn
 141 # CHECK-ALIAS: fcvt.s.wu s0, a5
 142 fcvt.s.wu s0, a5