[ORC] Add std::tuple support to SimplePackedSerialization.
[llvm-project.git] / llvm / lib / CodeGen / MachineSSAUpdater.cpp
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1 //===- MachineSSAUpdater.cpp - Unstructured SSA Update Tool ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the MachineSSAUpdater class. It's based on SSAUpdater
10 // class in lib/Transforms/Utils.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineSSAUpdater.h"
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/ADT/SmallVector.h"
17 #include "llvm/CodeGen/MachineBasicBlock.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineOperand.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/TargetInstrInfo.h"
24 #include "llvm/CodeGen/TargetOpcodes.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/IR/DebugLoc.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/Transforms/Utils/SSAUpdaterImpl.h"
31 #include <utility>
33 using namespace llvm;
35 #define DEBUG_TYPE "machine-ssaupdater"
37 using AvailableValsTy = DenseMap<MachineBasicBlock *, Register>;
39 static AvailableValsTy &getAvailableVals(void *AV) {
40 return *static_cast<AvailableValsTy*>(AV);
43 MachineSSAUpdater::MachineSSAUpdater(MachineFunction &MF,
44 SmallVectorImpl<MachineInstr*> *NewPHI)
45 : InsertedPHIs(NewPHI), TII(MF.getSubtarget().getInstrInfo()),
46 MRI(&MF.getRegInfo()) {}
48 MachineSSAUpdater::~MachineSSAUpdater() {
49 delete static_cast<AvailableValsTy*>(AV);
52 /// Initialize - Reset this object to get ready for a new set of SSA
53 /// updates.
54 void MachineSSAUpdater::Initialize(const TargetRegisterClass *RC) {
55 if (!AV)
56 AV = new AvailableValsTy();
57 else
58 getAvailableVals(AV).clear();
60 VRC = RC;
63 void MachineSSAUpdater::Initialize(Register V) {
64 Initialize(MRI->getRegClass(V));
67 /// HasValueForBlock - Return true if the MachineSSAUpdater already has a value for
68 /// the specified block.
69 bool MachineSSAUpdater::HasValueForBlock(MachineBasicBlock *BB) const {
70 return getAvailableVals(AV).count(BB);
73 /// AddAvailableValue - Indicate that a rewritten value is available in the
74 /// specified block with the specified value.
75 void MachineSSAUpdater::AddAvailableValue(MachineBasicBlock *BB, Register V) {
76 getAvailableVals(AV)[BB] = V;
79 /// GetValueAtEndOfBlock - Construct SSA form, materializing a value that is
80 /// live at the end of the specified block.
81 Register MachineSSAUpdater::GetValueAtEndOfBlock(MachineBasicBlock *BB) {
82 return GetValueAtEndOfBlockInternal(BB);
85 static
86 Register LookForIdenticalPHI(MachineBasicBlock *BB,
87 SmallVectorImpl<std::pair<MachineBasicBlock *, Register>> &PredValues) {
88 if (BB->empty())
89 return Register();
91 MachineBasicBlock::iterator I = BB->begin();
92 if (!I->isPHI())
93 return Register();
95 AvailableValsTy AVals;
96 for (unsigned i = 0, e = PredValues.size(); i != e; ++i)
97 AVals[PredValues[i].first] = PredValues[i].second;
98 while (I != BB->end() && I->isPHI()) {
99 bool Same = true;
100 for (unsigned i = 1, e = I->getNumOperands(); i != e; i += 2) {
101 Register SrcReg = I->getOperand(i).getReg();
102 MachineBasicBlock *SrcBB = I->getOperand(i+1).getMBB();
103 if (AVals[SrcBB] != SrcReg) {
104 Same = false;
105 break;
108 if (Same)
109 return I->getOperand(0).getReg();
110 ++I;
112 return Register();
115 /// InsertNewDef - Insert an empty PHI or IMPLICIT_DEF instruction which define
116 /// a value of the given register class at the start of the specified basic
117 /// block. It returns the virtual register defined by the instruction.
118 static
119 MachineInstrBuilder InsertNewDef(unsigned Opcode,
120 MachineBasicBlock *BB, MachineBasicBlock::iterator I,
121 const TargetRegisterClass *RC,
122 MachineRegisterInfo *MRI,
123 const TargetInstrInfo *TII) {
124 Register NewVR = MRI->createVirtualRegister(RC);
125 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR);
128 /// GetValueInMiddleOfBlock - Construct SSA form, materializing a value that
129 /// is live in the middle of the specified block.
131 /// GetValueInMiddleOfBlock is the same as GetValueAtEndOfBlock except in one
132 /// important case: if there is a definition of the rewritten value after the
133 /// 'use' in BB. Consider code like this:
135 /// X1 = ...
136 /// SomeBB:
137 /// use(X)
138 /// X2 = ...
139 /// br Cond, SomeBB, OutBB
141 /// In this case, there are two values (X1 and X2) added to the AvailableVals
142 /// set by the client of the rewriter, and those values are both live out of
143 /// their respective blocks. However, the use of X happens in the *middle* of
144 /// a block. Because of this, we need to insert a new PHI node in SomeBB to
145 /// merge the appropriate values, and this value isn't live out of the block.
146 Register MachineSSAUpdater::GetValueInMiddleOfBlock(MachineBasicBlock *BB) {
147 // If there is no definition of the renamed variable in this block, just use
148 // GetValueAtEndOfBlock to do our work.
149 if (!HasValueForBlock(BB))
150 return GetValueAtEndOfBlockInternal(BB);
152 // If there are no predecessors, just return undef.
153 if (BB->pred_empty()) {
154 // Insert an implicit_def to represent an undef value.
155 MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
156 BB, BB->getFirstTerminator(),
157 VRC, MRI, TII);
158 return NewDef->getOperand(0).getReg();
161 // Otherwise, we have the hard case. Get the live-in values for each
162 // predecessor.
163 SmallVector<std::pair<MachineBasicBlock*, Register>, 8> PredValues;
164 Register SingularValue;
166 bool isFirstPred = true;
167 for (MachineBasicBlock *PredBB : BB->predecessors()) {
168 Register PredVal = GetValueAtEndOfBlockInternal(PredBB);
169 PredValues.push_back(std::make_pair(PredBB, PredVal));
171 // Compute SingularValue.
172 if (isFirstPred) {
173 SingularValue = PredVal;
174 isFirstPred = false;
175 } else if (PredVal != SingularValue)
176 SingularValue = Register();
179 // Otherwise, if all the merged values are the same, just use it.
180 if (SingularValue)
181 return SingularValue;
183 // If an identical PHI is already in BB, just reuse it.
184 Register DupPHI = LookForIdenticalPHI(BB, PredValues);
185 if (DupPHI)
186 return DupPHI;
188 // Otherwise, we do need a PHI: insert one now.
189 MachineBasicBlock::iterator Loc = BB->empty() ? BB->end() : BB->begin();
190 MachineInstrBuilder InsertedPHI = InsertNewDef(TargetOpcode::PHI, BB,
191 Loc, VRC, MRI, TII);
193 // Fill in all the predecessors of the PHI.
194 for (unsigned i = 0, e = PredValues.size(); i != e; ++i)
195 InsertedPHI.addReg(PredValues[i].second).addMBB(PredValues[i].first);
197 // See if the PHI node can be merged to a single value. This can happen in
198 // loop cases when we get a PHI of itself and one other value.
199 if (unsigned ConstVal = InsertedPHI->isConstantValuePHI()) {
200 InsertedPHI->eraseFromParent();
201 return ConstVal;
204 // If the client wants to know about all new instructions, tell it.
205 if (InsertedPHIs) InsertedPHIs->push_back(InsertedPHI);
207 LLVM_DEBUG(dbgs() << " Inserted PHI: " << *InsertedPHI << "\n");
208 return InsertedPHI.getReg(0);
211 static
212 MachineBasicBlock *findCorrespondingPred(const MachineInstr *MI,
213 MachineOperand *U) {
214 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
215 if (&MI->getOperand(i) == U)
216 return MI->getOperand(i+1).getMBB();
219 llvm_unreachable("MachineOperand::getParent() failure?");
222 /// RewriteUse - Rewrite a use of the symbolic value. This handles PHI nodes,
223 /// which use their value in the corresponding predecessor.
224 void MachineSSAUpdater::RewriteUse(MachineOperand &U) {
225 MachineInstr *UseMI = U.getParent();
226 Register NewVR;
227 if (UseMI->isPHI()) {
228 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
229 NewVR = GetValueAtEndOfBlockInternal(SourceBB);
230 } else {
231 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
234 U.setReg(NewVR);
237 namespace llvm {
239 /// SSAUpdaterTraits<MachineSSAUpdater> - Traits for the SSAUpdaterImpl
240 /// template, specialized for MachineSSAUpdater.
241 template<>
242 class SSAUpdaterTraits<MachineSSAUpdater> {
243 public:
244 using BlkT = MachineBasicBlock;
245 using ValT = Register;
246 using PhiT = MachineInstr;
247 using BlkSucc_iterator = MachineBasicBlock::succ_iterator;
249 static BlkSucc_iterator BlkSucc_begin(BlkT *BB) { return BB->succ_begin(); }
250 static BlkSucc_iterator BlkSucc_end(BlkT *BB) { return BB->succ_end(); }
252 /// Iterator for PHI operands.
253 class PHI_iterator {
254 private:
255 MachineInstr *PHI;
256 unsigned idx;
258 public:
259 explicit PHI_iterator(MachineInstr *P) // begin iterator
260 : PHI(P), idx(1) {}
261 PHI_iterator(MachineInstr *P, bool) // end iterator
262 : PHI(P), idx(PHI->getNumOperands()) {}
264 PHI_iterator &operator++() { idx += 2; return *this; }
265 bool operator==(const PHI_iterator& x) const { return idx == x.idx; }
266 bool operator!=(const PHI_iterator& x) const { return !operator==(x); }
268 unsigned getIncomingValue() { return PHI->getOperand(idx).getReg(); }
270 MachineBasicBlock *getIncomingBlock() {
271 return PHI->getOperand(idx+1).getMBB();
275 static inline PHI_iterator PHI_begin(PhiT *PHI) { return PHI_iterator(PHI); }
277 static inline PHI_iterator PHI_end(PhiT *PHI) {
278 return PHI_iterator(PHI, true);
281 /// FindPredecessorBlocks - Put the predecessors of BB into the Preds
282 /// vector.
283 static void FindPredecessorBlocks(MachineBasicBlock *BB,
284 SmallVectorImpl<MachineBasicBlock*> *Preds){
285 append_range(*Preds, BB->predecessors());
288 /// GetUndefVal - Create an IMPLICIT_DEF instruction with a new register.
289 /// Add it into the specified block and return the register.
290 static Register GetUndefVal(MachineBasicBlock *BB,
291 MachineSSAUpdater *Updater) {
292 // Insert an implicit_def to represent an undef value.
293 MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
294 BB, BB->getFirstNonPHI(),
295 Updater->VRC, Updater->MRI,
296 Updater->TII);
297 return NewDef->getOperand(0).getReg();
300 /// CreateEmptyPHI - Create a PHI instruction that defines a new register.
301 /// Add it into the specified block and return the register.
302 static Register CreateEmptyPHI(MachineBasicBlock *BB, unsigned NumPreds,
303 MachineSSAUpdater *Updater) {
304 MachineBasicBlock::iterator Loc = BB->empty() ? BB->end() : BB->begin();
305 MachineInstr *PHI = InsertNewDef(TargetOpcode::PHI, BB, Loc,
306 Updater->VRC, Updater->MRI,
307 Updater->TII);
308 return PHI->getOperand(0).getReg();
311 /// AddPHIOperand - Add the specified value as an operand of the PHI for
312 /// the specified predecessor block.
313 static void AddPHIOperand(MachineInstr *PHI, Register Val,
314 MachineBasicBlock *Pred) {
315 MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred);
318 /// InstrIsPHI - Check if an instruction is a PHI.
319 static MachineInstr *InstrIsPHI(MachineInstr *I) {
320 if (I && I->isPHI())
321 return I;
322 return nullptr;
325 /// ValueIsPHI - Check if the instruction that defines the specified register
326 /// is a PHI instruction.
327 static MachineInstr *ValueIsPHI(Register Val, MachineSSAUpdater *Updater) {
328 return InstrIsPHI(Updater->MRI->getVRegDef(Val));
331 /// ValueIsNewPHI - Like ValueIsPHI but also check if the PHI has no source
332 /// operands, i.e., it was just added.
333 static MachineInstr *ValueIsNewPHI(Register Val, MachineSSAUpdater *Updater) {
334 MachineInstr *PHI = ValueIsPHI(Val, Updater);
335 if (PHI && PHI->getNumOperands() <= 1)
336 return PHI;
337 return nullptr;
340 /// GetPHIValue - For the specified PHI instruction, return the register
341 /// that it defines.
342 static Register GetPHIValue(MachineInstr *PHI) {
343 return PHI->getOperand(0).getReg();
347 } // end namespace llvm
349 /// GetValueAtEndOfBlockInternal - Check to see if AvailableVals has an entry
350 /// for the specified BB and if so, return it. If not, construct SSA form by
351 /// first calculating the required placement of PHIs and then inserting new
352 /// PHIs where needed.
353 Register MachineSSAUpdater::GetValueAtEndOfBlockInternal(MachineBasicBlock *BB){
354 AvailableValsTy &AvailableVals = getAvailableVals(AV);
355 if (Register V = AvailableVals[BB])
356 return V;
358 SSAUpdaterImpl<MachineSSAUpdater> Impl(this, &AvailableVals, InsertedPHIs);
359 return Impl.GetValue(BB);