llvm/lib/Support/AArch64TargetParser.cpp

   1 //===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements a target parser to recognise AArch64 hardware features
  10 // such as FPU/CPU/ARCH and extension names.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Support/AArch64TargetParser.h"
  15 #include "llvm/ADT/StringSwitch.h"
  16 #include "llvm/ADT/Triple.h"
  17 #include <cctype>
  18
  19 using namespace llvm;
  20
  21 static unsigned checkArchVersion(llvm::StringRef Arch) {
  22   if (Arch.size() >= 2 && Arch[0] == 'v' && std::isdigit(Arch[1]))
  23     return (Arch[1] - 48);
  24   return 0;
  25 }
  26
  27 unsigned AArch64::getDefaultFPU(StringRef CPU, AArch64::ArchKind AK) {
  28   if (CPU == "generic")
  29     return AArch64ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
  30
  31   return StringSwitch<unsigned>(CPU)
  32 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)       \
  33   .Case(NAME, ARM::DEFAULT_FPU)
  34 #include "../../include/llvm/Support/AArch64TargetParser.def"
  35   .Default(ARM::FK_INVALID);
  36 }
  37
  38 uint64_t AArch64::getDefaultExtensions(StringRef CPU, AArch64::ArchKind AK) {
  39   if (CPU == "generic")
  40     return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
  41
  42   return StringSwitch<uint64_t>(CPU)
  43 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)       \
  44   .Case(NAME, AArch64ARCHNames[static_cast<unsigned>(ArchKind::ID)]            \
  45                       .ArchBaseExtensions |                                    \
  46                   DEFAULT_EXT)
  47 #include "../../include/llvm/Support/AArch64TargetParser.def"
  48   .Default(AArch64::AEK_INVALID);
  49 }
  50
  51 AArch64::ArchKind AArch64::getCPUArchKind(StringRef CPU) {
  52   if (CPU == "generic")
  53     return ArchKind::ARMV8A;
  54
  55   return StringSwitch<AArch64::ArchKind>(CPU)
  56 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)       \
  57   .Case(NAME, ArchKind::ID)
  58 #include "../../include/llvm/Support/AArch64TargetParser.def"
  59   .Default(ArchKind::INVALID);
  60 }
  61
  62 bool AArch64::getExtensionFeatures(uint64_t Extensions,
  63                                    std::vector<StringRef> &Features) {
  64   if (Extensions == AArch64::AEK_INVALID)
  65     return false;
  66
  67   if (Extensions & AEK_FP)
  68     Features.push_back("+fp-armv8");
  69   if (Extensions & AEK_SIMD)
  70     Features.push_back("+neon");
  71   if (Extensions & AEK_CRC)
  72     Features.push_back("+crc");
  73   if (Extensions & AEK_CRYPTO)
  74     Features.push_back("+crypto");
  75   if (Extensions & AEK_DOTPROD)
  76     Features.push_back("+dotprod");
  77   if (Extensions & AEK_FP16FML)
  78     Features.push_back("+fp16fml");
  79   if (Extensions & AEK_FP16)
  80     Features.push_back("+fullfp16");
  81   if (Extensions & AEK_PROFILE)
  82     Features.push_back("+spe");
  83   if (Extensions & AEK_RAS)
  84     Features.push_back("+ras");
  85   if (Extensions & AEK_LSE)
  86     Features.push_back("+lse");
  87   if (Extensions & AEK_RDM)
  88     Features.push_back("+rdm");
  89   if (Extensions & AEK_SVE)
  90     Features.push_back("+sve");
  91   if (Extensions & AEK_SVE2)
  92     Features.push_back("+sve2");
  93   if (Extensions & AEK_SVE2AES)
  94     Features.push_back("+sve2-aes");
  95   if (Extensions & AEK_SVE2SM4)
  96     Features.push_back("+sve2-sm4");
  97   if (Extensions & AEK_SVE2SHA3)
  98     Features.push_back("+sve2-sha3");
  99   if (Extensions & AEK_SVE2BITPERM)
 100     Features.push_back("+sve2-bitperm");
 101   if (Extensions & AEK_RCPC)
 102     Features.push_back("+rcpc");
 103   if (Extensions & AEK_BRBE)
 104     Features.push_back("+brbe");
 105   if (Extensions & AEK_PAUTH)
 106     Features.push_back("+pauth");
 107   if (Extensions & AEK_FLAGM)
 108     Features.push_back("+flagm");
 109   if (Extensions & AArch64::AEK_SME)
 110     Features.push_back("+sme");
 111   if (Extensions & AArch64::AEK_SMEF64)
 112     Features.push_back("+sme-f64");
 113   if (Extensions & AArch64::AEK_SMEI64)
 114     Features.push_back("+sme-i64");
 115
 116   return true;
 117 }
 118
 119 bool AArch64::getArchFeatures(AArch64::ArchKind AK,
 120                               std::vector<StringRef> &Features) {
 121   if (AK == ArchKind::ARMV8_1A)
 122     Features.push_back("+v8.1a");
 123   if (AK == ArchKind::ARMV8_2A)
 124     Features.push_back("+v8.2a");
 125   if (AK == ArchKind::ARMV8_3A)
 126     Features.push_back("+v8.3a");
 127   if (AK == ArchKind::ARMV8_4A)
 128     Features.push_back("+v8.4a");
 129   if (AK == ArchKind::ARMV8_5A)
 130     Features.push_back("+v8.5a");
 131   if (AK == AArch64::ArchKind::ARMV8_6A)
 132     Features.push_back("+v8.6a");
 133   if (AK == AArch64::ArchKind::ARMV8_7A)
 134     Features.push_back("+v8.7a");
 135   if(AK == AArch64::ArchKind::ARMV8R)
 136     Features.push_back("+v8r");
 137
 138   return AK != ArchKind::INVALID;
 139 }
 140
 141 StringRef AArch64::getArchName(AArch64::ArchKind AK) {
 142   return AArch64ARCHNames[static_cast<unsigned>(AK)].getName();
 143 }
 144
 145 StringRef AArch64::getCPUAttr(AArch64::ArchKind AK) {
 146   return AArch64ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
 147 }
 148
 149 StringRef AArch64::getSubArch(AArch64::ArchKind AK) {
 150   return AArch64ARCHNames[static_cast<unsigned>(AK)].getSubArch();
 151 }
 152
 153 unsigned AArch64::getArchAttr(AArch64::ArchKind AK) {
 154   return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
 155 }
 156
 157 StringRef AArch64::getArchExtName(unsigned ArchExtKind) {
 158   for (const auto &AE : AArch64ARCHExtNames)
 159     if (ArchExtKind == AE.ID)
 160       return AE.getName();
 161   return StringRef();
 162 }
 163
 164 StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
 165   if (ArchExt.startswith("no")) {
 166     StringRef ArchExtBase(ArchExt.substr(2));
 167     for (const auto &AE : AArch64ARCHExtNames) {
 168       if (AE.NegFeature && ArchExtBase == AE.getName())
 169         return StringRef(AE.NegFeature);
 170     }
 171   }
 172
 173   for (const auto &AE : AArch64ARCHExtNames)
 174     if (AE.Feature && ArchExt == AE.getName())
 175       return StringRef(AE.Feature);
 176   return StringRef();
 177 }
 178
 179 StringRef AArch64::getDefaultCPU(StringRef Arch) {
 180   ArchKind AK = parseArch(Arch);
 181   if (AK == ArchKind::INVALID)
 182     return StringRef();
 183
 184   // Look for multiple AKs to find the default for pair AK+Name.
 185   for (const auto &CPU : AArch64CPUNames)
 186     if (CPU.ArchID == AK && CPU.Default)
 187       return CPU.getName();
 188
 189   // If we can't find a default then target the architecture instead
 190   return "generic";
 191 }
 192
 193 void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
 194   for (const auto &Arch : AArch64CPUNames) {
 195     if (Arch.ArchID != ArchKind::INVALID)
 196       Values.push_back(Arch.getName());
 197   }
 198 }
 199
 200 bool AArch64::isX18ReservedByDefault(const Triple &TT) {
 201   return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
 202          TT.isOSWindows();
 203 }
 204
 205 // Allows partial match, ex. "v8a" matches "armv8a".
 206 AArch64::ArchKind AArch64::parseArch(StringRef Arch) {
 207   Arch = ARM::getCanonicalArchName(Arch);
 208   if (checkArchVersion(Arch) < 8)
 209     return ArchKind::INVALID;
 210
 211   StringRef Syn = ARM::getArchSynonym(Arch);
 212   for (const auto &A : AArch64ARCHNames) {
 213     if (A.getName().endswith(Syn))
 214       return A.ID;
 215   }
 216   return ArchKind::INVALID;
 217 }
 218
 219 AArch64::ArchExtKind AArch64::parseArchExt(StringRef ArchExt) {
 220   for (const auto &A : AArch64ARCHExtNames) {
 221     if (ArchExt == A.getName())
 222       return static_cast<ArchExtKind>(A.ID);
 223   }
 224   return AArch64::AEK_INVALID;
 225 }
 226
 227 AArch64::ArchKind AArch64::parseCPUArch(StringRef CPU) {
 228   for (const auto &C : AArch64CPUNames) {
 229     if (CPU == C.getName())
 230       return C.ArchID;
 231   }
 232   return ArchKind::INVALID;
 233 }
 234
 235 // Parse a branch protection specification, which has the form
 236 //   standard | none | [bti,pac-ret[+b-key,+leaf]*]
 237 // Returns true on success, with individual elements of the specification
 238 // returned in `PBP`. Returns false in error, with `Err` containing
 239 // an erroneous part of the spec.
 240 bool AArch64::parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP,
 241                                     StringRef &Err) {
 242   PBP = {"none", "a_key", false};
 243   if (Spec == "none")
 244     return true; // defaults are ok
 245
 246   if (Spec == "standard") {
 247     PBP.Scope = "non-leaf";
 248     PBP.BranchTargetEnforcement = true;
 249     return true;
 250   }
 251
 252   SmallVector<StringRef, 4> Opts;
 253   Spec.split(Opts, "+");
 254   for (int I = 0, E = Opts.size(); I != E; ++I) {
 255     StringRef Opt = Opts[I].trim();
 256     if (Opt == "bti") {
 257       PBP.BranchTargetEnforcement = true;
 258       continue;
 259     }
 260     if (Opt == "pac-ret") {
 261       PBP.Scope = "non-leaf";
 262       for (; I + 1 != E; ++I) {
 263         StringRef PACOpt = Opts[I + 1].trim();
 264         if (PACOpt == "leaf")
 265           PBP.Scope = "all";
 266         else if (PACOpt == "b-key")
 267           PBP.Key = "b_key";
 268         else
 269           break;
 270       }
 271       continue;
 272     }
 273     if (Opt == "")
 274       Err = "<empty>";
 275     else
 276       Err = Opt;
 277     return false;
 278   }
 279
 280   return true;
 281 }