llvm/lib/Support/ARMTargetParser.cpp

   1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements a target parser to recognise ARM hardware features
  10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Support/ARMTargetParser.h"
  15 #include "llvm/ADT/StringSwitch.h"
  16 #include "llvm/ADT/Triple.h"
  17 #include <cctype>
  18
  19 using namespace llvm;
  20
  21 static StringRef getHWDivSynonym(StringRef HWDiv) {
  22   return StringSwitch<StringRef>(HWDiv)
  23       .Case("thumb,arm", "arm,thumb")
  24       .Default(HWDiv);
  25 }
  26
  27 // Allows partial match, ex. "v7a" matches "armv7a".
  28 ARM::ArchKind ARM::parseArch(StringRef Arch) {
  29   Arch = getCanonicalArchName(Arch);
  30   StringRef Syn = getArchSynonym(Arch);
  31   for (const auto &A : ARCHNames) {
  32     if (A.getName().endswith(Syn))
  33       return A.ID;
  34   }
  35   return ArchKind::INVALID;
  36 }
  37
  38 // Version number (ex. v7 = 7).
  39 unsigned ARM::parseArchVersion(StringRef Arch) {
  40   Arch = getCanonicalArchName(Arch);
  41   switch (parseArch(Arch)) {
  42   case ArchKind::ARMV2:
  43   case ArchKind::ARMV2A:
  44     return 2;
  45   case ArchKind::ARMV3:
  46   case ArchKind::ARMV3M:
  47     return 3;
  48   case ArchKind::ARMV4:
  49   case ArchKind::ARMV4T:
  50     return 4;
  51   case ArchKind::ARMV5T:
  52   case ArchKind::ARMV5TE:
  53   case ArchKind::IWMMXT:
  54   case ArchKind::IWMMXT2:
  55   case ArchKind::XSCALE:
  56   case ArchKind::ARMV5TEJ:
  57     return 5;
  58   case ArchKind::ARMV6:
  59   case ArchKind::ARMV6K:
  60   case ArchKind::ARMV6T2:
  61   case ArchKind::ARMV6KZ:
  62   case ArchKind::ARMV6M:
  63     return 6;
  64   case ArchKind::ARMV7A:
  65   case ArchKind::ARMV7VE:
  66   case ArchKind::ARMV7R:
  67   case ArchKind::ARMV7M:
  68   case ArchKind::ARMV7S:
  69   case ArchKind::ARMV7EM:
  70   case ArchKind::ARMV7K:
  71     return 7;
  72   case ArchKind::ARMV8A:
  73   case ArchKind::ARMV8_1A:
  74   case ArchKind::ARMV8_2A:
  75   case ArchKind::ARMV8_3A:
  76   case ArchKind::ARMV8_4A:
  77   case ArchKind::ARMV8_5A:
  78   case ArchKind::ARMV8_6A:
  79   case ArchKind::ARMV8_7A:
  80   case ArchKind::ARMV8R:
  81   case ArchKind::ARMV8MBaseline:
  82   case ArchKind::ARMV8MMainline:
  83   case ArchKind::ARMV8_1MMainline:
  84     return 8;
  85   case ArchKind::INVALID:
  86     return 0;
  87   }
  88   llvm_unreachable("Unhandled architecture");
  89 }
  90
  91 // Profile A/R/M
  92 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
  93   Arch = getCanonicalArchName(Arch);
  94   switch (parseArch(Arch)) {
  95   case ArchKind::ARMV6M:
  96   case ArchKind::ARMV7M:
  97   case ArchKind::ARMV7EM:
  98   case ArchKind::ARMV8MMainline:
  99   case ArchKind::ARMV8MBaseline:
 100   case ArchKind::ARMV8_1MMainline:
 101     return ProfileKind::M;
 102   case ArchKind::ARMV7R:
 103   case ArchKind::ARMV8R:
 104     return ProfileKind::R;
 105   case ArchKind::ARMV7A:
 106   case ArchKind::ARMV7VE:
 107   case ArchKind::ARMV7K:
 108   case ArchKind::ARMV8A:
 109   case ArchKind::ARMV8_1A:
 110   case ArchKind::ARMV8_2A:
 111   case ArchKind::ARMV8_3A:
 112   case ArchKind::ARMV8_4A:
 113   case ArchKind::ARMV8_5A:
 114   case ArchKind::ARMV8_6A:
 115   case ArchKind::ARMV8_7A:
 116     return ProfileKind::A;
 117   case ArchKind::ARMV2:
 118   case ArchKind::ARMV2A:
 119   case ArchKind::ARMV3:
 120   case ArchKind::ARMV3M:
 121   case ArchKind::ARMV4:
 122   case ArchKind::ARMV4T:
 123   case ArchKind::ARMV5T:
 124   case ArchKind::ARMV5TE:
 125   case ArchKind::ARMV5TEJ:
 126   case ArchKind::ARMV6:
 127   case ArchKind::ARMV6K:
 128   case ArchKind::ARMV6T2:
 129   case ArchKind::ARMV6KZ:
 130   case ArchKind::ARMV7S:
 131   case ArchKind::IWMMXT:
 132   case ArchKind::IWMMXT2:
 133   case ArchKind::XSCALE:
 134   case ArchKind::INVALID:
 135     return ProfileKind::INVALID;
 136   }
 137   llvm_unreachable("Unhandled architecture");
 138 }
 139
 140 StringRef ARM::getArchSynonym(StringRef Arch) {
 141   return StringSwitch<StringRef>(Arch)
 142       .Case("v5", "v5t")
 143       .Case("v5e", "v5te")
 144       .Case("v6j", "v6")
 145       .Case("v6hl", "v6k")
 146       .Cases("v6m", "v6sm", "v6s-m", "v6-m")
 147       .Cases("v6z", "v6zk", "v6kz")
 148       .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
 149       .Case("v7r", "v7-r")
 150       .Case("v7m", "v7-m")
 151       .Case("v7em", "v7e-m")
 152       .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a")
 153       .Case("v8.1a", "v8.1-a")
 154       .Case("v8.2a", "v8.2-a")
 155       .Case("v8.3a", "v8.3-a")
 156       .Case("v8.4a", "v8.4-a")
 157       .Case("v8.5a", "v8.5-a")
 158       .Case("v8.6a", "v8.6-a")
 159       .Case("v8.7a", "v8.7-a")
 160       .Case("v8r", "v8-r")
 161       .Case("v8m.base", "v8-m.base")
 162       .Case("v8m.main", "v8-m.main")
 163       .Case("v8.1m.main", "v8.1-m.main")
 164       .Default(Arch);
 165 }
 166
 167 bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) {
 168
 169   if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
 170     return false;
 171
 172   static const struct FPUFeatureNameInfo {
 173     const char *PlusName, *MinusName;
 174     FPUVersion MinVersion;
 175     FPURestriction MaxRestriction;
 176   } FPUFeatureInfoList[] = {
 177     // We have to specify the + and - versions of the name in full so
 178     // that we can return them as static StringRefs.
 179     //
 180     // Also, the SubtargetFeatures ending in just "sp" are listed here
 181     // under FPURestriction::None, which is the only FPURestriction in
 182     // which they would be valid (since FPURestriction::SP doesn't
 183     // exist).
 184     {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
 185     {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
 186     {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
 187     {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
 188     {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
 189     {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
 190     {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
 191     {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
 192     {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
 193     {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
 194     {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
 195     {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
 196     {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
 197     {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
 198     {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
 199     {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
 200     {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
 201     {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},
 202   };
 203
 204   for (const auto &Info: FPUFeatureInfoList) {
 205     if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
 206         FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
 207       Features.push_back(Info.PlusName);
 208     else
 209       Features.push_back(Info.MinusName);
 210   }
 211
 212   static const struct NeonFeatureNameInfo {
 213     const char *PlusName, *MinusName;
 214     NeonSupportLevel MinSupportLevel;
 215   } NeonFeatureInfoList[] = {
 216       {"+neon", "-neon", NeonSupportLevel::Neon},
 217       {"+sha2", "-sha2", NeonSupportLevel::Crypto},
 218       {"+aes", "-aes", NeonSupportLevel::Crypto},
 219   };
 220
 221   for (const auto &Info: NeonFeatureInfoList) {
 222     if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
 223       Features.push_back(Info.PlusName);
 224     else
 225       Features.push_back(Info.MinusName);
 226   }
 227
 228   return true;
 229 }
 230
 231 // Little/Big endian
 232 ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
 233   if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
 234       Arch.startswith("aarch64_be"))
 235     return EndianKind::BIG;
 236
 237   if (Arch.startswith("arm") || Arch.startswith("thumb")) {
 238     if (Arch.endswith("eb"))
 239       return EndianKind::BIG;
 240     else
 241       return EndianKind::LITTLE;
 242   }
 243
 244   if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
 245     return EndianKind::LITTLE;
 246
 247   return EndianKind::INVALID;
 248 }
 249
 250 // ARM, Thumb, AArch64
 251 ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
 252   return StringSwitch<ISAKind>(Arch)
 253       .StartsWith("aarch64", ISAKind::AARCH64)
 254       .StartsWith("arm64", ISAKind::AARCH64)
 255       .StartsWith("thumb", ISAKind::THUMB)
 256       .StartsWith("arm", ISAKind::ARM)
 257       .Default(ISAKind::INVALID);
 258 }
 259
 260 unsigned ARM::parseFPU(StringRef FPU) {
 261   StringRef Syn = getFPUSynonym(FPU);
 262   for (const auto &F : FPUNames) {
 263     if (Syn == F.getName())
 264       return F.ID;
 265   }
 266   return FK_INVALID;
 267 }
 268
 269 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
 270   if (FPUKind >= FK_LAST)
 271     return NeonSupportLevel::None;
 272   return FPUNames[FPUKind].NeonSupport;
 273 }
 274
 275 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
 276 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
 277 // "v.+", if the latter, return unmodified string, minus 'eb'.
 278 // If invalid, return empty string.
 279 StringRef ARM::getCanonicalArchName(StringRef Arch) {
 280   size_t offset = StringRef::npos;
 281   StringRef A = Arch;
 282   StringRef Error = "";
 283
 284   // Begins with "arm" / "thumb", move past it.
 285   if (A.startswith("arm64_32"))
 286     offset = 8;
 287   else if (A.startswith("arm64e"))
 288     offset = 6;
 289   else if (A.startswith("arm64"))
 290     offset = 5;
 291   else if (A.startswith("aarch64_32"))
 292     offset = 10;
 293   else if (A.startswith("arm"))
 294     offset = 3;
 295   else if (A.startswith("thumb"))
 296     offset = 5;
 297   else if (A.startswith("aarch64")) {
 298     offset = 7;
 299     // AArch64 uses "_be", not "eb" suffix.
 300     if (A.find("eb") != StringRef::npos)
 301       return Error;
 302     if (A.substr(offset, 3) == "_be")
 303       offset += 3;
 304   }
 305
 306   // Ex. "armebv7", move past the "eb".
 307   if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
 308     offset += 2;
 309   // Or, if it ends with eb ("armv7eb"), chop it off.
 310   else if (A.endswith("eb"))
 311     A = A.substr(0, A.size() - 2);
 312   // Trim the head
 313   if (offset != StringRef::npos)
 314     A = A.substr(offset);
 315
 316   // Empty string means offset reached the end, which means it's valid.
 317   if (A.empty())
 318     return Arch;
 319
 320   // Only match non-marketing names
 321   if (offset != StringRef::npos) {
 322     // Must start with 'vN'.
 323     if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1])))
 324       return Error;
 325     // Can't have an extra 'eb'.
 326     if (A.find("eb") != StringRef::npos)
 327       return Error;
 328   }
 329
 330   // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
 331   return A;
 332 }
 333
 334 StringRef ARM::getFPUSynonym(StringRef FPU) {
 335   return StringSwitch<StringRef>(FPU)
 336       .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
 337       .Case("vfp2", "vfpv2")
 338       .Case("vfp3", "vfpv3")
 339       .Case("vfp4", "vfpv4")
 340       .Case("vfp3-d16", "vfpv3-d16")
 341       .Case("vfp4-d16", "vfpv4-d16")
 342       .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
 343       .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
 344       .Case("fp5-sp-d16", "fpv5-sp-d16")
 345       .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
 346       // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
 347       .Case("neon-vfpv3", "neon")
 348       .Default(FPU);
 349 }
 350
 351 StringRef ARM::getFPUName(unsigned FPUKind) {
 352   if (FPUKind >= FK_LAST)
 353     return StringRef();
 354   return FPUNames[FPUKind].getName();
 355 }
 356
 357 ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) {
 358   if (FPUKind >= FK_LAST)
 359     return FPUVersion::NONE;
 360   return FPUNames[FPUKind].FPUVer;
 361 }
 362
 363 ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) {
 364   if (FPUKind >= FK_LAST)
 365     return FPURestriction::None;
 366   return FPUNames[FPUKind].Restriction;
 367 }
 368
 369 unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
 370   if (CPU == "generic")
 371     return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
 372
 373   return StringSwitch<unsigned>(CPU)
 374 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
 375   .Case(NAME, DEFAULT_FPU)
 376 #include "llvm/Support/ARMTargetParser.def"
 377    .Default(ARM::FK_INVALID);
 378 }
 379
 380 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
 381   if (CPU == "generic")
 382     return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
 383
 384   return StringSwitch<uint64_t>(CPU)
 385 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
 386   .Case(NAME,                                                                  \
 387         ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions |    \
 388             DEFAULT_EXT)
 389 #include "llvm/Support/ARMTargetParser.def"
 390   .Default(ARM::AEK_INVALID);
 391 }
 392
 393 bool ARM::getHWDivFeatures(uint64_t HWDivKind,
 394                            std::vector<StringRef> &Features) {
 395
 396   if (HWDivKind == AEK_INVALID)
 397     return false;
 398
 399   if (HWDivKind & AEK_HWDIVARM)
 400     Features.push_back("+hwdiv-arm");
 401   else
 402     Features.push_back("-hwdiv-arm");
 403
 404   if (HWDivKind & AEK_HWDIVTHUMB)
 405     Features.push_back("+hwdiv");
 406   else
 407     Features.push_back("-hwdiv");
 408
 409   return true;
 410 }
 411
 412 bool ARM::getExtensionFeatures(uint64_t Extensions,
 413                                std::vector<StringRef> &Features) {
 414
 415   if (Extensions == AEK_INVALID)
 416     return false;
 417
 418   for (const auto &AE : ARCHExtNames) {
 419     if ((Extensions & AE.ID) == AE.ID && AE.Feature)
 420       Features.push_back(AE.Feature);
 421     else if (AE.NegFeature)
 422       Features.push_back(AE.NegFeature);
 423   }
 424
 425   return getHWDivFeatures(Extensions, Features);
 426 }
 427
 428 StringRef ARM::getArchName(ARM::ArchKind AK) {
 429   return ARCHNames[static_cast<unsigned>(AK)].getName();
 430 }
 431
 432 StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
 433   return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
 434 }
 435
 436 StringRef ARM::getSubArch(ARM::ArchKind AK) {
 437   return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
 438 }
 439
 440 unsigned ARM::getArchAttr(ARM::ArchKind AK) {
 441   return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
 442 }
 443
 444 StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
 445   for (const auto &AE : ARCHExtNames) {
 446     if (ArchExtKind == AE.ID)
 447       return AE.getName();
 448   }
 449   return StringRef();
 450 }
 451
 452 static bool stripNegationPrefix(StringRef &Name) {
 453   if (Name.startswith("no")) {
 454     Name = Name.substr(2);
 455     return true;
 456   }
 457   return false;
 458 }
 459
 460 StringRef ARM::getArchExtFeature(StringRef ArchExt) {
 461   bool Negated = stripNegationPrefix(ArchExt);
 462   for (const auto &AE : ARCHExtNames) {
 463     if (AE.Feature && ArchExt == AE.getName())
 464       return StringRef(Negated ? AE.NegFeature : AE.Feature);
 465   }
 466
 467   return StringRef();
 468 }
 469
 470 static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) {
 471   const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
 472
 473   // If the input FPU already supports double-precision, then there
 474   // isn't any different FPU we can return here.
 475   //
 476   // The current available FPURestriction values are None (no
 477   // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs
 478   // and single precision only); there's no value representing
 479   // SP restriction without D16. So this test just means 'is it
 480   // SP only?'.
 481   if (InputFPU.Restriction != ARM::FPURestriction::SP_D16)
 482     return ARM::FK_INVALID;
 483
 484   // Otherwise, look for an FPU entry with all the same fields, except
 485   // that SP_D16 has been replaced with just D16, representing adding
 486   // double precision and not changing anything else.
 487   for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
 488     if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
 489         CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
 490         CandidateFPU.Restriction == ARM::FPURestriction::D16) {
 491       return CandidateFPU.ID;
 492     }
 493   }
 494
 495   // nothing found
 496   return ARM::FK_INVALID;
 497 }
 498
 499 bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK,
 500                                 StringRef ArchExt,
 501                                 std::vector<StringRef> &Features,
 502                                 unsigned &ArgFPUID) {
 503
 504   size_t StartingNumFeatures = Features.size();
 505   const bool Negated = stripNegationPrefix(ArchExt);
 506   uint64_t ID = parseArchExt(ArchExt);
 507
 508   if (ID == AEK_INVALID)
 509     return false;
 510
 511   for (const auto &AE : ARCHExtNames) {
 512     if (Negated) {
 513       if ((AE.ID & ID) == ID && AE.NegFeature)
 514         Features.push_back(AE.NegFeature);
 515     } else {
 516       if ((AE.ID & ID) == AE.ID && AE.Feature)
 517         Features.push_back(AE.Feature);
 518     }
 519   }
 520
 521   if (CPU == "")
 522     CPU = "generic";
 523
 524   if (ArchExt == "fp" || ArchExt == "fp.dp") {
 525     unsigned FPUKind;
 526     if (ArchExt == "fp.dp") {
 527       if (Negated) {
 528         Features.push_back("-fp64");
 529         return true;
 530       }
 531       FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK));
 532     } else if (Negated) {
 533       FPUKind = ARM::FK_NONE;
 534     } else {
 535       FPUKind = getDefaultFPU(CPU, AK);
 536     }
 537     ArgFPUID = FPUKind;
 538     return ARM::getFPUFeatures(FPUKind, Features);
 539   }
 540   return StartingNumFeatures != Features.size();
 541 }
 542
 543 StringRef ARM::getDefaultCPU(StringRef Arch) {
 544   ArchKind AK = parseArch(Arch);
 545   if (AK == ArchKind::INVALID)
 546     return StringRef();
 547
 548   // Look for multiple AKs to find the default for pair AK+Name.
 549   for (const auto &CPU : CPUNames) {
 550     if (CPU.ArchID == AK && CPU.Default)
 551       return CPU.getName();
 552   }
 553
 554   // If we can't find a default then target the architecture instead
 555   return "generic";
 556 }
 557
 558 uint64_t ARM::parseHWDiv(StringRef HWDiv) {
 559   StringRef Syn = getHWDivSynonym(HWDiv);
 560   for (const auto &D : HWDivNames) {
 561     if (Syn == D.getName())
 562       return D.ID;
 563   }
 564   return AEK_INVALID;
 565 }
 566
 567 uint64_t ARM::parseArchExt(StringRef ArchExt) {
 568   for (const auto &A : ARCHExtNames) {
 569     if (ArchExt == A.getName())
 570       return A.ID;
 571   }
 572   return AEK_INVALID;
 573 }
 574
 575 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {
 576   for (const auto &C : CPUNames) {
 577     if (CPU == C.getName())
 578       return C.ArchID;
 579   }
 580   return ArchKind::INVALID;
 581 }
 582
 583 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
 584   for (const CpuNames<ArchKind> &Arch : CPUNames) {
 585     if (Arch.ArchID != ArchKind::INVALID)
 586       Values.push_back(Arch.getName());
 587   }
 588 }
 589
 590 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
 591   StringRef ArchName =
 592       CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU));
 593
 594   if (TT.isOSBinFormatMachO()) {
 595     if (TT.getEnvironment() == Triple::EABI ||
 596         TT.getOS() == Triple::UnknownOS ||
 597         parseArchProfile(ArchName) == ProfileKind::M)
 598       return "aapcs";
 599     if (TT.isWatchABI())
 600       return "aapcs16";
 601     return "apcs-gnu";
 602   } else if (TT.isOSWindows())
 603     // FIXME: this is invalid for WindowsCE.
 604     return "aapcs";
 605
 606   // Select the default based on the platform.
 607   switch (TT.getEnvironment()) {
 608   case Triple::Android:
 609   case Triple::GNUEABI:
 610   case Triple::GNUEABIHF:
 611   case Triple::MuslEABI:
 612   case Triple::MuslEABIHF:
 613     return "aapcs-linux";
 614   case Triple::EABIHF:
 615   case Triple::EABI:
 616     return "aapcs";
 617   default:
 618     if (TT.isOSNetBSD())
 619       return "apcs-gnu";
 620     if (TT.isOSOpenBSD())
 621       return "aapcs-linux";
 622     return "aapcs";
 623   }
 624 }