llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h

   1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 /// \file
  10 /// The AMDGPU TargetMachine interface definition for hw codgen targets.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
  15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
  16
  17 #include "GCNSubtarget.h"
  18 #include "R600Subtarget.h"
  19 #include "llvm/Target/TargetMachine.h"
  20
  21 namespace llvm {
  22
  23 //===----------------------------------------------------------------------===//
  24 // AMDGPU Target Machine (R600+)
  25 //===----------------------------------------------------------------------===//
  26
  27 class AMDGPUTargetMachine : public LLVMTargetMachine {
  28 protected:
  29   std::unique_ptr<TargetLoweringObjectFile> TLOF;
  30
  31   StringRef getGPUName(const Function &F) const;
  32   StringRef getFeatureString(const Function &F) const;
  33
  34 public:
  35   static bool EnableLateStructurizeCFG;
  36   static bool EnableFunctionCalls;
  37   static bool EnableFixedFunctionABI;
  38   static bool EnableLowerModuleLDS;
  39
  40   AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
  41                       StringRef FS, TargetOptions Options,
  42                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
  43                       CodeGenOpt::Level OL);
  44   ~AMDGPUTargetMachine() override;
  45
  46   const TargetSubtargetInfo *getSubtargetImpl() const;
  47   const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
  48
  49   TargetLoweringObjectFile *getObjFileLowering() const override {
  50     return TLOF.get();
  51   }
  52
  53   void adjustPassManager(PassManagerBuilder &) override;
  54
  55   void registerPassBuilderCallbacks(PassBuilder &PB) override;
  56   void registerDefaultAliasAnalyses(AAManager &) override;
  57
  58   /// Get the integer value of a null pointer in the given address space.
  59   static int64_t getNullPointerValue(unsigned AddrSpace);
  60
  61   bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
  62
  63   unsigned getAssumedAddrSpace(const Value *V) const override;
  64 };
  65
  66 //===----------------------------------------------------------------------===//
  67 // R600 Target Machine (R600 -> Cayman)
  68 //===----------------------------------------------------------------------===//
  69
  70 class R600TargetMachine final : public AMDGPUTargetMachine {
  71 private:
  72   mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
  73
  74 public:
  75   R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
  76                     StringRef FS, TargetOptions Options,
  77                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
  78                     CodeGenOpt::Level OL, bool JIT);
  79
  80   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
  81
  82   const R600Subtarget *getSubtargetImpl(const Function &) const override;
  83
  84   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
  85
  86   bool isMachineVerifierClean() const override {
  87     return false;
  88   }
  89 };
  90
  91 //===----------------------------------------------------------------------===//
  92 // GCN Target Machine (SI+)
  93 //===----------------------------------------------------------------------===//
  94
  95 class GCNTargetMachine final : public AMDGPUTargetMachine {
  96 private:
  97   mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
  98
  99 public:
 100   GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
 101                    StringRef FS, TargetOptions Options,
 102                    Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
 103                    CodeGenOpt::Level OL, bool JIT);
 104
 105   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
 106
 107   const GCNSubtarget *getSubtargetImpl(const Function &) const override;
 108
 109   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
 110
 111   bool useIPRA() const override {
 112     return true;
 113   }
 114
 115   yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
 116   yaml::MachineFunctionInfo *
 117   convertFuncInfoToYAML(const MachineFunction &MF) const override;
 118   bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
 119                                 PerFunctionMIParsingState &PFS,
 120                                 SMDiagnostic &Error,
 121                                 SMRange &SourceRange) const override;
 122 };
 123
 124 } // end namespace llvm
 125
 126 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H