llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp

   1 //===- AMDGPUELFObjectWriter.cpp - AMDGPU ELF Writer ----------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #include "AMDGPUFixupKinds.h"
  10 #include "AMDGPUMCTargetDesc.h"
  11 #include "llvm/MC/MCContext.h"
  12 #include "llvm/MC/MCELFObjectWriter.h"
  13 #include "llvm/MC/MCValue.h"
  14
  15 using namespace llvm;
  16
  17 namespace {
  18
  19 class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
  20 public:
  21   AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend,
  22                         uint8_t ABIVersion);
  23
  24 protected:
  25   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
  26                         const MCFixup &Fixup, bool IsPCRel) const override;
  27 };
  28
  29
  30 } // end anonymous namespace
  31
  32 AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit,
  33                                              uint8_t OSABI,
  34                                              bool HasRelocationAddend,
  35                                              uint8_t ABIVersion)
  36   : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU,
  37                             HasRelocationAddend, ABIVersion) {}
  38
  39 unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
  40                                              const MCValue &Target,
  41                                              const MCFixup &Fixup,
  42                                              bool IsPCRel) const {
  43   if (const auto *SymA = Target.getSymA()) {
  44     // SCRATCH_RSRC_DWORD[01] is a special global variable that represents
  45     // the scratch buffer.
  46     if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0" ||
  47         SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
  48       return ELF::R_AMDGPU_ABS32_LO;
  49   }
  50
  51   switch (Target.getAccessVariant()) {
  52   default:
  53     break;
  54   case MCSymbolRefExpr::VK_GOTPCREL:
  55     return ELF::R_AMDGPU_GOTPCREL;
  56   case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_LO:
  57     return ELF::R_AMDGPU_GOTPCREL32_LO;
  58   case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_HI:
  59     return ELF::R_AMDGPU_GOTPCREL32_HI;
  60   case MCSymbolRefExpr::VK_AMDGPU_REL32_LO:
  61     return ELF::R_AMDGPU_REL32_LO;
  62   case MCSymbolRefExpr::VK_AMDGPU_REL32_HI:
  63     return ELF::R_AMDGPU_REL32_HI;
  64   case MCSymbolRefExpr::VK_AMDGPU_REL64:
  65     return ELF::R_AMDGPU_REL64;
  66   }
  67
  68   switch (Fixup.getKind()) {
  69   default: break;
  70   case FK_PCRel_4:
  71     return ELF::R_AMDGPU_REL32;
  72   case FK_Data_4:
  73   case FK_SecRel_4:
  74     return ELF::R_AMDGPU_ABS32;
  75   case FK_Data_8:
  76     return ELF::R_AMDGPU_ABS64;
  77   }
  78
  79   if (Fixup.getTargetKind() == AMDGPU::fixup_si_sopp_br) {
  80     const auto *SymA = Target.getSymA();
  81     assert(SymA);
  82
  83     if (SymA->getSymbol().isUndefined()) {
  84       Ctx.reportError(Fixup.getLoc(), Twine("undefined label '") +
  85                                           SymA->getSymbol().getName() + "'");
  86       return ELF::R_AMDGPU_NONE;
  87     }
  88     return ELF::R_AMDGPU_REL16;
  89   }
  90
  91   llvm_unreachable("unhandled relocation type");
  92 }
  93
  94 std::unique_ptr<MCObjectTargetWriter>
  95 llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
  96                                   bool HasRelocationAddend,
  97                                   uint8_t ABIVersion) {
  98   return std::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI,
  99                                                   HasRelocationAddend,
 100                                                   ABIVersion);
 101 }