llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp

   1 //===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 /// \file
   8 //===----------------------------------------------------------------------===//
   9
  10 #include "AMDGPUMCAsmInfo.h"
  11 #include "llvm/ADT/Triple.h"
  12 #include "llvm/MC/MCSubtargetInfo.h"
  13 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
  14
  15 using namespace llvm;
  16
  17 AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
  18                                  const MCTargetOptions &Options)
  19     : MCAsmInfoELF() {
  20   CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4;
  21   StackGrowsUp = true;
  22   HasSingleParameterDotFile = false;
  23   //===------------------------------------------------------------------===//
  24   MinInstAlignment = 4;
  25
  26   // This is the maximum instruction encoded size for gfx10. With a known
  27   // subtarget, it can be reduced to 8 bytes.
  28   MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 20 : 16;
  29   SeparatorString = "\n";
  30   CommentString = ";";
  31   PrivateLabelPrefix = "";
  32   InlineAsmStart = ";#ASMSTART";
  33   InlineAsmEnd = ";#ASMEND";
  34
  35   //===--- Data Emission Directives -------------------------------------===//
  36   SunStyleELFSectionSwitchSyntax = true;
  37   UsesELFSectionDirectiveForBSS = true;
  38
  39   //===--- Global Variable Emission Directives --------------------------===//
  40   HasAggressiveSymbolFolding = true;
  41   COMMDirectiveAlignmentIsInBytes = false;
  42   HasNoDeadStrip = true;
  43   //===--- Dwarf Emission Directives -----------------------------------===//
  44   SupportsDebugInformation = true;
  45   UsesCFIForDebug = true;
  46   DwarfRegNumForCFI = true;
  47
  48   UseIntegratedAssembler = false;
  49 }
  50
  51 bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const {
  52   return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" ||
  53          SectionName == ".hsadata_global_program" ||
  54          SectionName == ".hsarodata_readonly_agent" ||
  55          MCAsmInfo::shouldOmitSectionDirective(SectionName);
  56 }
  57
  58 unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const {
  59   if (!STI || STI->getTargetTriple().getArch() == Triple::r600)
  60     return MaxInstLength;
  61
  62   // Maximum for NSA encoded images
  63   if (STI->getFeatureBits()[AMDGPU::FeatureNSAEncoding])
  64     return 20;
  65
  66   // 64-bit instruction with 32-bit literal.
  67   if (STI->getFeatureBits()[AMDGPU::FeatureVOP3Literal])
  68     return 12;
  69
  70   return 8;
  71 }