llvm/lib/Target/AMDGPU/SIProgramInfo.cpp

   1 //===-- SIProgramInfo.cpp ----------------------------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 /// \file
  10 ///
  11 /// The SIProgramInfo tracks resource usage and hardware flags for kernels and
  12 /// entry functions.
  13 //
  14 //===----------------------------------------------------------------------===//
  15 //
  16
  17 #include "SIProgramInfo.h"
  18 #include "SIDefines.h"
  19 #include "Utils/AMDGPUBaseInfo.h"
  20
  21 using namespace llvm;
  22
  23 uint64_t SIProgramInfo::getComputePGMRSrc1() const {
  24   return S_00B848_VGPRS(VGPRBlocks) | S_00B848_SGPRS(SGPRBlocks) |
  25          S_00B848_PRIORITY(Priority) | S_00B848_FLOAT_MODE(FloatMode) |
  26          S_00B848_PRIV(Priv) | S_00B848_DX10_CLAMP(DX10Clamp) |
  27          S_00B848_DEBUG_MODE(DebugMode) | S_00B848_IEEE_MODE(IEEEMode) |
  28          S_00B848_WGP_MODE(WgpMode) | S_00B848_MEM_ORDERED(MemOrdered);
  29 }
  30
  31 uint64_t SIProgramInfo::getPGMRSrc1(CallingConv::ID CC) const {
  32   if (AMDGPU::isCompute(CC)) {
  33     return getComputePGMRSrc1();
  34   }
  35   uint64_t Reg = S_00B848_VGPRS(VGPRBlocks) | S_00B848_SGPRS(SGPRBlocks) |
  36                  S_00B848_PRIORITY(Priority) | S_00B848_FLOAT_MODE(FloatMode) |
  37                  S_00B848_PRIV(Priv) | S_00B848_DX10_CLAMP(DX10Clamp) |
  38                  S_00B848_DEBUG_MODE(DebugMode) | S_00B848_IEEE_MODE(IEEEMode);
  39   switch (CC) {
  40   case CallingConv::AMDGPU_PS:
  41     Reg |= S_00B028_MEM_ORDERED(MemOrdered);
  42     break;
  43   case CallingConv::AMDGPU_VS:
  44     Reg |= S_00B128_MEM_ORDERED(MemOrdered);
  45     break;
  46   case CallingConv::AMDGPU_GS:
  47     Reg |= S_00B228_WGP_MODE(WgpMode) | S_00B228_MEM_ORDERED(MemOrdered);
  48     break;
  49   case CallingConv::AMDGPU_HS:
  50     Reg |= S_00B428_WGP_MODE(WgpMode) | S_00B428_MEM_ORDERED(MemOrdered);
  51     break;
  52   default:
  53     break;
  54   }
  55   return Reg;
  56 }