llvm/lib/Target/AMDGPU/VOPCInstructions.td

   1 //===-- VOPCInstructions.td - Vector Instruction Definitions --------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 //===----------------------------------------------------------------------===//
  10 // Encodings
  11 //===----------------------------------------------------------------------===//
  12
  13 class VOPCe <bits<8> op> : Enc32 {
  14   bits<9> src0;
  15   bits<8> src1;
  16
  17   let Inst{8-0} = src0;
  18   let Inst{16-9} = src1;
  19   let Inst{24-17} = op;
  20   let Inst{31-25} = 0x3e;
  21 }
  22
  23 class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> {
  24   bits<8> src1;
  25
  26   let Inst{8-0}   = 0xf9; // sdwa
  27   let Inst{16-9}  = !if(P.HasSrc1, src1{7-0}, 0);
  28   let Inst{24-17} = op;
  29   let Inst{31-25} = 0x3e; // encoding
  30 }
  31
  32 class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> {
  33   bits<9> src1;
  34
  35   let Inst{8-0}   = 0xf9; // sdwa
  36   let Inst{16-9}  = !if(P.HasSrc1, src1{7-0}, 0);
  37   let Inst{24-17} = op;
  38   let Inst{31-25} = 0x3e; // encoding
  39   let Inst{63}    = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr
  40 }
  41
  42
  43 //===----------------------------------------------------------------------===//
  44 // VOPC classes
  45 //===----------------------------------------------------------------------===//
  46
  47 // VOPC instructions are a special case because for the 32-bit
  48 // encoding, we want to display the implicit vcc write as if it were
  49 // an explicit $dst.
  50 class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> :
  51   VOPProfile <[i1, vt0, vt1, untyped]> {
  52   let Asm32 = "$src0, $src1";
  53   // The destination for 32-bit encoding is implicit.
  54   let HasDst32 = 0;
  55   // VOPC disallows dst_sel and dst_unused as they have no effect on destination
  56   let EmitDstSel = 0;
  57   let Outs64 = (outs VOPDstS64orS32:$sdst);
  58   list<SchedReadWrite> Schedule = sched;
  59 }
  60
  61 class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0,
  62                           ValueType vt1 = vt0> :
  63   VOPC_Profile<sched, vt0, vt1> {
  64   let Outs64 = (outs );
  65   let OutsSDWA = (outs );
  66   let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,
  67                      Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,
  68                      src0_sel:$src0_sel, src1_sel:$src1_sel);
  69   let Asm64 = !if(isFloatType<Src0VT>.ret, "$src0_modifiers, $src1_modifiers$clamp",
  70                                            "$src0, $src1");
  71   let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel";
  72   let EmitDst = 0;
  73 }
  74
  75 class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[],
  76                    bit DefVcc = 1> :
  77   InstSI<(outs), P.Ins32, "", pattern>,
  78   VOP <opName>,
  79   SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> {
  80
  81   let isPseudo = 1;
  82   let isCodeGenOnly = 1;
  83   let UseNamedOperandTable = 1;
  84
  85   string Mnemonic = opName;
  86   string AsmOperands = P.Asm32;
  87
  88   let Size = 4;
  89   let mayLoad = 0;
  90   let mayStore = 0;
  91   let hasSideEffects = 0;
  92
  93   let ReadsModeReg = isFloatType<P.Src0VT>.ret;
  94
  95   let VALU = 1;
  96   let VOPC = 1;
  97   let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]);
  98   let Defs = !if(DefVcc, [VCC], []);
  99
 100   VOPProfile Pfl = P;
 101 }
 102
 103 class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> :
 104   InstSI <ps.OutOperandList, ps.InOperandList, ps.PseudoInstr # " " # ps.AsmOperands, []>,
 105   SIMCInstr <ps.PseudoInstr, EncodingFamily> {
 106
 107   let VALU = 1;
 108   let VOPC = 1;
 109   let isPseudo = 0;
 110   let isCodeGenOnly = 0;
 111
 112   let Constraints     = ps.Constraints;
 113   let DisableEncoding = ps.DisableEncoding;
 114
 115   // copy relevant pseudo op flags
 116   let SubtargetPredicate = ps.SubtargetPredicate;
 117   let AsmMatchConverter  = ps.AsmMatchConverter;
 118   let Constraints        = ps.Constraints;
 119   let DisableEncoding    = ps.DisableEncoding;
 120   let TSFlags            = ps.TSFlags;
 121   let UseNamedOperandTable = ps.UseNamedOperandTable;
 122   let Uses                 = ps.Uses;
 123   let Defs                 = ps.Defs;
 124   let SchedRW              = ps.SchedRW;
 125   let mayLoad              = ps.mayLoad;
 126   let mayStore             = ps.mayStore;
 127 }
 128
 129 class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> :
 130   VOP_SDWA_Pseudo <OpName, P, pattern> {
 131   let AsmMatchConverter = "cvtSdwaVOPC";
 132 }
 133
 134 // This class is used only with VOPC instructions. Use $sdst for out operand
 135 class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst,
 136                      string Asm32 = ps.Pfl.Asm32, VOPProfile p = ps.Pfl> :
 137   InstAlias <ps.OpName#" "#Asm32, (inst)>, PredicateControl {
 138
 139   field bit isCompare;
 140   field bit isCommutable;
 141
 142   let ResultInst =
 143     !if (p.HasDst32,
 144       !if (!eq(p.NumSrcArgs, 0),
 145         // 1 dst, 0 src
 146         (inst p.DstRC:$sdst),
 147       !if (!eq(p.NumSrcArgs, 1),
 148         // 1 dst, 1 src
 149         (inst p.DstRC:$sdst, p.Src0RC32:$src0),
 150       !if (!eq(p.NumSrcArgs, 2),
 151         // 1 dst, 2 src
 152         (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1),
 153       // else - unreachable
 154         (inst)))),
 155     // else
 156       !if (!eq(p.NumSrcArgs, 2),
 157         // 0 dst, 2 src
 158         (inst p.Src0RC32:$src0, p.Src1RC32:$src1),
 159       !if (!eq(p.NumSrcArgs, 1),
 160         // 0 dst, 1 src
 161         (inst p.Src0RC32:$src1),
 162       // else
 163         // 0 dst, 0 src
 164         (inst))));
 165
 166   let AsmVariantName = AMDGPUAsmVariants.Default;
 167   let SubtargetPredicate = AssemblerPredicate;
 168 }
 169
 170 multiclass VOPCInstAliases <string OpName, string Arch> {
 171   def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"),
 172                        !cast<Instruction>(OpName#"_e32_"#Arch)>;
 173   let WaveSizePredicate = isWave32 in {
 174     def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"),
 175                          !cast<Instruction>(OpName#"_e32_"#Arch),
 176                          "vcc_lo, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>;
 177   }
 178   let WaveSizePredicate = isWave64 in {
 179     def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"),
 180                          !cast<Instruction>(OpName#"_e32_"#Arch),
 181                          "vcc, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>;
 182   }
 183 }
 184
 185 multiclass VOPCXInstAliases <string OpName, string Arch> {
 186   def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"),
 187                        !cast<Instruction>(OpName#"_e32_"#Arch)>;
 188 }
 189
 190
 191 class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies {
 192   list<dag> ret = !if(P.HasModifiers,
 193       [(set i1:$sdst,
 194         (setcc (P.Src0VT
 195                   !if(P.HasOMod,
 196                     (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),
 197                     (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp))),
 198                (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)),
 199                cond))],
 200       [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]);
 201 }
 202
 203 class VCMPXNoSDstTable <bit has_sdst, string Name> {
 204   bit HasSDst = has_sdst;
 205   string NoSDstOp = Name;
 206 }
 207
 208 multiclass VOPC_Pseudos <string opName,
 209                          VOPC_Profile P,
 210                          SDPatternOperator cond = COND_NULL,
 211                          string revOp = opName,
 212                          bit DefExec = 0> {
 213
 214   def _e32 : VOPC_Pseudo <opName, P>,
 215              Commutable_REV<revOp#"_e32", !eq(revOp, opName)>,
 216              VCMPXNoSDstTable<1, opName#"_e32"> {
 217     let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
 218     let SchedRW = P.Schedule;
 219     let isConvergent = DefExec;
 220     let isCompare = 1;
 221     let isCommutable = 1;
 222   }
 223
 224   def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>,
 225     Commutable_REV<revOp#"_e64", !eq(revOp, opName)>,
 226     VCMPXNoSDstTable<1, opName#"_e64"> {
 227     let Defs = !if(DefExec, [EXEC], []);
 228     let SchedRW = P.Schedule;
 229     let isCompare = 1;
 230     let isCommutable = 1;
 231   }
 232
 233   foreach _ = BoolToList<P.HasExtSDWA>.ret in
 234   def _sdwa : VOPC_SDWA_Pseudo <opName, P> {
 235     let Defs = !if(DefExec, [EXEC], []);
 236     let SchedRW = P.Schedule;
 237     let isConvergent = DefExec;
 238     let isCompare = 1;
 239   }
 240 }
 241
 242 let SubtargetPredicate = HasSdstCMPX in {
 243 multiclass VOPCX_Pseudos <string opName,
 244                           VOPC_Profile P, VOPC_Profile P_NoSDst,
 245                           SDPatternOperator cond = COND_NULL,
 246                           string revOp = opName> :
 247            VOPC_Pseudos <opName, P, cond, revOp, 1> {
 248
 249   def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>,
 250              Commutable_REV<revOp#"_nosdst_e32", !eq(revOp, opName)>,
 251              VCMPXNoSDstTable<0, opName#"_e32"> {
 252     let Defs = [EXEC];
 253     let SchedRW = P_NoSDst.Schedule;
 254     let isConvergent = 1;
 255     let isCompare = 1;
 256     let isCommutable = 1;
 257     let SubtargetPredicate = HasNoSdstCMPX;
 258   }
 259
 260   def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>,
 261     Commutable_REV<revOp#"_nosdst_e64", !eq(revOp, opName)>,
 262     VCMPXNoSDstTable<0, opName#"_e64"> {
 263     let Defs = [EXEC];
 264     let SchedRW = P_NoSDst.Schedule;
 265     let isCompare = 1;
 266     let isCommutable = 1;
 267     let SubtargetPredicate = HasNoSdstCMPX;
 268   }
 269
 270   foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in
 271   def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> {
 272     let Defs = [EXEC];
 273     let SchedRW = P_NoSDst.Schedule;
 274     let isConvergent = 1;
 275     let isCompare = 1;
 276     let SubtargetPredicate = HasNoSdstCMPX;
 277   }
 278 }
 279 } // End SubtargetPredicate = HasSdstCMPX
 280
 281 def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>;
 282 def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>;
 283 def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>;
 284 def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>;
 285 def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>;
 286 def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>;
 287
 288 def VOPC_F16_F16 : VOPC_NoSdst_Profile<[Write32Bit], f16>;
 289 def VOPC_F32_F32 : VOPC_NoSdst_Profile<[Write32Bit], f32>;
 290 def VOPC_F64_F64 : VOPC_NoSdst_Profile<[Write64Bit], f64>;
 291 def VOPC_I16_I16 : VOPC_NoSdst_Profile<[Write32Bit], i16>;
 292 def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>;
 293 def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>;
 294
 295 multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL,
 296                      string revOp = opName> :
 297   VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>;
 298
 299 multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
 300   VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>;
 301
 302 multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
 303   VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>;
 304
 305 multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
 306   VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>;
 307
 308 multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
 309   VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>;
 310
 311 multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
 312   VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>;
 313
 314 multiclass VOPCX_F16 <string opName, string revOp = opName> :
 315   VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>;
 316
 317 multiclass VOPCX_F32 <string opName, string revOp = opName> :
 318   VOPCX_Pseudos <opName, VOPC_I1_F32_F32, VOPC_F32_F32, COND_NULL, revOp>;
 319
 320 multiclass VOPCX_F64 <string opName, string revOp = opName> :
 321   VOPCX_Pseudos <opName, VOPC_I1_F64_F64, VOPC_F64_F64, COND_NULL, revOp>;
 322
 323 multiclass VOPCX_I16 <string opName, string revOp = opName> :
 324   VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>;
 325
 326 multiclass VOPCX_I32 <string opName, string revOp = opName> :
 327   VOPCX_Pseudos <opName, VOPC_I1_I32_I32, VOPC_I32_I32, COND_NULL, revOp>;
 328
 329 multiclass VOPCX_I64 <string opName, string revOp = opName> :
 330   VOPCX_Pseudos <opName, VOPC_I1_I64_I64, VOPC_I64_I64, COND_NULL, revOp>;
 331
 332
 333 //===----------------------------------------------------------------------===//
 334 // Compare instructions
 335 //===----------------------------------------------------------------------===//
 336
 337 defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">;
 338 defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">;
 339 defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>;
 340 defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">;
 341 defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>;
 342 defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>;
 343 defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>;
 344 defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>;
 345 defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>;
 346 defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32",  COND_ULT, "v_cmp_nle_f32">;
 347 defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>;
 348 defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">;
 349 defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>;
 350 defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>;
 351 defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>;
 352 defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">;
 353
 354 defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">;
 355 defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">;
 356 defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">;
 357 defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">;
 358 defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">;
 359 defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">;
 360 defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">;
 361 defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">;
 362 defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">;
 363 defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">;
 364 defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">;
 365 defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">;
 366 defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">;
 367 defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">;
 368 defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">;
 369 defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">;
 370
 371 defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">;
 372 defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">;
 373 defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>;
 374 defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">;
 375 defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>;
 376 defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>;
 377 defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>;
 378 defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>;
 379 defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>;
 380 defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">;
 381 defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>;
 382 defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">;
 383 defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>;
 384 defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>;
 385 defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>;
 386 defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">;
 387
 388 defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">;
 389 defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">;
 390 defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">;
 391 defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">;
 392 defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">;
 393 defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">;
 394 defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">;
 395 defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">;
 396 defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">;
 397 defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">;
 398 defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">;
 399 defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">;
 400 defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">;
 401 defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">;
 402 defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">;
 403 defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">;
 404
 405 let SubtargetPredicate = isGFX6GFX7 in {
 406
 407 defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">;
 408 defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">;
 409 defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">;
 410 defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">;
 411 defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">;
 412 defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">;
 413 defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">;
 414 defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">;
 415 defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">;
 416 defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">;
 417 defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">;
 418 defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">;
 419 defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">;
 420 defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">;
 421 defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">;
 422 defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">;
 423
 424 defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">;
 425 defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">;
 426 defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">;
 427 defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">;
 428 defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">;
 429 defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">;
 430 defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">;
 431 defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">;
 432 defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">;
 433 defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">;
 434 defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">;
 435 defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">;
 436 defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">;
 437 defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">;
 438 defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">;
 439 defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">;
 440
 441 defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">;
 442 defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">;
 443 defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">;
 444 defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">;
 445 defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">;
 446 defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">;
 447 defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">;
 448 defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">;
 449 defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">;
 450 defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">;
 451 defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">;
 452 defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">;
 453 defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">;
 454 defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">;
 455 defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">;
 456 defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">;
 457
 458 defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">;
 459 defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">;
 460 defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">;
 461 defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">;
 462 defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">;
 463 defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">;
 464 defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">;
 465 defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">;
 466 defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">;
 467 defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">;
 468 defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">;
 469 defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">;
 470 defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">;
 471 defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">;
 472 defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">;
 473 defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">;
 474
 475 } // End SubtargetPredicate = isGFX6GFX7
 476
 477 let SubtargetPredicate = Has16BitInsts in {
 478
 479 defm V_CMP_F_F16    : VOPC_F16 <"v_cmp_f_f16">;
 480 defm V_CMP_LT_F16   : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">;
 481 defm V_CMP_EQ_F16   : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>;
 482 defm V_CMP_LE_F16   : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">;
 483 defm V_CMP_GT_F16   : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>;
 484 defm V_CMP_LG_F16   : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>;
 485 defm V_CMP_GE_F16   : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>;
 486 defm V_CMP_O_F16    : VOPC_F16 <"v_cmp_o_f16", COND_O>;
 487 defm V_CMP_U_F16    : VOPC_F16 <"v_cmp_u_f16", COND_UO>;
 488 defm V_CMP_NGE_F16  : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">;
 489 defm V_CMP_NLG_F16  : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>;
 490 defm V_CMP_NGT_F16  : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">;
 491 defm V_CMP_NLE_F16  : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>;
 492 defm V_CMP_NEQ_F16  : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>;
 493 defm V_CMP_NLT_F16  : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>;
 494 defm V_CMP_TRU_F16  : VOPC_F16 <"v_cmp_tru_f16">;
 495
 496 defm V_CMPX_F_F16   : VOPCX_F16 <"v_cmpx_f_f16">;
 497 defm V_CMPX_LT_F16  : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">;
 498 defm V_CMPX_EQ_F16  : VOPCX_F16 <"v_cmpx_eq_f16">;
 499 defm V_CMPX_LE_F16  : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">;
 500 defm V_CMPX_GT_F16  : VOPCX_F16 <"v_cmpx_gt_f16">;
 501 defm V_CMPX_LG_F16  : VOPCX_F16 <"v_cmpx_lg_f16">;
 502 defm V_CMPX_GE_F16  : VOPCX_F16 <"v_cmpx_ge_f16">;
 503 defm V_CMPX_O_F16   : VOPCX_F16 <"v_cmpx_o_f16">;
 504 defm V_CMPX_U_F16   : VOPCX_F16 <"v_cmpx_u_f16">;
 505 defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">;
 506 defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">;
 507 defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">;
 508 defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">;
 509 defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">;
 510 defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">;
 511 defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">;
 512
 513 defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">;
 514 defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">;
 515 defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">;
 516 defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">;
 517 defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>;
 518 defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">;
 519 defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>;
 520 defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">;
 521
 522 defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">;
 523 defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">;
 524 defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;
 525 defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">;
 526 defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>;
 527 defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>;
 528 defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>;
 529 defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">;
 530
 531 defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">;
 532 defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">;
 533 defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">;
 534 defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">;
 535 defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">;
 536 defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">;
 537 defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">;
 538 defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">;
 539 defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">;
 540
 541 defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">;
 542 defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">;
 543 defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">;
 544 defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">;
 545 defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">;
 546 defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">;
 547 defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">;
 548
 549 } // End SubtargetPredicate = Has16BitInsts
 550
 551 defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">;
 552 defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">;
 553 defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">;
 554 defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">;
 555 defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>;
 556 defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">;
 557 defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>;
 558 defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">;
 559
 560 defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">;
 561 defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">;
 562 defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">;
 563 defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">;
 564 defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">;
 565 defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">;
 566 defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">;
 567 defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">;
 568
 569 defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">;
 570 defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">;
 571 defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">;
 572 defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">;
 573 defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>;
 574 defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">;
 575 defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>;
 576 defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">;
 577
 578 defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">;
 579 defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">;
 580 defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">;
 581 defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">;
 582 defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">;
 583 defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">;
 584 defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">;
 585 defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">;
 586
 587 defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">;
 588 defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">;
 589 defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;
 590 defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">;
 591 defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>;
 592 defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>;
 593 defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>;
 594 defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">;
 595
 596 defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">;
 597 defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">;
 598 defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">;
 599 defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">;
 600 defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">;
 601 defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">;
 602 defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">;
 603 defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">;
 604
 605 defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">;
 606 defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">;
 607 defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;
 608 defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">;
 609 defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>;
 610 defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>;
 611 defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>;
 612 defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">;
 613
 614 defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">;
 615 defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">;
 616 defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">;
 617 defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">;
 618 defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">;
 619 defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">;
 620 defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">;
 621 defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">;
 622
 623 //===----------------------------------------------------------------------===//
 624 // Class instructions
 625 //===----------------------------------------------------------------------===//
 626
 627 class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> :
 628   VOPC_Profile<sched, vt, i32> {
 629   let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1);
 630   let Asm64 = "$sdst, $src0_modifiers, $src1";
 631
 632   let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,
 633                      Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,
 634                      clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel);
 635
 636   let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel";
 637   let HasSrc1Mods = 0;
 638   let HasClamp = 0;
 639   let HasOMod = 0;
 640 }
 641
 642 class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt> :
 643   VOPC_Class_Profile<sched, vt> {
 644   let Outs64 = (outs );
 645   let OutsSDWA = (outs );
 646   let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,
 647                      Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,
 648                      src0_sel:$src0_sel, src1_sel:$src1_sel);
 649   let Asm64 = "$src0_modifiers, $src1";
 650   let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel";
 651   let EmitDst = 0;
 652 }
 653
 654 class getVOPCClassPat64 <VOPProfile P> {
 655   list<dag> ret =
 656     [(set i1:$sdst,
 657       (AMDGPUfp_class
 658         (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers)),
 659         P.Src1VT:$src1))];
 660 }
 661
 662 // Special case for class instructions which only have modifiers on
 663 // the 1st source operand.
 664 multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec,
 665                                bit DefVcc = 1> {
 666   def _e32 : VOPC_Pseudo <opName, p>,
 667              VCMPXNoSDstTable<1, opName#"_e32"> {
 668     let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]),
 669                             !if(DefVcc, [VCC], []));
 670     let SchedRW = p.Schedule;
 671     let isConvergent = DefExec;
 672   }
 673
 674   def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret>,
 675              VCMPXNoSDstTable<1, opName#"_e64"> {
 676     let Defs = !if(DefExec, [EXEC], []);
 677     let SchedRW = p.Schedule;
 678   }
 679
 680   foreach _ = BoolToList<p.HasExtSDWA>.ret in
 681   def _sdwa : VOPC_SDWA_Pseudo <opName, p> {
 682     let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]),
 683                             !if(DefVcc, [VCC], []));
 684     let SchedRW = p.Schedule;
 685     let isConvergent = DefExec;
 686   }
 687 }
 688
 689 let SubtargetPredicate = HasSdstCMPX in {
 690 multiclass VOPCX_Class_Pseudos <string opName,
 691                                 VOPC_Profile P,
 692                                 VOPC_Profile P_NoSDst> :
 693            VOPC_Class_Pseudos <opName, P, 1, 1> {
 694
 695   def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>,
 696                     VCMPXNoSDstTable<0, opName#"_e32"> {
 697     let Defs = [EXEC];
 698     let SchedRW = P_NoSDst.Schedule;
 699     let isConvergent = 1;
 700     let SubtargetPredicate = HasNoSdstCMPX;
 701   }
 702
 703   def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>,
 704                     VCMPXNoSDstTable<0, opName#"_e64"> {
 705     let Defs = [EXEC];
 706     let SchedRW = P_NoSDst.Schedule;
 707     let SubtargetPredicate = HasNoSdstCMPX;
 708   }
 709
 710   foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in
 711   def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> {
 712     let Defs = [EXEC];
 713     let SchedRW = P_NoSDst.Schedule;
 714     let isConvergent = 1;
 715     let SubtargetPredicate = HasNoSdstCMPX;
 716   }
 717 }
 718 } // End SubtargetPredicate = HasSdstCMPX
 719
 720 def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>;
 721 def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>;
 722 def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>;
 723
 724 def VOPC_F16_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f16>;
 725 def VOPC_F32_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f32>;
 726 def VOPC_F64_I32 : VOPC_Class_NoSdst_Profile<[Write64Bit], f64>;
 727
 728 multiclass VOPC_CLASS_F16 <string opName> :
 729   VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>;
 730
 731 multiclass VOPCX_CLASS_F16 <string opName> :
 732   VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I32, VOPC_F16_I32>;
 733
 734 multiclass VOPC_CLASS_F32 <string opName> :
 735   VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>;
 736
 737 multiclass VOPCX_CLASS_F32 <string opName> :
 738   VOPCX_Class_Pseudos <opName, VOPC_I1_F32_I32, VOPC_F32_I32>;
 739
 740 multiclass VOPC_CLASS_F64 <string opName> :
 741   VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>;
 742
 743 multiclass VOPCX_CLASS_F64 <string opName> :
 744   VOPCX_Class_Pseudos <opName, VOPC_I1_F64_I32, VOPC_F64_I32>;
 745
 746 // cmp_class ignores the FP mode and faithfully reports the unmodified
 747 // source value.
 748 let ReadsModeReg = 0, mayRaiseFPException = 0 in {
 749 defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">;
 750 defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">;
 751 defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">;
 752 defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">;
 753
 754 let SubtargetPredicate = Has16BitInsts in {
 755 defm V_CMP_CLASS_F16  : VOPC_CLASS_F16 <"v_cmp_class_f16">;
 756 defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">;
 757 }
 758 } // End ReadsModeReg = 0, mayRaiseFPException = 0
 759
 760 //===----------------------------------------------------------------------===//
 761 // V_ICMPIntrinsic Pattern.
 762 //===----------------------------------------------------------------------===//
 763
 764 // We need to use COPY_TO_REGCLASS to w/a the problem when ReplaceAllUsesWith()
 765 // complaints it cannot replace i1 <-> i64/i32 if node was not morphed in place.
 766 multiclass ICMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> {
 767   let WaveSizePredicate = isWave64 in
 768   def : GCNPat <
 769     (i64 (AMDGPUsetcc vt:$src0, vt:$src1, cond)),
 770     (i64 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_64))
 771   >;
 772
 773   let WaveSizePredicate = isWave32 in
 774   def : GCNPat <
 775     (i32 (AMDGPUsetcc vt:$src0, vt:$src1, cond)),
 776     (i32 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_32))
 777   >;
 778 }
 779
 780 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;
 781 defm : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>;
 782 defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>;
 783 defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>;
 784 defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>;
 785 defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>;
 786 defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>;
 787 defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>;
 788 defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>;
 789 defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>;
 790
 791 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;
 792 defm : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>;
 793 defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>;
 794 defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>;
 795 defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>;
 796 defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>;
 797 defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>;
 798 defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>;
 799 defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>;
 800 defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>;
 801
 802 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>;
 803 defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_e64, i16>;
 804 defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_e64, i16>;
 805 defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_e64, i16>;
 806 defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_e64, i16>;
 807 defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_e64, i16>;
 808 defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_e64, i16>;
 809 defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_e64, i16>;
 810 defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_e64, i16>;
 811 defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_e64, i16>;
 812
 813 multiclass FCMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> {
 814   let WaveSizePredicate = isWave64 in
 815   def : GCNPat <
 816     (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)),
 817                  (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)),
 818     (i64 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1,
 819                            DSTCLAMP.NONE), SReg_64))
 820   >;
 821
 822   let WaveSizePredicate = isWave32 in
 823   def : GCNPat <
 824     (i32 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)),
 825                  (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)),
 826     (i32 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1,
 827                            DSTCLAMP.NONE), SReg_32))
 828   >;
 829 }
 830
 831 defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>;
 832 defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>;
 833 defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>;
 834 defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>;
 835 defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>;
 836 defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>;
 837
 838 defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>;
 839 defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>;
 840 defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>;
 841 defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>;
 842 defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>;
 843 defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>;
 844
 845 defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_e64, f16>;
 846 defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_e64, f16>;
 847 defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_e64, f16>;
 848 defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_e64, f16>;
 849 defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_e64, f16>;
 850 defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_e64, f16>;
 851
 852
 853 defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>;
 854 defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>;
 855 defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>;
 856 defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>;
 857 defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>;
 858 defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>;
 859
 860 defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>;
 861 defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>;
 862 defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>;
 863 defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>;
 864 defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>;
 865 defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>;
 866
 867 defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_e64, f16>;
 868 defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_e64, f16>;
 869 defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_e64, f16>;
 870 defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_e64, f16>;
 871 defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_e64, f16>;
 872 defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_e64, f16>;
 873
 874 //===----------------------------------------------------------------------===//
 875 // Target-specific instruction encodings.
 876 //===----------------------------------------------------------------------===//
 877
 878 //===----------------------------------------------------------------------===//
 879 // GFX10.
 880 //===----------------------------------------------------------------------===//
 881
 882 let AssemblerPredicate = isGFX10Plus in {
 883   multiclass VOPC_Real_gfx10<bits<9> op> {
 884     let DecoderNamespace = "GFX10" in {
 885       def _e32_gfx10 :
 886         VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX10>,
 887         VOPCe<op{7-0}>;
 888       def _e64_gfx10 :
 889         VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX10>,
 890         VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {
 891         // Encoding used for VOPC instructions encoded as VOP3 differs from
 892         // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.
 893         bits<8> sdst;
 894         let Inst{7-0} = sdst;
 895       }
 896     } // End DecoderNamespace = "GFX10"
 897
 898     foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in
 899     def _sdwa_gfx10 :
 900       VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,
 901       VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;
 902
 903     defm : VOPCInstAliases<NAME, "gfx10">;
 904   }
 905
 906   multiclass VOPCX_Real_gfx10<bits<9> op> {
 907     let DecoderNamespace = "GFX10" in {
 908       def _e32_gfx10 :
 909         VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32"), SIEncodingFamily.GFX10>,
 910         VOPCe<op{7-0}> {
 911           let AsmString = !subst("_nosdst", "", !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").PseudoInstr)
 912                           # " " # !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").AsmOperands;
 913         }
 914
 915       def _e64_gfx10 :
 916         VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_nosdst_e64"), SIEncodingFamily.GFX10>,
 917         VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Pfl> {
 918           let Inst{7-0} = ?; // sdst
 919           let AsmString = !subst("_nosdst", "", !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Mnemonic)
 920                           # "{_e64} " # !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").AsmOperands;
 921         }
 922     } // End DecoderNamespace = "GFX10"
 923
 924     foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32").Pfl.HasExtSDWA9>.ret in
 925     def _sdwa_gfx10 :
 926       VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa")>,
 927       VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Pfl> {
 928         let AsmString = !subst("_nosdst", "", !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Mnemonic)
 929                         # "{_sdwa} " # !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").AsmOperands9;
 930       }
 931
 932     defm : VOPCXInstAliases<NAME, "gfx10">;
 933   }
 934 } // End AssemblerPredicate = isGFX10Plus
 935
 936 defm V_CMP_LT_I16     : VOPC_Real_gfx10<0x089>;
 937 defm V_CMP_EQ_I16     : VOPC_Real_gfx10<0x08a>;
 938 defm V_CMP_LE_I16     : VOPC_Real_gfx10<0x08b>;
 939 defm V_CMP_GT_I16     : VOPC_Real_gfx10<0x08c>;
 940 defm V_CMP_NE_I16     : VOPC_Real_gfx10<0x08d>;
 941 defm V_CMP_GE_I16     : VOPC_Real_gfx10<0x08e>;
 942 defm V_CMP_CLASS_F16  : VOPC_Real_gfx10<0x08f>;
 943 defm V_CMPX_LT_I16    : VOPCX_Real_gfx10<0x099>;
 944 defm V_CMPX_EQ_I16    : VOPCX_Real_gfx10<0x09a>;
 945 defm V_CMPX_LE_I16    : VOPCX_Real_gfx10<0x09b>;
 946 defm V_CMPX_GT_I16    : VOPCX_Real_gfx10<0x09c>;
 947 defm V_CMPX_NE_I16    : VOPCX_Real_gfx10<0x09d>;
 948 defm V_CMPX_GE_I16    : VOPCX_Real_gfx10<0x09e>;
 949 defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx10<0x09f>;
 950 defm V_CMP_LT_U16     : VOPC_Real_gfx10<0x0a9>;
 951 defm V_CMP_EQ_U16     : VOPC_Real_gfx10<0x0aa>;
 952 defm V_CMP_LE_U16     : VOPC_Real_gfx10<0x0ab>;
 953 defm V_CMP_GT_U16     : VOPC_Real_gfx10<0x0ac>;
 954 defm V_CMP_NE_U16     : VOPC_Real_gfx10<0x0ad>;
 955 defm V_CMP_GE_U16     : VOPC_Real_gfx10<0x0ae>;
 956 defm V_CMPX_LT_U16    : VOPCX_Real_gfx10<0x0b9>;
 957 defm V_CMPX_EQ_U16    : VOPCX_Real_gfx10<0x0ba>;
 958 defm V_CMPX_LE_U16    : VOPCX_Real_gfx10<0x0bb>;
 959 defm V_CMPX_GT_U16    : VOPCX_Real_gfx10<0x0bc>;
 960 defm V_CMPX_NE_U16    : VOPCX_Real_gfx10<0x0bd>;
 961 defm V_CMPX_GE_U16    : VOPCX_Real_gfx10<0x0be>;
 962 defm V_CMP_F_F16      : VOPC_Real_gfx10<0x0c8>;
 963 defm V_CMP_LT_F16     : VOPC_Real_gfx10<0x0c9>;
 964 defm V_CMP_EQ_F16     : VOPC_Real_gfx10<0x0ca>;
 965 defm V_CMP_LE_F16     : VOPC_Real_gfx10<0x0cb>;
 966 defm V_CMP_GT_F16     : VOPC_Real_gfx10<0x0cc>;
 967 defm V_CMP_LG_F16     : VOPC_Real_gfx10<0x0cd>;
 968 defm V_CMP_GE_F16     : VOPC_Real_gfx10<0x0ce>;
 969 defm V_CMP_O_F16      : VOPC_Real_gfx10<0x0cf>;
 970 defm V_CMPX_F_F16     : VOPCX_Real_gfx10<0x0d8>;
 971 defm V_CMPX_LT_F16    : VOPCX_Real_gfx10<0x0d9>;
 972 defm V_CMPX_EQ_F16    : VOPCX_Real_gfx10<0x0da>;
 973 defm V_CMPX_LE_F16    : VOPCX_Real_gfx10<0x0db>;
 974 defm V_CMPX_GT_F16    : VOPCX_Real_gfx10<0x0dc>;
 975 defm V_CMPX_LG_F16    : VOPCX_Real_gfx10<0x0dd>;
 976 defm V_CMPX_GE_F16    : VOPCX_Real_gfx10<0x0de>;
 977 defm V_CMPX_O_F16     : VOPCX_Real_gfx10<0x0df>;
 978 defm V_CMP_U_F16      : VOPC_Real_gfx10<0x0e8>;
 979 defm V_CMP_NGE_F16    : VOPC_Real_gfx10<0x0e9>;
 980 defm V_CMP_NLG_F16    : VOPC_Real_gfx10<0x0ea>;
 981 defm V_CMP_NGT_F16    : VOPC_Real_gfx10<0x0eb>;
 982 defm V_CMP_NLE_F16    : VOPC_Real_gfx10<0x0ec>;
 983 defm V_CMP_NEQ_F16    : VOPC_Real_gfx10<0x0ed>;
 984 defm V_CMP_NLT_F16    : VOPC_Real_gfx10<0x0ee>;
 985 defm V_CMP_TRU_F16    : VOPC_Real_gfx10<0x0ef>;
 986 defm V_CMPX_U_F16     : VOPCX_Real_gfx10<0x0f8>;
 987 defm V_CMPX_NGE_F16   : VOPCX_Real_gfx10<0x0f9>;
 988 defm V_CMPX_NLG_F16   : VOPCX_Real_gfx10<0x0fa>;
 989 defm V_CMPX_NGT_F16   : VOPCX_Real_gfx10<0x0fb>;
 990 defm V_CMPX_NLE_F16   : VOPCX_Real_gfx10<0x0fc>;
 991 defm V_CMPX_NEQ_F16   : VOPCX_Real_gfx10<0x0fd>;
 992 defm V_CMPX_NLT_F16   : VOPCX_Real_gfx10<0x0fe>;
 993 defm V_CMPX_TRU_F16   : VOPCX_Real_gfx10<0x0ff>;
 994
 995 //===----------------------------------------------------------------------===//
 996 // GFX6, GFX7, GFX10.
 997 //===----------------------------------------------------------------------===//
 998
 999 let AssemblerPredicate = isGFX6GFX7 in {
1000   multiclass VOPC_Real_gfx6_gfx7<bits<9> op> {
1001     let DecoderNamespace = "GFX6GFX7" in {
1002       def _e32_gfx6_gfx7 :
1003         VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,
1004         VOPCe<op{7-0}>;
1005       def _e64_gfx6_gfx7 :
1006         VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
1007         VOP3a_gfx6_gfx7<op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {
1008         // Encoding used for VOPC instructions encoded as VOP3 differs from
1009         // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.
1010         bits<8> sdst;
1011         let Inst{7-0} = sdst;
1012       }
1013     } // End DecoderNamespace = "GFX6GFX7"
1014
1015     defm : VOPCInstAliases<NAME, "gfx6_gfx7">;
1016   }
1017 } // End AssemblerPredicate = isGFX6GFX7
1018
1019 multiclass VOPC_Real_gfx6_gfx7_gfx10<bits<9> op> :
1020   VOPC_Real_gfx6_gfx7<op>, VOPC_Real_gfx10<op>;
1021
1022 multiclass VOPCX_Real_gfx6_gfx7<bits<9> op> :
1023   VOPC_Real_gfx6_gfx7<op>;
1024
1025 multiclass VOPCX_Real_gfx6_gfx7_gfx10 <bits<9> op> :
1026   VOPC_Real_gfx6_gfx7<op>, VOPCX_Real_gfx10<op>;
1027
1028 defm V_CMP_F_F32      : VOPC_Real_gfx6_gfx7_gfx10<0x000>;
1029 defm V_CMP_LT_F32     : VOPC_Real_gfx6_gfx7_gfx10<0x001>;
1030 defm V_CMP_EQ_F32     : VOPC_Real_gfx6_gfx7_gfx10<0x002>;
1031 defm V_CMP_LE_F32     : VOPC_Real_gfx6_gfx7_gfx10<0x003>;
1032 defm V_CMP_GT_F32     : VOPC_Real_gfx6_gfx7_gfx10<0x004>;
1033 defm V_CMP_LG_F32     : VOPC_Real_gfx6_gfx7_gfx10<0x005>;
1034 defm V_CMP_GE_F32     : VOPC_Real_gfx6_gfx7_gfx10<0x006>;
1035 defm V_CMP_O_F32      : VOPC_Real_gfx6_gfx7_gfx10<0x007>;
1036 defm V_CMP_U_F32      : VOPC_Real_gfx6_gfx7_gfx10<0x008>;
1037 defm V_CMP_NGE_F32    : VOPC_Real_gfx6_gfx7_gfx10<0x009>;
1038 defm V_CMP_NLG_F32    : VOPC_Real_gfx6_gfx7_gfx10<0x00a>;
1039 defm V_CMP_NGT_F32    : VOPC_Real_gfx6_gfx7_gfx10<0x00b>;
1040 defm V_CMP_NLE_F32    : VOPC_Real_gfx6_gfx7_gfx10<0x00c>;
1041 defm V_CMP_NEQ_F32    : VOPC_Real_gfx6_gfx7_gfx10<0x00d>;
1042 defm V_CMP_NLT_F32    : VOPC_Real_gfx6_gfx7_gfx10<0x00e>;
1043 defm V_CMP_TRU_F32    : VOPC_Real_gfx6_gfx7_gfx10<0x00f>;
1044 defm V_CMPX_F_F32     : VOPCX_Real_gfx6_gfx7_gfx10<0x010>;
1045 defm V_CMPX_LT_F32    : VOPCX_Real_gfx6_gfx7_gfx10<0x011>;
1046 defm V_CMPX_EQ_F32    : VOPCX_Real_gfx6_gfx7_gfx10<0x012>;
1047 defm V_CMPX_LE_F32    : VOPCX_Real_gfx6_gfx7_gfx10<0x013>;
1048 defm V_CMPX_GT_F32    : VOPCX_Real_gfx6_gfx7_gfx10<0x014>;
1049 defm V_CMPX_LG_F32    : VOPCX_Real_gfx6_gfx7_gfx10<0x015>;
1050 defm V_CMPX_GE_F32    : VOPCX_Real_gfx6_gfx7_gfx10<0x016>;
1051 defm V_CMPX_O_F32     : VOPCX_Real_gfx6_gfx7_gfx10<0x017>;
1052 defm V_CMPX_U_F32     : VOPCX_Real_gfx6_gfx7_gfx10<0x018>;
1053 defm V_CMPX_NGE_F32   : VOPCX_Real_gfx6_gfx7_gfx10<0x019>;
1054 defm V_CMPX_NLG_F32   : VOPCX_Real_gfx6_gfx7_gfx10<0x01a>;
1055 defm V_CMPX_NGT_F32   : VOPCX_Real_gfx6_gfx7_gfx10<0x01b>;
1056 defm V_CMPX_NLE_F32   : VOPCX_Real_gfx6_gfx7_gfx10<0x01c>;
1057 defm V_CMPX_NEQ_F32   : VOPCX_Real_gfx6_gfx7_gfx10<0x01d>;
1058 defm V_CMPX_NLT_F32   : VOPCX_Real_gfx6_gfx7_gfx10<0x01e>;
1059 defm V_CMPX_TRU_F32   : VOPCX_Real_gfx6_gfx7_gfx10<0x01f>;
1060 defm V_CMP_F_F64      : VOPC_Real_gfx6_gfx7_gfx10<0x020>;
1061 defm V_CMP_LT_F64     : VOPC_Real_gfx6_gfx7_gfx10<0x021>;
1062 defm V_CMP_EQ_F64     : VOPC_Real_gfx6_gfx7_gfx10<0x022>;
1063 defm V_CMP_LE_F64     : VOPC_Real_gfx6_gfx7_gfx10<0x023>;
1064 defm V_CMP_GT_F64     : VOPC_Real_gfx6_gfx7_gfx10<0x024>;
1065 defm V_CMP_LG_F64     : VOPC_Real_gfx6_gfx7_gfx10<0x025>;
1066 defm V_CMP_GE_F64     : VOPC_Real_gfx6_gfx7_gfx10<0x026>;
1067 defm V_CMP_O_F64      : VOPC_Real_gfx6_gfx7_gfx10<0x027>;
1068 defm V_CMP_U_F64      : VOPC_Real_gfx6_gfx7_gfx10<0x028>;
1069 defm V_CMP_NGE_F64    : VOPC_Real_gfx6_gfx7_gfx10<0x029>;
1070 defm V_CMP_NLG_F64    : VOPC_Real_gfx6_gfx7_gfx10<0x02a>;
1071 defm V_CMP_NGT_F64    : VOPC_Real_gfx6_gfx7_gfx10<0x02b>;
1072 defm V_CMP_NLE_F64    : VOPC_Real_gfx6_gfx7_gfx10<0x02c>;
1073 defm V_CMP_NEQ_F64    : VOPC_Real_gfx6_gfx7_gfx10<0x02d>;
1074 defm V_CMP_NLT_F64    : VOPC_Real_gfx6_gfx7_gfx10<0x02e>;
1075 defm V_CMP_TRU_F64    : VOPC_Real_gfx6_gfx7_gfx10<0x02f>;
1076 defm V_CMPX_F_F64     : VOPCX_Real_gfx6_gfx7_gfx10<0x030>;
1077 defm V_CMPX_LT_F64    : VOPCX_Real_gfx6_gfx7_gfx10<0x031>;
1078 defm V_CMPX_EQ_F64    : VOPCX_Real_gfx6_gfx7_gfx10<0x032>;
1079 defm V_CMPX_LE_F64    : VOPCX_Real_gfx6_gfx7_gfx10<0x033>;
1080 defm V_CMPX_GT_F64    : VOPCX_Real_gfx6_gfx7_gfx10<0x034>;
1081 defm V_CMPX_LG_F64    : VOPCX_Real_gfx6_gfx7_gfx10<0x035>;
1082 defm V_CMPX_GE_F64    : VOPCX_Real_gfx6_gfx7_gfx10<0x036>;
1083 defm V_CMPX_O_F64     : VOPCX_Real_gfx6_gfx7_gfx10<0x037>;
1084 defm V_CMPX_U_F64     : VOPCX_Real_gfx6_gfx7_gfx10<0x038>;
1085 defm V_CMPX_NGE_F64   : VOPCX_Real_gfx6_gfx7_gfx10<0x039>;
1086 defm V_CMPX_NLG_F64   : VOPCX_Real_gfx6_gfx7_gfx10<0x03a>;
1087 defm V_CMPX_NGT_F64   : VOPCX_Real_gfx6_gfx7_gfx10<0x03b>;
1088 defm V_CMPX_NLE_F64   : VOPCX_Real_gfx6_gfx7_gfx10<0x03c>;
1089 defm V_CMPX_NEQ_F64   : VOPCX_Real_gfx6_gfx7_gfx10<0x03d>;
1090 defm V_CMPX_NLT_F64   : VOPCX_Real_gfx6_gfx7_gfx10<0x03e>;
1091 defm V_CMPX_TRU_F64   : VOPCX_Real_gfx6_gfx7_gfx10<0x03f>;
1092 defm V_CMPS_F_F32     : VOPC_Real_gfx6_gfx7<0x040>;
1093 defm V_CMPS_LT_F32    : VOPC_Real_gfx6_gfx7<0x041>;
1094 defm V_CMPS_EQ_F32    : VOPC_Real_gfx6_gfx7<0x042>;
1095 defm V_CMPS_LE_F32    : VOPC_Real_gfx6_gfx7<0x043>;
1096 defm V_CMPS_GT_F32    : VOPC_Real_gfx6_gfx7<0x044>;
1097 defm V_CMPS_LG_F32    : VOPC_Real_gfx6_gfx7<0x045>;
1098 defm V_CMPS_GE_F32    : VOPC_Real_gfx6_gfx7<0x046>;
1099 defm V_CMPS_O_F32     : VOPC_Real_gfx6_gfx7<0x047>;
1100 defm V_CMPS_U_F32     : VOPC_Real_gfx6_gfx7<0x048>;
1101 defm V_CMPS_NGE_F32   : VOPC_Real_gfx6_gfx7<0x049>;
1102 defm V_CMPS_NLG_F32   : VOPC_Real_gfx6_gfx7<0x04a>;
1103 defm V_CMPS_NGT_F32   : VOPC_Real_gfx6_gfx7<0x04b>;
1104 defm V_CMPS_NLE_F32   : VOPC_Real_gfx6_gfx7<0x04c>;
1105 defm V_CMPS_NEQ_F32   : VOPC_Real_gfx6_gfx7<0x04d>;
1106 defm V_CMPS_NLT_F32   : VOPC_Real_gfx6_gfx7<0x04e>;
1107 defm V_CMPS_TRU_F32   : VOPC_Real_gfx6_gfx7<0x04f>;
1108 defm V_CMPSX_F_F32    : VOPCX_Real_gfx6_gfx7<0x050>;
1109 defm V_CMPSX_LT_F32   : VOPCX_Real_gfx6_gfx7<0x051>;
1110 defm V_CMPSX_EQ_F32   : VOPCX_Real_gfx6_gfx7<0x052>;
1111 defm V_CMPSX_LE_F32   : VOPCX_Real_gfx6_gfx7<0x053>;
1112 defm V_CMPSX_GT_F32   : VOPCX_Real_gfx6_gfx7<0x054>;
1113 defm V_CMPSX_LG_F32   : VOPCX_Real_gfx6_gfx7<0x055>;
1114 defm V_CMPSX_GE_F32   : VOPCX_Real_gfx6_gfx7<0x056>;
1115 defm V_CMPSX_O_F32    : VOPCX_Real_gfx6_gfx7<0x057>;
1116 defm V_CMPSX_U_F32    : VOPCX_Real_gfx6_gfx7<0x058>;
1117 defm V_CMPSX_NGE_F32  : VOPCX_Real_gfx6_gfx7<0x059>;
1118 defm V_CMPSX_NLG_F32  : VOPCX_Real_gfx6_gfx7<0x05a>;
1119 defm V_CMPSX_NGT_F32  : VOPCX_Real_gfx6_gfx7<0x05b>;
1120 defm V_CMPSX_NLE_F32  : VOPCX_Real_gfx6_gfx7<0x05c>;
1121 defm V_CMPSX_NEQ_F32  : VOPCX_Real_gfx6_gfx7<0x05d>;
1122 defm V_CMPSX_NLT_F32  : VOPCX_Real_gfx6_gfx7<0x05e>;
1123 defm V_CMPSX_TRU_F32  : VOPCX_Real_gfx6_gfx7<0x05f>;
1124 defm V_CMPS_F_F64     : VOPC_Real_gfx6_gfx7<0x060>;
1125 defm V_CMPS_LT_F64    : VOPC_Real_gfx6_gfx7<0x061>;
1126 defm V_CMPS_EQ_F64    : VOPC_Real_gfx6_gfx7<0x062>;
1127 defm V_CMPS_LE_F64    : VOPC_Real_gfx6_gfx7<0x063>;
1128 defm V_CMPS_GT_F64    : VOPC_Real_gfx6_gfx7<0x064>;
1129 defm V_CMPS_LG_F64    : VOPC_Real_gfx6_gfx7<0x065>;
1130 defm V_CMPS_GE_F64    : VOPC_Real_gfx6_gfx7<0x066>;
1131 defm V_CMPS_O_F64     : VOPC_Real_gfx6_gfx7<0x067>;
1132 defm V_CMPS_U_F64     : VOPC_Real_gfx6_gfx7<0x068>;
1133 defm V_CMPS_NGE_F64   : VOPC_Real_gfx6_gfx7<0x069>;
1134 defm V_CMPS_NLG_F64   : VOPC_Real_gfx6_gfx7<0x06a>;
1135 defm V_CMPS_NGT_F64   : VOPC_Real_gfx6_gfx7<0x06b>;
1136 defm V_CMPS_NLE_F64   : VOPC_Real_gfx6_gfx7<0x06c>;
1137 defm V_CMPS_NEQ_F64   : VOPC_Real_gfx6_gfx7<0x06d>;
1138 defm V_CMPS_NLT_F64   : VOPC_Real_gfx6_gfx7<0x06e>;
1139 defm V_CMPS_TRU_F64   : VOPC_Real_gfx6_gfx7<0x06f>;
1140 defm V_CMPSX_F_F64    : VOPCX_Real_gfx6_gfx7<0x070>;
1141 defm V_CMPSX_LT_F64   : VOPCX_Real_gfx6_gfx7<0x071>;
1142 defm V_CMPSX_EQ_F64   : VOPCX_Real_gfx6_gfx7<0x072>;
1143 defm V_CMPSX_LE_F64   : VOPCX_Real_gfx6_gfx7<0x073>;
1144 defm V_CMPSX_GT_F64   : VOPCX_Real_gfx6_gfx7<0x074>;
1145 defm V_CMPSX_LG_F64   : VOPCX_Real_gfx6_gfx7<0x075>;
1146 defm V_CMPSX_GE_F64   : VOPCX_Real_gfx6_gfx7<0x076>;
1147 defm V_CMPSX_O_F64    : VOPCX_Real_gfx6_gfx7<0x077>;
1148 defm V_CMPSX_U_F64    : VOPCX_Real_gfx6_gfx7<0x078>;
1149 defm V_CMPSX_NGE_F64  : VOPCX_Real_gfx6_gfx7<0x079>;
1150 defm V_CMPSX_NLG_F64  : VOPCX_Real_gfx6_gfx7<0x07a>;
1151 defm V_CMPSX_NGT_F64  : VOPCX_Real_gfx6_gfx7<0x07b>;
1152 defm V_CMPSX_NLE_F64  : VOPCX_Real_gfx6_gfx7<0x07c>;
1153 defm V_CMPSX_NEQ_F64  : VOPCX_Real_gfx6_gfx7<0x07d>;
1154 defm V_CMPSX_NLT_F64  : VOPCX_Real_gfx6_gfx7<0x07e>;
1155 defm V_CMPSX_TRU_F64  : VOPCX_Real_gfx6_gfx7<0x07f>;
1156 defm V_CMP_F_I32      : VOPC_Real_gfx6_gfx7_gfx10<0x080>;
1157 defm V_CMP_LT_I32     : VOPC_Real_gfx6_gfx7_gfx10<0x081>;
1158 defm V_CMP_EQ_I32     : VOPC_Real_gfx6_gfx7_gfx10<0x082>;
1159 defm V_CMP_LE_I32     : VOPC_Real_gfx6_gfx7_gfx10<0x083>;
1160 defm V_CMP_GT_I32     : VOPC_Real_gfx6_gfx7_gfx10<0x084>;
1161 defm V_CMP_NE_I32     : VOPC_Real_gfx6_gfx7_gfx10<0x085>;
1162 defm V_CMP_GE_I32     : VOPC_Real_gfx6_gfx7_gfx10<0x086>;
1163 defm V_CMP_T_I32      : VOPC_Real_gfx6_gfx7_gfx10<0x087>;
1164 defm V_CMP_CLASS_F32  : VOPC_Real_gfx6_gfx7_gfx10<0x088>;
1165 defm V_CMPX_F_I32     : VOPCX_Real_gfx6_gfx7_gfx10<0x090>;
1166 defm V_CMPX_LT_I32    : VOPCX_Real_gfx6_gfx7_gfx10<0x091>;
1167 defm V_CMPX_EQ_I32    : VOPCX_Real_gfx6_gfx7_gfx10<0x092>;
1168 defm V_CMPX_LE_I32    : VOPCX_Real_gfx6_gfx7_gfx10<0x093>;
1169 defm V_CMPX_GT_I32    : VOPCX_Real_gfx6_gfx7_gfx10<0x094>;
1170 defm V_CMPX_NE_I32    : VOPCX_Real_gfx6_gfx7_gfx10<0x095>;
1171 defm V_CMPX_GE_I32    : VOPCX_Real_gfx6_gfx7_gfx10<0x096>;
1172 defm V_CMPX_T_I32     : VOPCX_Real_gfx6_gfx7_gfx10<0x097>;
1173 defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x098>;
1174 defm V_CMP_F_I64      : VOPC_Real_gfx6_gfx7_gfx10<0x0a0>;
1175 defm V_CMP_LT_I64     : VOPC_Real_gfx6_gfx7_gfx10<0x0a1>;
1176 defm V_CMP_EQ_I64     : VOPC_Real_gfx6_gfx7_gfx10<0x0a2>;
1177 defm V_CMP_LE_I64     : VOPC_Real_gfx6_gfx7_gfx10<0x0a3>;
1178 defm V_CMP_GT_I64     : VOPC_Real_gfx6_gfx7_gfx10<0x0a4>;
1179 defm V_CMP_NE_I64     : VOPC_Real_gfx6_gfx7_gfx10<0x0a5>;
1180 defm V_CMP_GE_I64     : VOPC_Real_gfx6_gfx7_gfx10<0x0a6>;
1181 defm V_CMP_T_I64      : VOPC_Real_gfx6_gfx7_gfx10<0x0a7>;
1182 defm V_CMP_CLASS_F64  : VOPC_Real_gfx6_gfx7_gfx10<0x0a8>;
1183 defm V_CMPX_F_I64     : VOPCX_Real_gfx6_gfx7_gfx10<0x0b0>;
1184 defm V_CMPX_LT_I64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0b1>;
1185 defm V_CMPX_EQ_I64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0b2>;
1186 defm V_CMPX_LE_I64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0b3>;
1187 defm V_CMPX_GT_I64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0b4>;
1188 defm V_CMPX_NE_I64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0b5>;
1189 defm V_CMPX_GE_I64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0b6>;
1190 defm V_CMPX_T_I64     : VOPCX_Real_gfx6_gfx7_gfx10<0x0b7>;
1191 defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b8>;
1192 defm V_CMP_F_U32      : VOPC_Real_gfx6_gfx7_gfx10<0x0c0>;
1193 defm V_CMP_LT_U32     : VOPC_Real_gfx6_gfx7_gfx10<0x0c1>;
1194 defm V_CMP_EQ_U32     : VOPC_Real_gfx6_gfx7_gfx10<0x0c2>;
1195 defm V_CMP_LE_U32     : VOPC_Real_gfx6_gfx7_gfx10<0x0c3>;
1196 defm V_CMP_GT_U32     : VOPC_Real_gfx6_gfx7_gfx10<0x0c4>;
1197 defm V_CMP_NE_U32     : VOPC_Real_gfx6_gfx7_gfx10<0x0c5>;
1198 defm V_CMP_GE_U32     : VOPC_Real_gfx6_gfx7_gfx10<0x0c6>;
1199 defm V_CMP_T_U32      : VOPC_Real_gfx6_gfx7_gfx10<0x0c7>;
1200 defm V_CMPX_F_U32     : VOPCX_Real_gfx6_gfx7_gfx10<0x0d0>;
1201 defm V_CMPX_LT_U32    : VOPCX_Real_gfx6_gfx7_gfx10<0x0d1>;
1202 defm V_CMPX_EQ_U32    : VOPCX_Real_gfx6_gfx7_gfx10<0x0d2>;
1203 defm V_CMPX_LE_U32    : VOPCX_Real_gfx6_gfx7_gfx10<0x0d3>;
1204 defm V_CMPX_GT_U32    : VOPCX_Real_gfx6_gfx7_gfx10<0x0d4>;
1205 defm V_CMPX_NE_U32    : VOPCX_Real_gfx6_gfx7_gfx10<0x0d5>;
1206 defm V_CMPX_GE_U32    : VOPCX_Real_gfx6_gfx7_gfx10<0x0d6>;
1207 defm V_CMPX_T_U32     : VOPCX_Real_gfx6_gfx7_gfx10<0x0d7>;
1208 defm V_CMP_F_U64      : VOPC_Real_gfx6_gfx7_gfx10<0x0e0>;
1209 defm V_CMP_LT_U64     : VOPC_Real_gfx6_gfx7_gfx10<0x0e1>;
1210 defm V_CMP_EQ_U64     : VOPC_Real_gfx6_gfx7_gfx10<0x0e2>;
1211 defm V_CMP_LE_U64     : VOPC_Real_gfx6_gfx7_gfx10<0x0e3>;
1212 defm V_CMP_GT_U64     : VOPC_Real_gfx6_gfx7_gfx10<0x0e4>;
1213 defm V_CMP_NE_U64     : VOPC_Real_gfx6_gfx7_gfx10<0x0e5>;
1214 defm V_CMP_GE_U64     : VOPC_Real_gfx6_gfx7_gfx10<0x0e6>;
1215 defm V_CMP_T_U64      : VOPC_Real_gfx6_gfx7_gfx10<0x0e7>;
1216 defm V_CMPX_F_U64     : VOPCX_Real_gfx6_gfx7_gfx10<0x0f0>;
1217 defm V_CMPX_LT_U64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0f1>;
1218 defm V_CMPX_EQ_U64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0f2>;
1219 defm V_CMPX_LE_U64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0f3>;
1220 defm V_CMPX_GT_U64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0f4>;
1221 defm V_CMPX_NE_U64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0f5>;
1222 defm V_CMPX_GE_U64    : VOPCX_Real_gfx6_gfx7_gfx10<0x0f6>;
1223 defm V_CMPX_T_U64     : VOPCX_Real_gfx6_gfx7_gfx10<0x0f7>;
1224
1225 //===----------------------------------------------------------------------===//
1226 // GFX8, GFX9 (VI).
1227 //===----------------------------------------------------------------------===//
1228
1229 multiclass VOPC_Real_vi <bits<10> op> {
1230   let AssemblerPredicate = isGFX8GFX9, DecoderNamespace = "GFX8" in {
1231     def _e32_vi :
1232       VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>,
1233       VOPCe<op{7-0}>;
1234
1235     def _e64_vi :
1236       VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
1237       VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {
1238       // Encoding used for VOPC instructions encoded as VOP3
1239       // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst
1240       bits<8> sdst;
1241       let Inst{7-0} = sdst;
1242     }
1243   }
1244
1245   foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA>.ret in
1246   def _sdwa_vi :
1247     VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,
1248     VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;
1249
1250   foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in
1251   def _sdwa_gfx9 :
1252     VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,
1253     VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;
1254
1255   let AssemblerPredicate = isGFX8GFX9 in {
1256     defm : VOPCInstAliases<NAME, "vi">;
1257   }
1258 }
1259
1260 defm V_CMP_CLASS_F32  : VOPC_Real_vi <0x10>;
1261 defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>;
1262 defm V_CMP_CLASS_F64  : VOPC_Real_vi <0x12>;
1263 defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>;
1264 defm V_CMP_CLASS_F16  : VOPC_Real_vi <0x14>;
1265 defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>;
1266
1267 defm V_CMP_F_F16      : VOPC_Real_vi <0x20>;
1268 defm V_CMP_LT_F16     : VOPC_Real_vi <0x21>;
1269 defm V_CMP_EQ_F16     : VOPC_Real_vi <0x22>;
1270 defm V_CMP_LE_F16     : VOPC_Real_vi <0x23>;
1271 defm V_CMP_GT_F16     : VOPC_Real_vi <0x24>;
1272 defm V_CMP_LG_F16     : VOPC_Real_vi <0x25>;
1273 defm V_CMP_GE_F16     : VOPC_Real_vi <0x26>;
1274 defm V_CMP_O_F16      : VOPC_Real_vi <0x27>;
1275 defm V_CMP_U_F16      : VOPC_Real_vi <0x28>;
1276 defm V_CMP_NGE_F16    : VOPC_Real_vi <0x29>;
1277 defm V_CMP_NLG_F16    : VOPC_Real_vi <0x2a>;
1278 defm V_CMP_NGT_F16    : VOPC_Real_vi <0x2b>;
1279 defm V_CMP_NLE_F16    : VOPC_Real_vi <0x2c>;
1280 defm V_CMP_NEQ_F16    : VOPC_Real_vi <0x2d>;
1281 defm V_CMP_NLT_F16    : VOPC_Real_vi <0x2e>;
1282 defm V_CMP_TRU_F16    : VOPC_Real_vi <0x2f>;
1283
1284 defm V_CMPX_F_F16     : VOPC_Real_vi <0x30>;
1285 defm V_CMPX_LT_F16    : VOPC_Real_vi <0x31>;
1286 defm V_CMPX_EQ_F16    : VOPC_Real_vi <0x32>;
1287 defm V_CMPX_LE_F16    : VOPC_Real_vi <0x33>;
1288 defm V_CMPX_GT_F16    : VOPC_Real_vi <0x34>;
1289 defm V_CMPX_LG_F16    : VOPC_Real_vi <0x35>;
1290 defm V_CMPX_GE_F16    : VOPC_Real_vi <0x36>;
1291 defm V_CMPX_O_F16     : VOPC_Real_vi <0x37>;
1292 defm V_CMPX_U_F16     : VOPC_Real_vi <0x38>;
1293 defm V_CMPX_NGE_F16   : VOPC_Real_vi <0x39>;
1294 defm V_CMPX_NLG_F16   : VOPC_Real_vi <0x3a>;
1295 defm V_CMPX_NGT_F16   : VOPC_Real_vi <0x3b>;
1296 defm V_CMPX_NLE_F16   : VOPC_Real_vi <0x3c>;
1297 defm V_CMPX_NEQ_F16   : VOPC_Real_vi <0x3d>;
1298 defm V_CMPX_NLT_F16   : VOPC_Real_vi <0x3e>;
1299 defm V_CMPX_TRU_F16   : VOPC_Real_vi <0x3f>;
1300
1301 defm V_CMP_F_F32      : VOPC_Real_vi <0x40>;
1302 defm V_CMP_LT_F32     : VOPC_Real_vi <0x41>;
1303 defm V_CMP_EQ_F32     : VOPC_Real_vi <0x42>;
1304 defm V_CMP_LE_F32     : VOPC_Real_vi <0x43>;
1305 defm V_CMP_GT_F32     : VOPC_Real_vi <0x44>;
1306 defm V_CMP_LG_F32     : VOPC_Real_vi <0x45>;
1307 defm V_CMP_GE_F32     : VOPC_Real_vi <0x46>;
1308 defm V_CMP_O_F32      : VOPC_Real_vi <0x47>;
1309 defm V_CMP_U_F32      : VOPC_Real_vi <0x48>;
1310 defm V_CMP_NGE_F32    : VOPC_Real_vi <0x49>;
1311 defm V_CMP_NLG_F32    : VOPC_Real_vi <0x4a>;
1312 defm V_CMP_NGT_F32    : VOPC_Real_vi <0x4b>;
1313 defm V_CMP_NLE_F32    : VOPC_Real_vi <0x4c>;
1314 defm V_CMP_NEQ_F32    : VOPC_Real_vi <0x4d>;
1315 defm V_CMP_NLT_F32    : VOPC_Real_vi <0x4e>;
1316 defm V_CMP_TRU_F32    : VOPC_Real_vi <0x4f>;
1317
1318 defm V_CMPX_F_F32     : VOPC_Real_vi <0x50>;
1319 defm V_CMPX_LT_F32    : VOPC_Real_vi <0x51>;
1320 defm V_CMPX_EQ_F32    : VOPC_Real_vi <0x52>;
1321 defm V_CMPX_LE_F32    : VOPC_Real_vi <0x53>;
1322 defm V_CMPX_GT_F32    : VOPC_Real_vi <0x54>;
1323 defm V_CMPX_LG_F32    : VOPC_Real_vi <0x55>;
1324 defm V_CMPX_GE_F32    : VOPC_Real_vi <0x56>;
1325 defm V_CMPX_O_F32     : VOPC_Real_vi <0x57>;
1326 defm V_CMPX_U_F32     : VOPC_Real_vi <0x58>;
1327 defm V_CMPX_NGE_F32   : VOPC_Real_vi <0x59>;
1328 defm V_CMPX_NLG_F32   : VOPC_Real_vi <0x5a>;
1329 defm V_CMPX_NGT_F32   : VOPC_Real_vi <0x5b>;
1330 defm V_CMPX_NLE_F32   : VOPC_Real_vi <0x5c>;
1331 defm V_CMPX_NEQ_F32   : VOPC_Real_vi <0x5d>;
1332 defm V_CMPX_NLT_F32   : VOPC_Real_vi <0x5e>;
1333 defm V_CMPX_TRU_F32   : VOPC_Real_vi <0x5f>;
1334
1335 defm V_CMP_F_F64      : VOPC_Real_vi <0x60>;
1336 defm V_CMP_LT_F64     : VOPC_Real_vi <0x61>;
1337 defm V_CMP_EQ_F64     : VOPC_Real_vi <0x62>;
1338 defm V_CMP_LE_F64     : VOPC_Real_vi <0x63>;
1339 defm V_CMP_GT_F64     : VOPC_Real_vi <0x64>;
1340 defm V_CMP_LG_F64     : VOPC_Real_vi <0x65>;
1341 defm V_CMP_GE_F64     : VOPC_Real_vi <0x66>;
1342 defm V_CMP_O_F64      : VOPC_Real_vi <0x67>;
1343 defm V_CMP_U_F64      : VOPC_Real_vi <0x68>;
1344 defm V_CMP_NGE_F64    : VOPC_Real_vi <0x69>;
1345 defm V_CMP_NLG_F64    : VOPC_Real_vi <0x6a>;
1346 defm V_CMP_NGT_F64    : VOPC_Real_vi <0x6b>;
1347 defm V_CMP_NLE_F64    : VOPC_Real_vi <0x6c>;
1348 defm V_CMP_NEQ_F64    : VOPC_Real_vi <0x6d>;
1349 defm V_CMP_NLT_F64    : VOPC_Real_vi <0x6e>;
1350 defm V_CMP_TRU_F64    : VOPC_Real_vi <0x6f>;
1351
1352 defm V_CMPX_F_F64     : VOPC_Real_vi <0x70>;
1353 defm V_CMPX_LT_F64    : VOPC_Real_vi <0x71>;
1354 defm V_CMPX_EQ_F64    : VOPC_Real_vi <0x72>;
1355 defm V_CMPX_LE_F64    : VOPC_Real_vi <0x73>;
1356 defm V_CMPX_GT_F64    : VOPC_Real_vi <0x74>;
1357 defm V_CMPX_LG_F64    : VOPC_Real_vi <0x75>;
1358 defm V_CMPX_GE_F64    : VOPC_Real_vi <0x76>;
1359 defm V_CMPX_O_F64     : VOPC_Real_vi <0x77>;
1360 defm V_CMPX_U_F64     : VOPC_Real_vi <0x78>;
1361 defm V_CMPX_NGE_F64   : VOPC_Real_vi <0x79>;
1362 defm V_CMPX_NLG_F64   : VOPC_Real_vi <0x7a>;
1363 defm V_CMPX_NGT_F64   : VOPC_Real_vi <0x7b>;
1364 defm V_CMPX_NLE_F64   : VOPC_Real_vi <0x7c>;
1365 defm V_CMPX_NEQ_F64   : VOPC_Real_vi <0x7d>;
1366 defm V_CMPX_NLT_F64   : VOPC_Real_vi <0x7e>;
1367 defm V_CMPX_TRU_F64   : VOPC_Real_vi <0x7f>;
1368
1369 defm V_CMP_F_I16      : VOPC_Real_vi <0xa0>;
1370 defm V_CMP_LT_I16     : VOPC_Real_vi <0xa1>;
1371 defm V_CMP_EQ_I16     : VOPC_Real_vi <0xa2>;
1372 defm V_CMP_LE_I16     : VOPC_Real_vi <0xa3>;
1373 defm V_CMP_GT_I16     : VOPC_Real_vi <0xa4>;
1374 defm V_CMP_NE_I16     : VOPC_Real_vi <0xa5>;
1375 defm V_CMP_GE_I16     : VOPC_Real_vi <0xa6>;
1376 defm V_CMP_T_I16      : VOPC_Real_vi <0xa7>;
1377
1378 defm V_CMP_F_U16      : VOPC_Real_vi <0xa8>;
1379 defm V_CMP_LT_U16     : VOPC_Real_vi <0xa9>;
1380 defm V_CMP_EQ_U16     : VOPC_Real_vi <0xaa>;
1381 defm V_CMP_LE_U16     : VOPC_Real_vi <0xab>;
1382 defm V_CMP_GT_U16     : VOPC_Real_vi <0xac>;
1383 defm V_CMP_NE_U16     : VOPC_Real_vi <0xad>;
1384 defm V_CMP_GE_U16     : VOPC_Real_vi <0xae>;
1385 defm V_CMP_T_U16      : VOPC_Real_vi <0xaf>;
1386
1387 defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>;
1388 defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>;
1389 defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>;
1390 defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>;
1391 defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>;
1392 defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>;
1393 defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>;
1394 defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>;
1395
1396 defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>;
1397 defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>;
1398 defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>;
1399 defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>;
1400 defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>;
1401 defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>;
1402 defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>;
1403 defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>;
1404
1405 defm V_CMP_F_I32      : VOPC_Real_vi <0xc0>;
1406 defm V_CMP_LT_I32     : VOPC_Real_vi <0xc1>;
1407 defm V_CMP_EQ_I32     : VOPC_Real_vi <0xc2>;
1408 defm V_CMP_LE_I32     : VOPC_Real_vi <0xc3>;
1409 defm V_CMP_GT_I32     : VOPC_Real_vi <0xc4>;
1410 defm V_CMP_NE_I32     : VOPC_Real_vi <0xc5>;
1411 defm V_CMP_GE_I32     : VOPC_Real_vi <0xc6>;
1412 defm V_CMP_T_I32      : VOPC_Real_vi <0xc7>;
1413
1414 defm V_CMPX_F_I32     : VOPC_Real_vi <0xd0>;
1415 defm V_CMPX_LT_I32    : VOPC_Real_vi <0xd1>;
1416 defm V_CMPX_EQ_I32    : VOPC_Real_vi <0xd2>;
1417 defm V_CMPX_LE_I32    : VOPC_Real_vi <0xd3>;
1418 defm V_CMPX_GT_I32    : VOPC_Real_vi <0xd4>;
1419 defm V_CMPX_NE_I32    : VOPC_Real_vi <0xd5>;
1420 defm V_CMPX_GE_I32    : VOPC_Real_vi <0xd6>;
1421 defm V_CMPX_T_I32     : VOPC_Real_vi <0xd7>;
1422
1423 defm V_CMP_F_I64      : VOPC_Real_vi <0xe0>;
1424 defm V_CMP_LT_I64     : VOPC_Real_vi <0xe1>;
1425 defm V_CMP_EQ_I64     : VOPC_Real_vi <0xe2>;
1426 defm V_CMP_LE_I64     : VOPC_Real_vi <0xe3>;
1427 defm V_CMP_GT_I64     : VOPC_Real_vi <0xe4>;
1428 defm V_CMP_NE_I64     : VOPC_Real_vi <0xe5>;
1429 defm V_CMP_GE_I64     : VOPC_Real_vi <0xe6>;
1430 defm V_CMP_T_I64      : VOPC_Real_vi <0xe7>;
1431
1432 defm V_CMPX_F_I64     : VOPC_Real_vi <0xf0>;
1433 defm V_CMPX_LT_I64    : VOPC_Real_vi <0xf1>;
1434 defm V_CMPX_EQ_I64    : VOPC_Real_vi <0xf2>;
1435 defm V_CMPX_LE_I64    : VOPC_Real_vi <0xf3>;
1436 defm V_CMPX_GT_I64    : VOPC_Real_vi <0xf4>;
1437 defm V_CMPX_NE_I64    : VOPC_Real_vi <0xf5>;
1438 defm V_CMPX_GE_I64    : VOPC_Real_vi <0xf6>;
1439 defm V_CMPX_T_I64     : VOPC_Real_vi <0xf7>;
1440
1441 defm V_CMP_F_U32      : VOPC_Real_vi <0xc8>;
1442 defm V_CMP_LT_U32     : VOPC_Real_vi <0xc9>;
1443 defm V_CMP_EQ_U32     : VOPC_Real_vi <0xca>;
1444 defm V_CMP_LE_U32     : VOPC_Real_vi <0xcb>;
1445 defm V_CMP_GT_U32     : VOPC_Real_vi <0xcc>;
1446 defm V_CMP_NE_U32     : VOPC_Real_vi <0xcd>;
1447 defm V_CMP_GE_U32     : VOPC_Real_vi <0xce>;
1448 defm V_CMP_T_U32      : VOPC_Real_vi <0xcf>;
1449
1450 defm V_CMPX_F_U32     : VOPC_Real_vi <0xd8>;
1451 defm V_CMPX_LT_U32    : VOPC_Real_vi <0xd9>;
1452 defm V_CMPX_EQ_U32    : VOPC_Real_vi <0xda>;
1453 defm V_CMPX_LE_U32    : VOPC_Real_vi <0xdb>;
1454 defm V_CMPX_GT_U32    : VOPC_Real_vi <0xdc>;
1455 defm V_CMPX_NE_U32    : VOPC_Real_vi <0xdd>;
1456 defm V_CMPX_GE_U32    : VOPC_Real_vi <0xde>;
1457 defm V_CMPX_T_U32     : VOPC_Real_vi <0xdf>;
1458
1459 defm V_CMP_F_U64      : VOPC_Real_vi <0xe8>;
1460 defm V_CMP_LT_U64     : VOPC_Real_vi <0xe9>;
1461 defm V_CMP_EQ_U64     : VOPC_Real_vi <0xea>;
1462 defm V_CMP_LE_U64     : VOPC_Real_vi <0xeb>;
1463 defm V_CMP_GT_U64     : VOPC_Real_vi <0xec>;
1464 defm V_CMP_NE_U64     : VOPC_Real_vi <0xed>;
1465 defm V_CMP_GE_U64     : VOPC_Real_vi <0xee>;
1466 defm V_CMP_T_U64      : VOPC_Real_vi <0xef>;
1467
1468 defm V_CMPX_F_U64     : VOPC_Real_vi <0xf8>;
1469 defm V_CMPX_LT_U64    : VOPC_Real_vi <0xf9>;
1470 defm V_CMPX_EQ_U64    : VOPC_Real_vi <0xfa>;
1471 defm V_CMPX_LE_U64    : VOPC_Real_vi <0xfb>;
1472 defm V_CMPX_GT_U64    : VOPC_Real_vi <0xfc>;
1473 defm V_CMPX_NE_U64    : VOPC_Real_vi <0xfd>;
1474 defm V_CMPX_GE_U64    : VOPC_Real_vi <0xfe>;
1475 defm V_CMPX_T_U64     : VOPC_Real_vi <0xff>;