[ORC] Add std::tuple support to SimplePackedSerialization.
[llvm-project.git] / llvm / lib / Target / ARM / ARMFrameLowering.h
blob9822e2321bb416d8d4c4bf03e86880fae6585f46
1 //===- ARMTargetFrameLowering.h - Define frame lowering for ARM -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H
10 #define LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H
12 #include "llvm/CodeGen/TargetFrameLowering.h"
13 #include "llvm/Support/TypeSize.h"
15 namespace llvm {
17 class ARMSubtarget;
18 class CalleeSavedInfo;
19 class MachineFunction;
21 class ARMFrameLowering : public TargetFrameLowering {
22 protected:
23 const ARMSubtarget &STI;
25 public:
26 explicit ARMFrameLowering(const ARMSubtarget &sti);
28 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
29 /// the function.
30 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
31 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
33 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
34 MachineBasicBlock::iterator MI,
35 ArrayRef<CalleeSavedInfo> CSI,
36 const TargetRegisterInfo *TRI) const override;
38 bool
39 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
40 MachineBasicBlock::iterator MI,
41 MutableArrayRef<CalleeSavedInfo> CSI,
42 const TargetRegisterInfo *TRI) const override;
44 bool keepFramePointer(const MachineFunction &MF) const override;
46 bool enableCalleeSaveSkip(const MachineFunction &MF) const override;
48 bool hasFP(const MachineFunction &MF) const override;
49 bool hasReservedCallFrame(const MachineFunction &MF) const override;
50 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
51 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
52 Register &FrameReg) const override;
53 int ResolveFrameIndexReference(const MachineFunction &MF, int FI,
54 Register &FrameReg, int SPAdj) const;
56 void getCalleeSaves(const MachineFunction &MF,
57 BitVector &SavedRegs) const override;
58 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
59 RegScavenger *RS) const override;
61 void adjustForSegmentedStacks(MachineFunction &MF,
62 MachineBasicBlock &MBB) const override;
64 /// Returns true if the target will correctly handle shrink wrapping.
65 bool enableShrinkWrapping(const MachineFunction &MF) const override;
67 bool isProfitableForNoCSROpt(const Function &F) const override {
68 // The no-CSR optimisation is bad for code size on ARM, because we can save
69 // many registers with a single PUSH/POP pair.
70 return false;
73 bool
74 assignCalleeSavedSpillSlots(MachineFunction &MF,
75 const TargetRegisterInfo *TRI,
76 std::vector<CalleeSavedInfo> &CSI) const override;
78 const SpillSlot *
79 getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
81 private:
82 void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
83 ArrayRef<CalleeSavedInfo> CSI, unsigned StmOpc,
84 unsigned StrOpc, bool NoGap, bool (*Func)(unsigned, bool),
85 unsigned NumAlignedDPRCS2Regs, unsigned MIFlags = 0) const;
86 void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
87 MutableArrayRef<CalleeSavedInfo> CSI, unsigned LdmOpc,
88 unsigned LdrOpc, bool isVarArg, bool NoGap,
89 bool (*Func)(unsigned, bool),
90 unsigned NumAlignedDPRCS2Regs) const;
92 MachineBasicBlock::iterator
93 eliminateCallFramePseudoInstr(MachineFunction &MF,
94 MachineBasicBlock &MBB,
95 MachineBasicBlock::iterator MI) const override;
98 } // end namespace llvm
100 #endif // LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H