llvm/lib/Target/AVR/AVRFrameLowering.cpp

   1 //===-- AVRFrameLowering.cpp - AVR Frame Information ----------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file contains the AVR implementation of TargetFrameLowering class.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "AVRFrameLowering.h"
  14
  15 #include "AVR.h"
  16 #include "AVRInstrInfo.h"
  17 #include "AVRMachineFunctionInfo.h"
  18 #include "AVRTargetMachine.h"
  19 #include "MCTargetDesc/AVRMCTargetDesc.h"
  20
  21 #include "llvm/CodeGen/MachineFrameInfo.h"
  22 #include "llvm/CodeGen/MachineFunction.h"
  23 #include "llvm/CodeGen/MachineFunctionPass.h"
  24 #include "llvm/CodeGen/MachineInstrBuilder.h"
  25 #include "llvm/CodeGen/MachineRegisterInfo.h"
  26 #include "llvm/IR/Function.h"
  27
  28 #include <vector>
  29
  30 namespace llvm {
  31
  32 AVRFrameLowering::AVRFrameLowering()
  33     : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(1), -2) {}
  34
  35 bool AVRFrameLowering::canSimplifyCallFramePseudos(
  36     const MachineFunction &MF) const {
  37   // Always simplify call frame pseudo instructions, even when
  38   // hasReservedCallFrame is false.
  39   return true;
  40 }
  41
  42 bool AVRFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
  43   // Reserve call frame memory in function prologue under the following
  44   // conditions:
  45   // - Y pointer is reserved to be the frame pointer.
  46   // - The function does not contain variable sized objects.
  47
  48   const MachineFrameInfo &MFI = MF.getFrameInfo();
  49   return hasFP(MF) && !MFI.hasVarSizedObjects();
  50 }
  51
  52 void AVRFrameLowering::emitPrologue(MachineFunction &MF,
  53                                     MachineBasicBlock &MBB) const {
  54   MachineBasicBlock::iterator MBBI = MBB.begin();
  55   DebugLoc DL = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
  56   const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
  57   const AVRInstrInfo &TII = *STI.getInstrInfo();
  58   const AVRMachineFunctionInfo *AFI = MF.getInfo<AVRMachineFunctionInfo>();
  59   bool HasFP = hasFP(MF);
  60
  61   // Interrupt handlers re-enable interrupts in function entry.
  62   if (AFI->isInterruptHandler()) {
  63     BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs))
  64         .addImm(0x07)
  65         .setMIFlag(MachineInstr::FrameSetup);
  66   }
  67
  68   // Emit special prologue code to save R1, R0 and SREG in interrupt/signal
  69   // handlers before saving any other registers.
  70   if (AFI->isInterruptOrSignalHandler()) {
  71     BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr))
  72         .addReg(AVR::R1R0, RegState::Kill)
  73         .setMIFlag(MachineInstr::FrameSetup);
  74
  75     BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0)
  76         .addImm(0x3f)
  77         .setMIFlag(MachineInstr::FrameSetup);
  78     BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
  79         .addReg(AVR::R0, RegState::Kill)
  80         .setMIFlag(MachineInstr::FrameSetup);
  81     BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
  82         .addReg(AVR::R0, RegState::Define)
  83         .addReg(AVR::R0, RegState::Kill)
  84         .addReg(AVR::R0, RegState::Kill)
  85         .setMIFlag(MachineInstr::FrameSetup);
  86     BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
  87         .addReg(AVR::R1, RegState::Define)
  88         .addReg(AVR::R1, RegState::Kill)
  89         .addReg(AVR::R1, RegState::Kill)
  90         .setMIFlag(MachineInstr::FrameSetup);
  91   }
  92
  93   // Early exit if the frame pointer is not needed in this function.
  94   if (!HasFP) {
  95     return;
  96   }
  97
  98   const MachineFrameInfo &MFI = MF.getFrameInfo();
  99   unsigned FrameSize = MFI.getStackSize() - AFI->getCalleeSavedFrameSize();
 100
 101   // Skip the callee-saved push instructions.
 102   while (
 103       (MBBI != MBB.end()) && MBBI->getFlag(MachineInstr::FrameSetup) &&
 104       (MBBI->getOpcode() == AVR::PUSHRr || MBBI->getOpcode() == AVR::PUSHWRr)) {
 105     ++MBBI;
 106   }
 107
 108   // Update Y with the new base value.
 109   BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28)
 110       .addReg(AVR::SP)
 111       .setMIFlag(MachineInstr::FrameSetup);
 112
 113   // Mark the FramePtr as live-in in every block except the entry.
 114   for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
 115        I != E; ++I) {
 116     I->addLiveIn(AVR::R29R28);
 117   }
 118
 119   if (!FrameSize) {
 120     return;
 121   }
 122
 123   // Reserve the necessary frame memory by doing FP -= <size>.
 124   unsigned Opcode = (isUInt<6>(FrameSize)) ? AVR::SBIWRdK : AVR::SUBIWRdK;
 125
 126   MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
 127                          .addReg(AVR::R29R28, RegState::Kill)
 128                          .addImm(FrameSize)
 129                          .setMIFlag(MachineInstr::FrameSetup);
 130   // The SREG implicit def is dead.
 131   MI->getOperand(3).setIsDead();
 132
 133   // Write back R29R28 to SP and temporarily disable interrupts.
 134   BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
 135       .addReg(AVR::R29R28)
 136       .setMIFlag(MachineInstr::FrameSetup);
 137 }
 138
 139 static void restoreStatusRegister(MachineFunction &MF, MachineBasicBlock &MBB) {
 140   const AVRMachineFunctionInfo *AFI = MF.getInfo<AVRMachineFunctionInfo>();
 141
 142   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
 143
 144   DebugLoc DL = MBBI->getDebugLoc();
 145   const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
 146   const AVRInstrInfo &TII = *STI.getInstrInfo();
 147
 148   // Emit special epilogue code to restore R1, R0 and SREG in interrupt/signal
 149   // handlers at the very end of the function, just before reti.
 150   if (AFI->isInterruptOrSignalHandler()) {
 151     BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0);
 152     BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr))
 153         .addImm(0x3f)
 154         .addReg(AVR::R0, RegState::Kill);
 155     BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R1R0);
 156   }
 157 }
 158
 159 void AVRFrameLowering::emitEpilogue(MachineFunction &MF,
 160                                     MachineBasicBlock &MBB) const {
 161   const AVRMachineFunctionInfo *AFI = MF.getInfo<AVRMachineFunctionInfo>();
 162
 163   // Early exit if the frame pointer is not needed in this function except for
 164   // signal/interrupt handlers where special code generation is required.
 165   if (!hasFP(MF) && !AFI->isInterruptOrSignalHandler()) {
 166     return;
 167   }
 168
 169   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
 170   assert(MBBI->getDesc().isReturn() &&
 171          "Can only insert epilog into returning blocks");
 172
 173   DebugLoc DL = MBBI->getDebugLoc();
 174   const MachineFrameInfo &MFI = MF.getFrameInfo();
 175   unsigned FrameSize = MFI.getStackSize() - AFI->getCalleeSavedFrameSize();
 176   const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
 177   const AVRInstrInfo &TII = *STI.getInstrInfo();
 178
 179   // Early exit if there is no need to restore the frame pointer.
 180   if (!FrameSize) {
 181     restoreStatusRegister(MF, MBB);
 182     return;
 183   }
 184
 185   // Skip the callee-saved pop instructions.
 186   while (MBBI != MBB.begin()) {
 187     MachineBasicBlock::iterator PI = std::prev(MBBI);
 188     int Opc = PI->getOpcode();
 189
 190     if (Opc != AVR::POPRd && Opc != AVR::POPWRd && !PI->isTerminator()) {
 191       break;
 192     }
 193
 194     --MBBI;
 195   }
 196
 197   unsigned Opcode;
 198
 199   // Select the optimal opcode depending on how big it is.
 200   if (isUInt<6>(FrameSize)) {
 201     Opcode = AVR::ADIWRdK;
 202   } else {
 203     Opcode = AVR::SUBIWRdK;
 204     FrameSize = -FrameSize;
 205   }
 206
 207   // Restore the frame pointer by doing FP += <size>.
 208   MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
 209                          .addReg(AVR::R29R28, RegState::Kill)
 210                          .addImm(FrameSize);
 211   // The SREG implicit def is dead.
 212   MI->getOperand(3).setIsDead();
 213
 214   // Write back R29R28 to SP and temporarily disable interrupts.
 215   BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
 216       .addReg(AVR::R29R28, RegState::Kill);
 217
 218   restoreStatusRegister(MF, MBB);
 219 }
 220
 221 // Return true if the specified function should have a dedicated frame
 222 // pointer register. This is true if the function meets any of the following
 223 // conditions:
 224 //  - a register has been spilled
 225 //  - has allocas
 226 //  - input arguments are passed using the stack
 227 //
 228 // Notice that strictly this is not a frame pointer because it contains SP after
 229 // frame allocation instead of having the original SP in function entry.
 230 bool AVRFrameLowering::hasFP(const MachineFunction &MF) const {
 231   const AVRMachineFunctionInfo *FuncInfo = MF.getInfo<AVRMachineFunctionInfo>();
 232
 233   return (FuncInfo->getHasSpills() || FuncInfo->getHasAllocas() ||
 234           FuncInfo->getHasStackArgs());
 235 }
 236
 237 bool AVRFrameLowering::spillCalleeSavedRegisters(
 238     MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
 239     ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
 240   if (CSI.empty()) {
 241     return false;
 242   }
 243
 244   unsigned CalleeFrameSize = 0;
 245   DebugLoc DL = MBB.findDebugLoc(MI);
 246   MachineFunction &MF = *MBB.getParent();
 247   const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
 248   const TargetInstrInfo &TII = *STI.getInstrInfo();
 249   AVRMachineFunctionInfo *AVRFI = MF.getInfo<AVRMachineFunctionInfo>();
 250
 251   for (unsigned i = CSI.size(); i != 0; --i) {
 252     unsigned Reg = CSI[i - 1].getReg();
 253     bool IsNotLiveIn = !MBB.isLiveIn(Reg);
 254
 255     assert(TRI->getRegSizeInBits(*TRI->getMinimalPhysRegClass(Reg)) == 8 &&
 256            "Invalid register size");
 257
 258     // Add the callee-saved register as live-in only if it is not already a
 259     // live-in register, this usually happens with arguments that are passed
 260     // through callee-saved registers.
 261     if (IsNotLiveIn) {
 262       MBB.addLiveIn(Reg);
 263     }
 264
 265     // Do not kill the register when it is an input argument.
 266     BuildMI(MBB, MI, DL, TII.get(AVR::PUSHRr))
 267         .addReg(Reg, getKillRegState(IsNotLiveIn))
 268         .setMIFlag(MachineInstr::FrameSetup);
 269     ++CalleeFrameSize;
 270   }
 271
 272   AVRFI->setCalleeSavedFrameSize(CalleeFrameSize);
 273
 274   return true;
 275 }
 276
 277 bool AVRFrameLowering::restoreCalleeSavedRegisters(
 278     MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
 279     MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
 280   if (CSI.empty()) {
 281     return false;
 282   }
 283
 284   DebugLoc DL = MBB.findDebugLoc(MI);
 285   const MachineFunction &MF = *MBB.getParent();
 286   const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
 287   const TargetInstrInfo &TII = *STI.getInstrInfo();
 288
 289   for (const CalleeSavedInfo &CCSI : CSI) {
 290     unsigned Reg = CCSI.getReg();
 291
 292     assert(TRI->getRegSizeInBits(*TRI->getMinimalPhysRegClass(Reg)) == 8 &&
 293            "Invalid register size");
 294
 295     BuildMI(MBB, MI, DL, TII.get(AVR::POPRd), Reg);
 296   }
 297
 298   return true;
 299 }
 300
 301 /// Replace pseudo store instructions that pass arguments through the stack with
 302 /// real instructions.
 303 static void fixStackStores(MachineBasicBlock &MBB,
 304                            MachineBasicBlock::iterator MI,
 305                            const TargetInstrInfo &TII, Register FP) {
 306   // Iterate through the BB until we hit a call instruction or we reach the end.
 307   for (auto I = MI, E = MBB.end(); I != E && !I->isCall();) {
 308     MachineBasicBlock::iterator NextMI = std::next(I);
 309     MachineInstr &MI = *I;
 310     unsigned Opcode = I->getOpcode();
 311
 312     // Only care of pseudo store instructions where SP is the base pointer.
 313     if (Opcode != AVR::STDSPQRr && Opcode != AVR::STDWSPQRr) {
 314       I = NextMI;
 315       continue;
 316     }
 317
 318     assert(MI.getOperand(0).getReg() == AVR::SP &&
 319            "Invalid register, should be SP!");
 320
 321     // Replace this instruction with a regular store. Use Y as the base
 322     // pointer since it is guaranteed to contain a copy of SP.
 323     unsigned STOpc =
 324         (Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr;
 325
 326     MI.setDesc(TII.get(STOpc));
 327     MI.getOperand(0).setReg(FP);
 328
 329     I = NextMI;
 330   }
 331 }
 332
 333 MachineBasicBlock::iterator AVRFrameLowering::eliminateCallFramePseudoInstr(
 334     MachineFunction &MF, MachineBasicBlock &MBB,
 335     MachineBasicBlock::iterator MI) const {
 336   const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
 337   const AVRInstrInfo &TII = *STI.getInstrInfo();
 338
 339   // There is nothing to insert when the call frame memory is allocated during
 340   // function entry. Delete the call frame pseudo and replace all pseudo stores
 341   // with real store instructions.
 342   if (hasReservedCallFrame(MF)) {
 343     fixStackStores(MBB, MI, TII, AVR::R29R28);
 344     return MBB.erase(MI);
 345   }
 346
 347   DebugLoc DL = MI->getDebugLoc();
 348   unsigned int Opcode = MI->getOpcode();
 349   int Amount = TII.getFrameSize(*MI);
 350
 351   // ADJCALLSTACKUP and ADJCALLSTACKDOWN are converted to adiw/subi
 352   // instructions to read and write the stack pointer in I/O space.
 353   if (Amount != 0) {
 354     assert(getStackAlign() == Align(1) && "Unsupported stack alignment");
 355
 356     if (Opcode == TII.getCallFrameSetupOpcode()) {
 357       // Update the stack pointer.
 358       // In many cases this can be done far more efficiently by pushing the
 359       // relevant values directly to the stack. However, doing that correctly
 360       // (in the right order, possibly skipping some empty space for undef
 361       // values, etc) is tricky and thus left to be optimized in the future.
 362       BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
 363
 364       MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30)
 365                               .addReg(AVR::R31R30, RegState::Kill)
 366                               .addImm(Amount);
 367       New->getOperand(3).setIsDead();
 368
 369       BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP)
 370           .addReg(AVR::R31R30);
 371
 372       // Make sure the remaining stack stores are converted to real store
 373       // instructions.
 374       fixStackStores(MBB, MI, TII, AVR::R31R30);
 375     } else {
 376       assert(Opcode == TII.getCallFrameDestroyOpcode());
 377
 378       // Note that small stack changes could be implemented more efficiently
 379       // with a few pop instructions instead of the 8-9 instructions now
 380       // required.
 381
 382       // Select the best opcode to adjust SP based on the offset size.
 383       unsigned addOpcode;
 384       if (isUInt<6>(Amount)) {
 385         addOpcode = AVR::ADIWRdK;
 386       } else {
 387         addOpcode = AVR::SUBIWRdK;
 388         Amount = -Amount;
 389       }
 390
 391       // Build the instruction sequence.
 392       BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
 393
 394       MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(addOpcode), AVR::R31R30)
 395                               .addReg(AVR::R31R30, RegState::Kill)
 396                               .addImm(Amount);
 397       New->getOperand(3).setIsDead();
 398
 399       BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP)
 400           .addReg(AVR::R31R30, RegState::Kill);
 401     }
 402   }
 403
 404   return MBB.erase(MI);
 405 }
 406
 407 void AVRFrameLowering::determineCalleeSaves(MachineFunction &MF,
 408                                             BitVector &SavedRegs,
 409                                             RegScavenger *RS) const {
 410   TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
 411
 412   // If we have a frame pointer, the Y register needs to be saved as well.
 413   if (hasFP(MF)) {
 414     SavedRegs.set(AVR::R29);
 415     SavedRegs.set(AVR::R28);
 416   }
 417 }
 418 /// The frame analyzer pass.
 419 ///
 420 /// Scans the function for allocas and used arguments
 421 /// that are passed through the stack.
 422 struct AVRFrameAnalyzer : public MachineFunctionPass {
 423   static char ID;
 424   AVRFrameAnalyzer() : MachineFunctionPass(ID) {}
 425
 426   bool runOnMachineFunction(MachineFunction &MF) override {
 427     const MachineFrameInfo &MFI = MF.getFrameInfo();
 428     AVRMachineFunctionInfo *FuncInfo = MF.getInfo<AVRMachineFunctionInfo>();
 429
 430     // If there are no fixed frame indexes during this stage it means there
 431     // are allocas present in the function.
 432     if (MFI.getNumObjects() != MFI.getNumFixedObjects()) {
 433       // Check for the type of allocas present in the function. We only care
 434       // about fixed size allocas so do not give false positives if only
 435       // variable sized allocas are present.
 436       for (unsigned i = 0, e = MFI.getObjectIndexEnd(); i != e; ++i) {
 437         // Variable sized objects have size 0.
 438         if (MFI.getObjectSize(i)) {
 439           FuncInfo->setHasAllocas(true);
 440           break;
 441         }
 442       }
 443     }
 444
 445     // If there are fixed frame indexes present, scan the function to see if
 446     // they are really being used.
 447     if (MFI.getNumFixedObjects() == 0) {
 448       return false;
 449     }
 450
 451     // Ok fixed frame indexes present, now scan the function to see if they
 452     // are really being used, otherwise we can ignore them.
 453     for (const MachineBasicBlock &BB : MF) {
 454       for (const MachineInstr &MI : BB) {
 455         int Opcode = MI.getOpcode();
 456
 457         if ((Opcode != AVR::LDDRdPtrQ) && (Opcode != AVR::LDDWRdPtrQ) &&
 458             (Opcode != AVR::STDPtrQRr) && (Opcode != AVR::STDWPtrQRr)) {
 459           continue;
 460         }
 461
 462         for (const MachineOperand &MO : MI.operands()) {
 463           if (!MO.isFI()) {
 464             continue;
 465           }
 466
 467           if (MFI.isFixedObjectIndex(MO.getIndex())) {
 468             FuncInfo->setHasStackArgs(true);
 469             return false;
 470           }
 471         }
 472       }
 473     }
 474
 475     return false;
 476   }
 477
 478   StringRef getPassName() const override { return "AVR Frame Analyzer"; }
 479 };
 480
 481 char AVRFrameAnalyzer::ID = 0;
 482
 483 /// Creates instance of the frame analyzer pass.
 484 FunctionPass *createAVRFrameAnalyzerPass() { return new AVRFrameAnalyzer(); }
 485
 486 /// Create the Dynalloca Stack Pointer Save/Restore pass.
 487 /// Insert a copy of SP before allocating the dynamic stack memory and restore
 488 /// it in function exit to restore the original SP state. This avoids the need
 489 /// of reserving a register pair for a frame pointer.
 490 struct AVRDynAllocaSR : public MachineFunctionPass {
 491   static char ID;
 492   AVRDynAllocaSR() : MachineFunctionPass(ID) {}
 493
 494   bool runOnMachineFunction(MachineFunction &MF) override {
 495     // Early exit when there are no variable sized objects in the function.
 496     if (!MF.getFrameInfo().hasVarSizedObjects()) {
 497       return false;
 498     }
 499
 500     const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
 501     const TargetInstrInfo &TII = *STI.getInstrInfo();
 502     MachineBasicBlock &EntryMBB = MF.front();
 503     MachineBasicBlock::iterator MBBI = EntryMBB.begin();
 504     DebugLoc DL = EntryMBB.findDebugLoc(MBBI);
 505
 506     Register SPCopy =
 507         MF.getRegInfo().createVirtualRegister(&AVR::DREGSRegClass);
 508
 509     // Create a copy of SP in function entry before any dynallocas are
 510     // inserted.
 511     BuildMI(EntryMBB, MBBI, DL, TII.get(AVR::COPY), SPCopy).addReg(AVR::SP);
 512
 513     // Restore SP in all exit basic blocks.
 514     for (MachineBasicBlock &MBB : MF) {
 515       // If last instruction is a return instruction, add a restore copy.
 516       if (!MBB.empty() && MBB.back().isReturn()) {
 517         MBBI = MBB.getLastNonDebugInstr();
 518         DL = MBBI->getDebugLoc();
 519         BuildMI(MBB, MBBI, DL, TII.get(AVR::COPY), AVR::SP)
 520             .addReg(SPCopy, RegState::Kill);
 521       }
 522     }
 523
 524     return true;
 525   }
 526
 527   StringRef getPassName() const override {
 528     return "AVR dynalloca stack pointer save/restore";
 529   }
 530 };
 531
 532 char AVRDynAllocaSR::ID = 0;
 533
 534 /// createAVRDynAllocaSRPass - returns an instance of the dynalloca stack
 535 /// pointer save/restore pass.
 536 FunctionPass *createAVRDynAllocaSRPass() { return new AVRDynAllocaSR(); }
 537
 538 } // end of namespace llvm
 539