[ORC] Add std::tuple support to SimplePackedSerialization.
[llvm-project.git] / llvm / lib / Target / Hexagon / HexagonDepArch.h
blob7a43a4440b2df0bc9ab434a6f5b97fa177ffbf26
1 //===----------------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 // Automatically generated file, do not edit!
9 //===----------------------------------------------------------------------===//
12 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
13 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
15 #include "llvm/ADT/ArrayRef.h"
16 #include "llvm/ADT/StringRef.h"
17 #include "llvm/BinaryFormat/ELF.h"
19 #include <map>
20 #include <string>
22 namespace llvm {
23 namespace Hexagon {
24 enum class ArchEnum { NoArch, Generic, V5, V55, V60, V62, V65, V66, V67, V68 };
26 static constexpr unsigned ArchValsNumArray[] = {5, 55, 60, 62, 65, 66, 67, 68};
27 static constexpr ArrayRef<unsigned> ArchValsNum(ArchValsNumArray);
29 static constexpr StringLiteral ArchValsTextArray[] = { "v5", "v55", "v60", "v62", "v65", "v66", "v67", "v68" };
30 static constexpr ArrayRef<StringLiteral> ArchValsText(ArchValsTextArray);
32 static constexpr StringLiteral CpuValsTextArray[] = { "hexagonv5", "hexagonv55", "hexagonv60", "hexagonv62", "hexagonv65", "hexagonv66", "hexagonv67", "hexagonv67t", "hexagonv68" };
33 static constexpr ArrayRef<StringLiteral> CpuValsText(CpuValsTextArray);
35 static constexpr StringLiteral CpuNickTextArray[] = { "v5", "v55", "v60", "v62", "v65", "v66", "v67", "v67t", "v68" };
36 static constexpr ArrayRef<StringLiteral> CpuNickText(CpuNickTextArray);
38 static const std::map<std::string, ArchEnum> CpuTable{
39 {"generic", Hexagon::ArchEnum::V5},
40 {"hexagonv5", Hexagon::ArchEnum::V5},
41 {"hexagonv55", Hexagon::ArchEnum::V55},
42 {"hexagonv60", Hexagon::ArchEnum::V60},
43 {"hexagonv62", Hexagon::ArchEnum::V62},
44 {"hexagonv65", Hexagon::ArchEnum::V65},
45 {"hexagonv66", Hexagon::ArchEnum::V66},
46 {"hexagonv67", Hexagon::ArchEnum::V67},
47 {"hexagonv67t", Hexagon::ArchEnum::V67},
48 {"hexagonv68", Hexagon::ArchEnum::V68},
51 static const std::map<std::string, unsigned> ElfFlagsByCpuStr = {
52 {"generic", llvm::ELF::EF_HEXAGON_MACH_V5},
53 {"hexagonv5", llvm::ELF::EF_HEXAGON_MACH_V5},
54 {"hexagonv55", llvm::ELF::EF_HEXAGON_MACH_V55},
55 {"hexagonv60", llvm::ELF::EF_HEXAGON_MACH_V60},
56 {"hexagonv62", llvm::ELF::EF_HEXAGON_MACH_V62},
57 {"hexagonv65", llvm::ELF::EF_HEXAGON_MACH_V65},
58 {"hexagonv66", llvm::ELF::EF_HEXAGON_MACH_V66},
59 {"hexagonv67", llvm::ELF::EF_HEXAGON_MACH_V67},
60 {"hexagonv67t", llvm::ELF::EF_HEXAGON_MACH_V67T},
61 {"hexagonv68", llvm::ELF::EF_HEXAGON_MACH_V68},
63 static const std::map<unsigned, std::string> ElfArchByMachFlags = {
64 {llvm::ELF::EF_HEXAGON_MACH_V5, "V5"},
65 {llvm::ELF::EF_HEXAGON_MACH_V55, "V55"},
66 {llvm::ELF::EF_HEXAGON_MACH_V60, "V60"},
67 {llvm::ELF::EF_HEXAGON_MACH_V62, "V62"},
68 {llvm::ELF::EF_HEXAGON_MACH_V65, "V65"},
69 {llvm::ELF::EF_HEXAGON_MACH_V66, "V66"},
70 {llvm::ELF::EF_HEXAGON_MACH_V67, "V67"},
71 {llvm::ELF::EF_HEXAGON_MACH_V67T, "V67T"},
72 {llvm::ELF::EF_HEXAGON_MACH_V68, "V68"},
74 static const std::map<unsigned, std::string> ElfCpuByMachFlags = {
75 {llvm::ELF::EF_HEXAGON_MACH_V5, "hexagonv5"},
76 {llvm::ELF::EF_HEXAGON_MACH_V55, "hexagonv55"},
77 {llvm::ELF::EF_HEXAGON_MACH_V60, "hexagonv60"},
78 {llvm::ELF::EF_HEXAGON_MACH_V62, "hexagonv62"},
79 {llvm::ELF::EF_HEXAGON_MACH_V65, "hexagonv65"},
80 {llvm::ELF::EF_HEXAGON_MACH_V66, "hexagonv66"},
81 {llvm::ELF::EF_HEXAGON_MACH_V67, "hexagonv67"},
82 {llvm::ELF::EF_HEXAGON_MACH_V67T, "hexagonv67t"},
83 {llvm::ELF::EF_HEXAGON_MACH_V68, "hexagonv68"},
86 } // namespace Hexagon
87 } // namespace llvm;
89 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H