llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h

   1 //=- HexagonMachineFunctionInfo.h - Hexagon machine function info -*- C++ -*-=//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
  10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H
  11
  12 #include "llvm/CodeGen/MachineFunction.h"
  13 #include <map>
  14
  15 namespace llvm {
  16
  17 namespace Hexagon {
  18
  19     const unsigned int StartPacket = 0x1;
  20     const unsigned int EndPacket = 0x2;
  21
  22 } // end namespace Hexagon
  23
  24 /// Hexagon target-specific information for each MachineFunction.
  25 class HexagonMachineFunctionInfo : public MachineFunctionInfo {
  26   // SRetReturnReg - Some subtargets require that sret lowering includes
  27   // returning the value of the returned struct in a register. This field
  28   // holds the virtual register into which the sret argument is passed.
  29   unsigned SRetReturnReg = 0;
  30   unsigned StackAlignBaseVReg = 0;    // Aligned-stack base register (virtual)
  31   unsigned StackAlignBasePhysReg = 0; //                             (physical)
  32   int VarArgsFrameIndex;
  33   int RegSavedAreaStartFrameIndex;
  34   int FirstNamedArgFrameIndex;
  35   int LastNamedArgFrameIndex;
  36   bool HasClobberLR = false;
  37   bool HasEHReturn = false;
  38   std::map<const MachineInstr*, unsigned> PacketInfo;
  39   virtual void anchor();
  40
  41 public:
  42   HexagonMachineFunctionInfo() = default;
  43
  44   HexagonMachineFunctionInfo(MachineFunction &MF) {}
  45
  46   unsigned getSRetReturnReg() const { return SRetReturnReg; }
  47   void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
  48
  49   void setVarArgsFrameIndex(int v) { VarArgsFrameIndex = v; }
  50   int getVarArgsFrameIndex() { return VarArgsFrameIndex; }
  51
  52   void setRegSavedAreaStartFrameIndex(int v) { RegSavedAreaStartFrameIndex = v;}
  53   int getRegSavedAreaStartFrameIndex() { return RegSavedAreaStartFrameIndex; }
  54
  55   void setFirstNamedArgFrameIndex(int v) { FirstNamedArgFrameIndex = v; }
  56   int getFirstNamedArgFrameIndex() { return FirstNamedArgFrameIndex; }
  57
  58   void setLastNamedArgFrameIndex(int v) { LastNamedArgFrameIndex = v; }
  59   int getLastNamedArgFrameIndex() { return LastNamedArgFrameIndex; }
  60
  61   void setStartPacket(MachineInstr* MI) {
  62     PacketInfo[MI] |= Hexagon::StartPacket;
  63   }
  64   void setEndPacket(MachineInstr* MI)   {
  65     PacketInfo[MI] |= Hexagon::EndPacket;
  66   }
  67   bool isStartPacket(const MachineInstr* MI) const {
  68     return (PacketInfo.count(MI) &&
  69             (PacketInfo.find(MI)->second & Hexagon::StartPacket));
  70   }
  71   bool isEndPacket(const MachineInstr* MI) const {
  72     return (PacketInfo.count(MI) &&
  73             (PacketInfo.find(MI)->second & Hexagon::EndPacket));
  74   }
  75   void setHasClobberLR(bool v) { HasClobberLR = v;  }
  76   bool hasClobberLR() const { return HasClobberLR; }
  77
  78   bool hasEHReturn() const { return HasEHReturn; };
  79   void setHasEHReturn(bool H = true) { HasEHReturn = H; };
  80
  81   void setStackAlignBaseVReg(unsigned R) { StackAlignBaseVReg = R; }
  82   unsigned getStackAlignBaseVReg() const { return StackAlignBaseVReg; }
  83
  84   void setStackAlignBasePhysReg(unsigned R) { StackAlignBasePhysReg = R; }
  85   unsigned getStackAlignBasePhysReg() const { return StackAlignBasePhysReg; }
  86 };
  87
  88 } // end namespace llvm
  89
  90 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H