1 //===- HexagonSchedule.td - Hexagon Scheduling Definitions -*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
17 // Endloop is a pseudo instruction that is encoded with 2 bits in a packet
18 // rather than taking an execution slot. This special unit is needed
19 // to schedule an ENDLOOP with 4 other instructions.
20 def SLOT_ENDLOOP: FuncUnit;
22 // CVI pipes from the "Hexagon Multimedia Co-Processor Extensions Arch Spec".
23 def CVI_ST : FuncUnit;
24 def CVI_XLANE : FuncUnit;
25 def CVI_SHIFT : FuncUnit;
26 def CVI_MPY0 : FuncUnit;
27 def CVI_MPY1 : FuncUnit;
28 def CVI_LD : FuncUnit;
29 def CVI_ZW : FuncUnit; // Z register write port
31 // Combined functional units.
32 def CVI_XLSHF : FuncUnit;
33 def CVI_MPY01 : FuncUnit;
34 def CVI_ALL : FuncUnit;
35 def CVI_ALL_NOMEM : FuncUnit;
37 // Combined functional unit data.
38 def HexagonComboFuncsV60 :
40 ComboFuncData<CVI_XLSHF , [CVI_XLANE, CVI_SHIFT]>,
41 ComboFuncData<CVI_MPY01 , [CVI_MPY0, CVI_MPY1]>,
42 ComboFuncData<CVI_ALL , [CVI_ST, CVI_XLANE, CVI_SHIFT,
43 CVI_MPY0, CVI_MPY1, CVI_LD]>,
44 ComboFuncData<CVI_ALL_NOMEM, [CVI_XLANE, CVI_SHIFT, CVI_MPY0, CVI_MPY1]>
48 def PSEUDO : InstrItinClass;
49 def PSEUDOM : InstrItinClass;
50 def DUPLEX : InstrItinClass;
51 def tc_ENDLOOP : InstrItinClass;
53 //===----------------------------------------------------------------------===//
54 // Auto-generated itinerary classes
55 //===----------------------------------------------------------------------===//
56 include "HexagonDepIICScalar.td"
57 include "HexagonDepIICHVX.td"
59 include "HexagonScheduleV5.td"
60 include "HexagonScheduleV55.td"
62 include "HexagonIICScalar.td"
63 include "HexagonIICHVX.td"
64 include "HexagonScheduleV60.td"
66 include "HexagonScheduleV62.td"
67 include "HexagonScheduleV65.td"
68 include "HexagonScheduleV66.td"
69 include "HexagonScheduleV67.td"
70 include "HexagonScheduleV67T.td"
71 include "HexagonScheduleV68.td"