llvm/lib/Target/Mips/Mips16RegisterInfo.cpp

   1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file contains the MIPS16 implementation of the TargetRegisterInfo class.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "Mips16RegisterInfo.h"
  14 #include "Mips.h"
  15 #include "Mips16InstrInfo.h"
  16 #include "MipsInstrInfo.h"
  17 #include "MipsMachineFunction.h"
  18 #include "MipsSubtarget.h"
  19 #include "llvm/ADT/STLExtras.h"
  20 #include "llvm/CodeGen/MachineFrameInfo.h"
  21 #include "llvm/CodeGen/MachineFunction.h"
  22 #include "llvm/CodeGen/MachineInstrBuilder.h"
  23 #include "llvm/CodeGen/MachineRegisterInfo.h"
  24 #include "llvm/CodeGen/TargetFrameLowering.h"
  25 #include "llvm/CodeGen/TargetInstrInfo.h"
  26 #include "llvm/IR/Constants.h"
  27 #include "llvm/IR/DebugInfo.h"
  28 #include "llvm/IR/Function.h"
  29 #include "llvm/IR/Type.h"
  30 #include "llvm/Support/Debug.h"
  31 #include "llvm/Support/ErrorHandling.h"
  32 #include "llvm/Support/raw_ostream.h"
  33 #include "llvm/Target/TargetMachine.h"
  34 #include "llvm/Target/TargetOptions.h"
  35
  36 using namespace llvm;
  37
  38 #define DEBUG_TYPE "mips16-registerinfo"
  39
  40 Mips16RegisterInfo::Mips16RegisterInfo() : MipsRegisterInfo() {}
  41
  42 bool Mips16RegisterInfo::requiresRegisterScavenging
  43   (const MachineFunction &MF) const {
  44   return false;
  45 }
  46 bool Mips16RegisterInfo::requiresFrameIndexScavenging
  47   (const MachineFunction &MF) const {
  48   return false;
  49 }
  50
  51 bool Mips16RegisterInfo::useFPForScavengingIndex
  52   (const MachineFunction &MF) const {
  53   return false;
  54 }
  55
  56 bool Mips16RegisterInfo::saveScavengerRegister(
  57     MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
  58     MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC,
  59     Register Reg) const {
  60   DebugLoc DL;
  61   const TargetInstrInfo &TII = *MBB.getParent()->getSubtarget().getInstrInfo();
  62   TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
  63   TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
  64   return true;
  65 }
  66
  67 const TargetRegisterClass *
  68 Mips16RegisterInfo::intRegClass(unsigned Size) const {
  69   assert(Size == 4);
  70   return &Mips::CPU16RegsRegClass;
  71 }
  72
  73 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
  74                                      unsigned OpNo, int FrameIndex,
  75                                      uint64_t StackSize,
  76                                      int64_t SPOffset) const {
  77   MachineInstr &MI = *II;
  78   MachineFunction &MF = *MI.getParent()->getParent();
  79   MachineFrameInfo &MFI = MF.getFrameInfo();
  80
  81   const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
  82   int MinCSFI = 0;
  83   int MaxCSFI = -1;
  84
  85   if (CSI.size()) {
  86     MinCSFI = CSI[0].getFrameIdx();
  87     MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
  88   }
  89
  90   // The following stack frame objects are always
  91   // referenced relative to $sp:
  92   //  1. Outgoing arguments.
  93   //  2. Pointer to dynamically allocated stack space.
  94   //  3. Locations for callee-saved registers.
  95   // Everything else is referenced relative to whatever register
  96   // getFrameRegister() returns.
  97   Register FrameReg;
  98
  99   if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
 100     FrameReg = Mips::SP;
 101   else {
 102     const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
 103     if (TFI->hasFP(MF)) {
 104       FrameReg = Mips::S0;
 105     }
 106     else {
 107       if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
 108         FrameReg = MI.getOperand(OpNo+2).getReg();
 109       else
 110         FrameReg = Mips::SP;
 111     }
 112   }
 113   // Calculate final offset.
 114   // - There is no need to change the offset if the frame object
 115   //   is one of the
 116   //   following: an outgoing argument, pointer to a dynamically allocated
 117   //   stack space or a $gp restore location,
 118   // - If the frame object is any of the following,
 119   //   its offset must be adjusted
 120   //   by adding the size of the stack:
 121   //   incoming argument, callee-saved register location or local variable.
 122   int64_t Offset;
 123   bool IsKill = false;
 124   Offset = SPOffset + (int64_t)StackSize;
 125   Offset += MI.getOperand(OpNo + 1).getImm();
 126
 127   LLVM_DEBUG(errs() << "Offset     : " << Offset << "\n"
 128                     << "<--------->\n");
 129
 130   if (!MI.isDebugValue() &&
 131       !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
 132     MachineBasicBlock &MBB = *MI.getParent();
 133     DebugLoc DL = II->getDebugLoc();
 134     unsigned NewImm;
 135     const Mips16InstrInfo &TII =
 136         *static_cast<const Mips16InstrInfo *>(MF.getSubtarget().getInstrInfo());
 137     FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
 138     Offset = SignExtend64<16>(NewImm);
 139     IsKill = true;
 140   }
 141   MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
 142   MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
 143
 144
 145 }