1 //===- MipsMachineFunctionInfo.h - Private data used for Mips ---*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares the Mips specific subclass of MachineFunctionInfo.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSMACHINEFUNCTION_H
14 #define LLVM_LIB_TARGET_MIPS_MIPSMACHINEFUNCTION_H
16 #include "Mips16HardFloatInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineMemOperand.h"
23 /// MipsFunctionInfo - This class is derived from MachineFunction private
24 /// Mips target-specific information for each MachineFunction.
25 class MipsFunctionInfo
: public MachineFunctionInfo
{
27 MipsFunctionInfo(MachineFunction
&MF
) {}
29 ~MipsFunctionInfo() override
;
31 unsigned getSRetReturnReg() const { return SRetReturnReg
; }
32 void setSRetReturnReg(unsigned Reg
) { SRetReturnReg
= Reg
; }
34 bool globalBaseRegSet() const;
35 Register
getGlobalBaseReg(MachineFunction
&MF
);
36 Register
getGlobalBaseRegForGlobalISel(MachineFunction
&MF
);
38 // Insert instructions to initialize the global base register in the
39 // first MBB of the function.
40 void initGlobalBaseReg(MachineFunction
&MF
);
42 int getVarArgsFrameIndex() const { return VarArgsFrameIndex
; }
43 void setVarArgsFrameIndex(int Index
) { VarArgsFrameIndex
= Index
; }
45 bool hasByvalArg() const { return HasByvalArg
; }
46 void setFormalArgInfo(unsigned Size
, bool HasByval
) {
47 IncomingArgSize
= Size
;
48 HasByvalArg
= HasByval
;
51 unsigned getIncomingArgSize() const { return IncomingArgSize
; }
53 bool callsEhReturn() const { return CallsEhReturn
; }
54 void setCallsEhReturn() { CallsEhReturn
= true; }
56 void createEhDataRegsFI(MachineFunction
&MF
);
57 int getEhDataRegFI(unsigned Reg
) const { return EhDataRegFI
[Reg
]; }
58 bool isEhDataRegFI(int FI
) const;
60 /// Create a MachinePointerInfo that has an ExternalSymbolPseudoSourceValue
61 /// object representing a GOT entry for an external function.
62 MachinePointerInfo
callPtrInfo(MachineFunction
&MF
, const char *ES
);
64 // Functions with the "interrupt" attribute require special prologues,
65 // epilogues and additional spill slots.
66 bool isISR() const { return IsISR
; }
67 void setISR() { IsISR
= true; }
68 void createISRRegFI(MachineFunction
&MF
);
69 int getISRRegFI(Register Reg
) const { return ISRDataRegFI
[Reg
]; }
70 bool isISRRegFI(int FI
) const;
72 /// Create a MachinePointerInfo that has a GlobalValuePseudoSourceValue object
73 /// representing a GOT entry for a global function.
74 MachinePointerInfo
callPtrInfo(MachineFunction
&MF
, const GlobalValue
*GV
);
76 void setSaveS2() { SaveS2
= true; }
77 bool hasSaveS2() const { return SaveS2
; }
79 int getMoveF64ViaSpillFI(MachineFunction
&MF
, const TargetRegisterClass
*RC
);
81 std::map
<const char *, const Mips16HardFloatInfo::FuncSignature
*>
85 virtual void anchor();
87 /// SRetReturnReg - Some subtargets require that sret lowering includes
88 /// returning the value of the returned struct in a register. This field
89 /// holds the virtual register into which the sret argument is passed.
90 Register SRetReturnReg
;
92 /// GlobalBaseReg - keeps track of the virtual register initialized for
93 /// use as the global base register. This is used for PIC in some PIC
94 /// relocation models.
95 Register GlobalBaseReg
;
97 /// VarArgsFrameIndex - FrameIndex for start of varargs area.
98 int VarArgsFrameIndex
= 0;
100 /// True if function has a byval argument.
103 /// Size of incoming argument area.
104 unsigned IncomingArgSize
;
106 /// CallsEhReturn - Whether the function calls llvm.eh.return.
107 bool CallsEhReturn
= false;
109 /// Frame objects for spilling eh data registers.
112 /// ISR - Whether the function is an Interrupt Service Routine.
115 /// Frame objects for spilling C0_STATUS, C0_EPC
121 /// FrameIndex for expanding BuildPairF64 nodes to spill and reload when the
122 /// O32 FPXX ABI is enabled. -1 is used to denote invalid index.
123 int MoveF64ViaSpillFI
= -1;
126 } // end namespace llvm
128 #endif // LLVM_LIB_TARGET_MIPS_MIPSMACHINEFUNCTION_H